Low-frequency noise in ideal GaAs Schottky-barrier diodes

Large-area Schottky diodes have been made on epitaxial GaAs produced by liquid-phase, alkyl and trichloride-vapour-phase techniques. D.L.T.S. transient-capacitance experiments failed to detect electron traps in the material in each case. A very low level of low-frequency excess noise was found in diodes with ideal current/voltage characteristics, but devices with excess current at low bias were noisier.     

Backgate-induced characteristics of ion-implanted GaAs MESFET's

Three important characteristics of GaAs ion-implanted MESFET's associated with the phenomenon of backgating have been identified and measured. These include a negative backgate capacitance, initiation and/or control of low-frequency oscillations, and enhancement of g-r noise, all related to the deep-level electron traps present in the semi-insulating substrate beneath the implanted layer. Low-frequency oscillations have been observed mostly in devices with high gate-leakage current under conditions involving zero to large negative backgate bias. The frequency of oscillations and the backgate negative-capacitance magnitude have been found to decrease and increase, respectively, with the increase of the negative backgate bias voltage. This implies a decrease in the capture/emission cross section of traps at high fields.     

A new analytical model for photo-dependent capacitances of GaAs MESFET’s with emphasis on the substrate related effects

A new analytical model for optical and bias dependent nonlinear capacitances of GaAs MESFET which is valid for both linear and saturation regions has been proposed in this paper. The novelty lies in modeling of internal and external photovoltaic effects that includes deep level traps in the substrate and surface recombination at metal–semiconductor interface of the gate. The effect of high field domain formation at the drain end in the saturation region has also been included to improve the accuracy of the present model. The model presents backgating effects on gate–source and gate–drain capacitances of GaAs MESFET for the first time in literature. Finally, the proposed model has been compared to the reported results to show the validity. The proposed model may be very useful for the designing of photonic MMIC’s and optical receivers using GaAs MESFET’s.     

Correlation between trap characterisation by low frequency noise, mutual conductance dispersion, oscillations and DLTS in GaAs MESFETs

The characteristics of traps observed by excess generation-recombination (g-r) noise spectroscopy, g_M-frequency dispersion spectroscopy and low frequency oscillations are correlated with the properties observed by different versions of DLTS experiments applied to GaAs MESFETs. A comparison of the trap parameters reveals the relative sensitivities of the techniques and any systematic differences. The DLTS experiments have located the positions of the traps so that the bias dependence of the trap parameters for each technique should allow any unknown trap also to be located within the device structure.     

Characterization of deep centers in undoped semi-insulating GaAs substrates by normalized thermally stimulated current spectroscopy: Comparison of 100 and 150 mm wafers

A well-established characterization method for investigating deep traps in semi-insulating (SI) GaAs is thermally stimulated current (TSC) spectroscopy; however, TSC is not considered to be a quantitative technique because it involves carrier mobility, lifetime, and geometric factors, which are either unknown or poorly known. In this paper, we first show how to quantify a TSC spectrum, by normalizing with infrared (hv = 1.13 eV) photocurrent, and then apply this method (called NTSC) to study the lateral uniformity of the main deep centers across the diameters of undoped SI GaAs wafers. The wafers used in the study include both the standard 100 mm sizes and the new 150 mm variations, and are grown by both the low and high pressure liquid encapsulated Czochralski techniques. The results reveal that the 150 mm wafers have a worse NTSC uniformity for the main traps and a higher degree of compensation, as compared these parameters for the 100 mm wafers. In addition, nonuniformities related to the electric field effects on both the TSC spectrum and the low temperature photocurrent are found in the 150 mm wafer grown by the low pressure technique.     

A dc and microwave comparison of GaAs MESFET's on GaAs and Si substrates

In order to assess GaAs on Si technology, we have made a performance comparison of GaAs MESFET's grown and fabricated on Si and GaAs substrates under identical conditions and report the first microwave results. The GaAs MESFET's on Si with 1.2-µm gate length (290-µm width) exhibited transconductances (gm) of 180 mS/mm with good saturation and pinchoff whereas their counterparts on GaAs substrates exhibited gmof 170 mS/mm. A current gain cut-off frequency of 13.5 GHz was obtained, which compares with 12.9 GHz observed in similar-geometry GaAs MESFET's on GaAs substrates. The other circuit parameters determined from S-parameter measurements up to 18 GHz showed that whether the substrate is Si or GaAs does not seem to make a difference. Additionally, the microwave performance of these devices was about the same as that obtained in devices with identical geometry fabricated at Tektronix on GaAs substrates. The side-gating effect has also been measured in both types of devices with less than 10-percent decrease in drain current when 5 V is applied to a pad situated 5 µm away from the source. The magnitude of the sidegating effect was identical to within experimental determination for all side-gate biases in the studied range of 0 to -5 V. The light sensitivity of this effect was also very small with a change in drain current of less that 1 percent between dark and light conditions for a side gate bias of -5 V and a spacing of 5 µm. Carrier saturation velocity depth profiles showed that for both MESFET's on GaAs and Si substrates, the velocity was constant at 1.5 × 10⁷cm/s to within 100-150 Å of the active layer-buffer layer interface.     

GaAs MESFET二维计算机辅助分析

编制了MESFET通用二维分析程序.通过对一个GaAs MESFET进行二维数值分析,得到了典型偏置条件下,沟道内各点的静电电位和自由电了浓度,计算了某些重要的器件参数.解释了短栅器件收漏电流泡和机理.计算结果与国外文献中有关报道相符.     

Characterization of deep traps in semi-insulating gallium arsenide

In this paper a number of deep traps, which play a crucial role in many macroscopic properties of semi-insulating GaAs have been characterized and analyzed. The main trap parameters (activation energy and capture cross section) were deduced by several experimental methods, based on thermally stimulated current and isothermal current transients. Results were compared with other studies of deep traps in SI GaAs performed with these and other methods as well as studies of deep levels in conductive GaAs. To enable these comparisons an analysis of the methods and usually employed calculation procedures was given as well as suggestions for the presentation of the trap parameters. It was also concluded that the observed traps are complex defects which correspond to deep traps observed by other authors in a variety of other SI GaAs materials. Some of them seem to include, as a part of the defect, a well known defect EL2 but there are also strong indications for involvement of other structural defects and/or common impurities.     

Bias dependence of GaAs and InP MESFET parameters

A comparative analysis of the bias dependence of critical RF parameters in GaAs and InP metal-semiconductor field-effect transistors (MESFET's) led to the following conclusions. 1) The drain-gate feedback capacitance in GaAs MESFET's is lower than in InP MESFET's, because of a stronger tendency in GaAs to form stationary Gunn domains at the typical drain bias levels employed. 2) The drain-source output resistance in InP MESFET's is lower than in GaAs MESFET's mainly for high drain current units, a fact which is linked to a substrate related softer pinch-off behavior in InP. 3) The current-gain cutoff frequency fT, in the current saturation range of the GaAs MESFET decreases strongly with drain bias as a result of the formation of the stationary Gunn domain. In the InP MESFET, this effect is weaker. At the optimum bias, fT is only 10-20 percent higher in InP MESFET's than in GaAs ones.     

Majority-carrier traps in n- and p-type epitaxial GaAs

Majority-carrier traps are characterised for n- and p-type GaAs. Bulk and vapour-phase-epitaxial n GaAs show the same electron-trap centre (0.83 eV). No electron traps were detected in liquid-phase epitaxial n GaAs, but three hole trap centres (0.64, 0.44 and ~ 0.6 eV) were found in p GaAs. The capture cross-section and density of these centres have also been determined.     

Numerical simulation of sidegating effect in GaAs MESFET's

Two-dimensional simulation of the sidegating effect in GaAs MESFETs has been performed. The result confirms that Schottky contacts on a semi-insulating substrate cause serious high substrate leakage current and drain current reduction in GaAs MESFETs. The threshold behavior in the sidegating effect is found to correlate with the conduction behavior of the Schottky-i-n (sidegate) structure when the sidegate is negatively biased. Shielding and enhancement of the sidegating effect by the Schottky contacts have also been studied, and the results agree with the experimental findings. Besides, the presence of hole traps in the semi-insulating substrate is found to be essential to the sidegating effect     

Effect of traps on low-temperature high electron mobility transistor characteristics

The I-V characteristics of MBE-grown AlGaAs/GaAs high electron mobility transistors (HEMT's) are studied using a bias and temperature sequence between 77 and 300 K to control trap occupancy. Low-temperature threshold voltage, transconductance, and saturation current are found to be either increased or decreased significantly relative to their 300 K values depending on the gate bias condition during cool down. This behavior is shown to be caused by variations in trap occupancy in the highly doped AlGaAs layer.     

Bias stress reliability of Be-, Zn- and C-doped base microwave HBTs

In this paper the effect of C-, Be- and Zn-doped GaAs base on the bias stress reliability of n-p-n AlGaAs/GaAs microwave HBTs, fabricated under an identical processing technology and layout design, have been investigated. It was found that, following 24 hours of identical bias stress at room temperature, both Be- and Zn-doped devices exhibited current gain degradation of 68 and 57%, respectively, compared with only 7% for the C-doped device. The increase in the emitter/base turn-on voltage in the degraded devices is attributed to the p-n junction displacement.     

Interface state density in Au-nGaAs Schottky diodes

A method for determining the surface state density in Schottky diodes taking into account both I–V and C–V data while considering the presence of a deep donor level is presented. The model assumes that the barrier height is controlled by the energy distribution of surface states in equilibrium with the metal and the applied potential and does not include, explicitly, an interfacial layer. The model was applied to extract interface state densities of Au-nGaAs guarded Schottky diodes fabricated from bulk and VPE (100) GaAs with carrier conentrations between 3 × 10¹⁵ and 8 × 10¹⁶ cm^?3. These diodes exhibited ideality (n) factors of approximately 1.02 and room temperature saturation current densities ～10^?8 A/cm². This model is in substantial agreement with forward bias measurements over the 77–360°K temperature range investigated, in that a temperature-independent energy distribution of interface states was obtained. In reverse bias the interface state model is most valid with the higher carrier concentration material and at high temperature and low bias voltage. Typical interface state densities from 0.07 eV above the zero bias Fermi level to 0.01 eV below the Fermi level were 2 × 10¹³ cm^?2 eV^?1. The validity of the model under reverse bias is restricted by a non-thermionic reverse current, thought to be enhance field emission from traps.     

On Charge Transport and Low-Frequency Noise in the GaN p-i-n Diode

The current-voltage (I-V) characteristics and low-frequency noise of the GaN p-i-n diodes were investigated in temperature range from 10 K to 300 K. We found that the reverse biased p-i-n diode made of GaN/AlGaN exhibits features of the space charge limited (SCL) current flow and its I-V characteristics can be approximated by the power law I~Vⁿ relation. This phenomenon can be attributed to the presence of the multiple charge traps in the intrinsic region of device. It has been demonstrated that the direct tunneling from traps to bands may occur in diodes at forward and reverse bias with strong support of the Frenkel effect. The low frequency noise in our devices does not depend on temperature in both bias directions under cryogenic conditions. The observed low-frequency noise features support the hypothesis that excess tunneling current and recombination at grain boundaries are origins of the 1/f low-frequency noise in the diode at forward bias. The 1/f noise in the reverse bias regime can be described as a composition of many Lorentzian noise components that originate from traps, which have specific depth distribution     

Decrease in on-state gate current of AlGaN/GaN HEMTs by recombination-enhanced defect reaction of generated hot carriers investigated by TCAD simulation

Changes in the on-state gate current of AlGaN/GaN high-electron-mobility transistors (HEMTs) under various electrical and thermal stress conditions have been analyzed by technology computer-aided design (TCAD) simulation. A larger gate current is observed under on-state bias condition than that under off-state bias condition. The TCAD simulation indicates that on-state gate current flows from the heated gate electrode to the AlGaN layer by tunneling or hopping through the gate depletion layer when we apply some deep-donor-type traps under the gate in the AlGaN barrier layer. The gate current is caused by electrons that flow and is pulled away by the applied gate-to-drain voltage under a high channel temperature condition. The deep traps benefit both the on- and off-state gate current behavior. We found that the on-state gate current is effectively decreased by electrical stress under the on-state condition. Electroluminescence measurement indicates that a large number of hot carriers are generated under this condition. The results suggest that the process-induced crystal defects are annealed out by non-radiative recombination of the generated hot carriers by a recombination-enhanced defect reaction mechanism. The change in the on-state gate current in the TCAD simulation can be successfully explained by the decrease in the donor traps.     

Role of contacts in characterization of deep traps in semi-insulating GaAs by thermally stimulated current spectroscopy

The role of contacts in characterization of traps in semi-insulating (SI) GaAs by thermally stimulated current (TSC) methods has been demonstrated by comparing alloyed In and soldered In contacts. Alloyed In contacts, which have an ohmic characteristic, assure high sensitivities in both TSC and temperature dependent photocurrent (PC), and both are important for determining the trap concentrations in SI GaAs. On the other hand, soldered In contacts, which act like Schottky barriers, cause a significant reduction of both PC and TSC, particularly at low temperatures, and can lead to a misinterpretation of TSC results.     

Self-aligned GaAs MISFET's with a low-temperature-grown GaAs gateinsulator

GaAs MISFET's with a low-temperature-grown (LTG) GaAs gate insulator and ion-implanted self-aligned source and drain n⁺ regions are demonstrated. The resistivity and breakdown field of the LTG GaAs insulator were not changed appreciably by implantation and 800°C activation annealing. The gate leakage current remained very low at a value of approximately 1 μA per μm² of gate area at 3 V forward gate bias. Because of the reduced source and drain resistance, the drain saturation current and the transconductance of self-aligned MISFET's increased more than twofold after ion implantation     

Charge Transport and Recombination in Polyspirobifluorene Blue Light‐Emitting Diodes

The charge transport in blue light‐emitting polyspirobifluorene is investigated by both steady‐state current‐voltage measurements and transient electroluminescence. Both measurement techniques yield consistent results and show that the hole transport is space‐charge limited. The electron current is found to be governed by a high intrinsic mobility in combination with electron traps. Numerical simulations on light‐emitting diodes reveal a shift in the recombination zone from the cathode to the anode with increasing bias.