共查询到18条相似文献,搜索用时 562 毫秒
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基于信息冗余的错误检测与纠正(Error Detection and Correction,EDAC)技术是常见的系统级抗单粒子翻转(Single Event Upsets,SEU)的容错方法,软件实现的EDAC技术是硬件EDAC技术的替代方案,通过软件编程,在现有存储段上增加具有纠错功能的编码(Error-correcting Codes,ECC)来实现存储区错误的检测和纠正。分析了软件EDAC方案中,纠错编码的纠错能力及编码效率、刷新间隔、需保护代码量等因素对可靠性的影响,分析和仿真实验结果表明,对于单个粒子引起的存储器随机错误,提高单个码字的纠错能力及编码效率、增大刷新间隔对可靠性的影响不大,而通过缩短任务执行的代码量来提高刷新间隔,以及压缩需保护代码的总量,对可靠性有较大改进。分析结论能够指导工程实践中,在实现资源、实时性、可靠性之间进行优化选择。 相似文献
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编码是一种具有较强纠错能力的多进制BCH编码,其既可纠正随机错误,又可纠正突发错误。RS编译码器广泛应用于通信和存储系统,为解决高速存储器中数据可靠性的问题,文中提出了RS编码的实现方法,并对编码进行了时序仿真。仿真结果表明,该译码器可实现良好的纠错功能。 相似文献
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基于奇偶检错-汉明纠错算法的误码率后验分布参数,用仿真数据直接估计纠错后的误码率及其置信区间。实验利用了两个伪随机二进制序列替代原始量子密钥,长度为1.4×10-7,误码呈二项分布,通过奇偶检错后利用(7,4)汉明码对奇偶性不一致的码字进行纠错。实验结果表明:当初始误码率为3%时,通过一次检错、纠错,误码率降至2.47×10-3,置信度为95%的上限值为2.77×10-3;当初始误码率为0.1%时,通过一次纠错,误码率降至1.43×10-7,置信度为95%的上限值为10.54×10-7。该方法有效地估计了奇偶-汉明纠错码对有限长度原始量子密钥纠错后的误码率,为量子密钥分配后续处理提供了可靠的数据支持。 相似文献
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提出了一种有效实现自动纠错功能FIR数字滤波器技术,该技术采用2种不同架构的标准滤波器通过并行操作来完成。任一滤波器软错误的发生就会引起两个滤波器输出不匹配,达到检测错误的目的,增强了传统滤波器对差错检测和差错纠正的支持。最后对该滤波器地性能进行评估,该滤波器性能良好,纠错率接近100%,可广泛运用在各种信号处理中。 相似文献
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基于置信度判定的循环冗余校验纠错技术 总被引:1,自引:0,他引:1
以S模式下行数据链的检纠错为例,给出了基于置信度判定的循环冗余校验多位纠错技术,实现了突发和随机分布的多位差错的纠正,在不增加冗余码的情况下大大增强了循环冗余校验码的纠错能力. 相似文献
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该文针对Reed-Solomon码纠错算法计算复杂度较高、运算时间较长等问题,提出一种自适应数据逐层分解的Reed-Solomon码的迭代译码纠错方法。首先,接收码通过逐层分解将随机错误或突发错误分散于不同的子序列中,缩小突发或随机错误的查找范围;其次,制定约束规则确定错误数目,同时根据不同的伴随矩阵维数自适应选择迭代求解关键方程的方法,定位子序列中误码的位置;最后,计算正确码字,结束纠错。实验测试表明,该算法在保证不漏检误码的前提下,能够有效简化计算多项式的维数,减少计算量和复杂度,纠错时效优于DFT(Discrete Fourier Transform)算法和BM(Berlekamp-Massey)算法。特别是对2维码数据的纠错测试中,与传统算法相比,该算法纠错时效可提升一个数量级。 相似文献
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在高A/C应答fruit交迭的环境下,可能使ADS—B信号被ADS—B系统接收后。产生一些错误位,从而必须对ADS—B信号进行检错与纠错处理。首先介绍了基于模式S的ADS-B系统的组成原理,给出了置信度判定的基本思想,阐述了循环冗余编码(CRC)校验的基本理论与纠错技术的基本原理;然后在此基础上,提出了一种基于ADS—B系统的纠检错算法,并给出了纠检错算法的信号处理流程图与FPGA逻辑设计方案;最后采用VerilogHDL语言完成了所有功能模块的设计。并联合ISE与ModlSim两个软件进行了仿真验证实验。实验结果表明,该算法能够有效地对ADS。B信号进行检错与纠错。 相似文献
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在各类数字通信系统以及计算机存储和运算系统经常利用差错控制编码降低误码率,提高通信质量,满足对数据传输通道可靠性的要求。RS码是一种性能优良的前向纠错码,具有同时纠正随机错误和突发错误的能力,它的构造特点决定了其非常适合于纠正突发性错误。文中在阐述RS系统码编译码原理的基础上,提出了RS(16,12)缩短码的编译码方法,利用MATLAB对R S(16,12)缩短码在高斯信道和瑞利信道条件下的纠错能力进行仿真,并分析其纠错性能。 相似文献
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The author describes an error correction system for digital subscriber loop transmission systems which use time compression multiplexing (TCM). An interleaved block code is used to correct the burst errors due to impulse noise from analog telephone circuits. This interleaving method requires no extra hardware and contributes no additional delay. To evaluate the transmission performance of this error correction system, the bit error rate after decoding is derived on the basis of a burst error model for 200 kb/s digital subscriber transmission using the alternate mark inversion (AMI) line code. The experimental results for a 200 kb/s TCM system show that burst errors are substantially reduced 相似文献
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As the technology scales down, shrinking geometry and layout dimension, on- chip interconnects are exposed to different noise sources such as crosstalk coupling, supply voltage fluctuation and temperature variation that cause random and burst errors. These errors affect the reliability of the on-chip interconnects. Hence, error correction codes integrated with noise reduction techniques are incorporated to make the on-chip interconnects robust against errors. The proposed error correction code uses triplication error correction scheme as crosstalk avoidance code (CAC) and a parity bit is added to it to enhance the error correction capability. The proposed error correction code corrects all the error patterns of one bit error, two bit errors. The proposed code also corrects 7 out of 10 possible three bit error patterns and detects burst errors of three. Hybrid Automatic Repeat Request (HARQ) system is employed when burst errors of three occurs. The performance of the proposed codec is evaluated for residual flit error rate, codec area, power, delay, average flit latency and link energy consumption. The proposed codec achieves four magnitude order of low residual flit error rate and link energy minimization of over 53 % compared to other existing error correction schemes. Besides the low residual flit error rate, and link energy minimization, the proposed codec also achieves up to 4.2 % less area and up to 6 % less codec power consumption compared to other error correction codes. The less codec area, codec power consumption, low link energy and low residual flit error rate make the proposed code appropriate for on chip interconnection link. 相似文献
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Majority-logic-like decoding is an outer concatenated code decoding technique using the structure of a binary majority logic code. It is shown that it is easy to adapt such a technique to handle the case where the decoder is given an ordered list of two or more prospective candidates for each inner code symbol. Large reductions in failure probability can be achieved. Simulation results are shown for both block and convolutional codes. Punctured convolutional codes allow a convenient flexibility of rate while retaining high decoding power. For example, a (856, 500) terminated convolutional code with an average of 180 random first-choice symbol errors can correct all the errors in a simple manner about 97% of the time, with the aid of second-choice values. A (856, 500) maximum-distance block code could correct only up to 178 errors based on guaranteed correction capability and would be extremely complex 相似文献
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考虑多进制LDPC码的符号特性,以及对其残留错误和删除的分析,本文采用多进制LDPC码作为内码,相同Galois域下的高码率RS码作为外码来构造多进制乘积码;并提出了一种低复杂度的迭代译码方案,减少信息传输的各类错误。在译码时,只对前一次迭代中译码失败的码字执行译码,并对译码正确码字所对应的比特初始概率信息进行修正,增强下一次迭代多进制LDPC译码符号先验信息的准确性,减少内码译码后的判决错误,从而充分利用外码的纠错能力。仿真结果显示,多进制乘积码相较于二进制LDPC乘积码有较大的编码增益,并通过迭代进一步改善了性能,高效纠正了信道中的随机错误和突发删除。对于包含2%突发删除的高斯信道,在误比特率为10-6时,迭代一次有0.4 dB左右的增益。 相似文献
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We present an algorithm to conceal bit errors in still images and image sequences that are coded using the discrete cosine transform (DCT) and variable length codes (VLCs). No modification is necessary to an existing encoder, and no additional bit rate is required. The concealment algorithm is kept simple so that real-time decoding and concealment is possible. A single bit error in these images can cause a block to split into several blocks or several blocks to merge into one. This causes the DCT coefficients of all subsequent blocks to be correctly decoded but stored in the wrong location in the image. Furthermore, the DC coefficient of all subsequent blocks may be incorrect. The error concealment algorithm uses transform domain information to identify the location of the affected blocks and to correct errors. The image quality after error concealment is shown to be significantly improved. 相似文献