一种钠钙硅酸盐玻璃的纳米压痕测试分析

采用纳米压痕测试技术对一种钠钙硅酸盐玻璃进行微观力学性能的测试分析.测得加载-卸载过程载荷与压入深度曲线,发现被测玻璃的最大压深、残余深度和弹性回复量随最大加载力的增加而增大,但其相对弹性回复率系数基本稳定,平均值为58.2%.通过电子显微镜观察了不同最大载荷下的压痕形貌,发现压痕区域出现了边界沉陷现象.当最大加载力为1 000 mN左右时,三棱锥工具头测试的压痕区域出现了较明显的微裂纹;采用四棱锥工具头时出现微裂纹的最大加载力要小于该值,且裂纹取向均与金刚石工具头的棱角取向一致.利用非线性有限元软件MSC.Marc对纳米压痕过程进行了仿真分析,得到载荷与压入深度的仿真曲线,该曲线与试验结果基本相符;分析了载荷作用下材料内部的应力分布.利用Oliver-Pharr模型得到不同压入深度下被测玻璃的接触刚度值,该值随压入深度的增加而增大.     

微纳米尺度单晶铜各向异性纳米力学分析

采用纳米压痕测量仪对<100>、<110>、<111>不同取向的单晶铜进行了微纳米尺度纳米压痕试验,并对其硬度、约化弹性模量及卸载过程形貌等进行了对比分析.结果表明:在微纳米尺度下,不同取向单晶铜硬度值存在明显的尺寸效应,当压入深度小于30 nm时,单晶铜的硬度值随着压入深度的增加而增大,随后随着压入深度的增加而逐渐减小至0.8 GPa左右.<110>取向单晶铜的约化弹性模量值最大,<111>取向次之,<100>取向最小;<100>、<110>、<111>取向单晶铜的卸载表面均出现明显的堆积现象,其中<110>取向单晶铜出现明显的二维对称堆积形貌,<100>取向单晶铜的弹性恢复位移最大,而<110>取向单晶铜的弹性恢复位移最小.     

纳米压痕法测试微纳米涂层的力学性能

采用G200型微/纳米压痕仪,测试了不同微纳米级涂层材料的力学性能。结果表明:使用纳米压痕法能检测和表征微纳米涂层材料的硬度和弹性模量及其随涂层厚度的变化趋势,从而了解涂层的力学性能以及与基体的结合质量情况;纳米压痕法测试涂层力学性能时存在明显的表面效应,一般建议压入深度不小于20μm,以保证表面粗糙度引起的压入深度的不确定度小于5%。     

基于纳米压痕测试的超细晶Si_2N_2O-Si_3N_4陶瓷室温蠕变特性

目的陶瓷材料由于其固有硬脆性,难以利用传统单轴拉伸与压缩实验测试其蠕变性能,而纳米压痕测试技术对试样形状尺寸没有特殊要求,因此利用纳米压痕测试技术研究Si2N2O-Si3N4超细晶陶瓷的室温蠕变性能。方法针对1600,1650,1700℃条件下烧结制备的Si2N2O-Si3N4超细晶陶瓷,采用纳米压痕技术测试材料在最大载荷分别为5000,6000和7000μN条件下的载荷-位移曲线,并通过拟合计算获得了3种材料室温蠕变应力指数。结果 3种材料均呈现明显的加载效应。结论研究表明,在相同载荷下,压入深度和蠕变位移都随着材料烧结温度的升高而增大,且相同材料的蠕变应力指数,随着保压载荷的增大而减小。对比分析发现,在1600℃条件下烧结制备的Si2N2O-Si3N4超细晶陶瓷,晶粒细小均匀,晶界数多,室温下表现出较强的蠕变性能。     

微纳米尺度单晶硅各向异性表面的切削特性

利用纳米压痕仪和原子力显微镜,分别对单晶硅Si(100)、Si(110)、Si(111)三种晶面取向的表面进行微纳米尺度下的切削性能进行了实验研究。实验结果表明:在定载荷下,刻划速度的大小对单晶硅Si(100)、Si(110)晶面取向的切削力、摩擦系数的大小影响较小,但对单晶硅Si(111)晶体取向影响较大;在较低载荷下,单晶硅各晶面取向表面划痕细小,深度较浅且不明显,切削力大小无明显变化规律。随着载荷的逐渐增大,划痕宽度及深度也逐渐增大,切削力也相应增大,但并非呈线性增长。当载荷增大到一定值后,单晶硅各表面发生严重的塑性变形,变形积累一定程度后,沟槽两侧及探针前端形成明显的切屑堆积。     

亚微压入法硬度测量

简要介绍新研制的亚微压入仪(Submicron Indentation Tester)及其主要应用之一;硬度测量.该设备通过测量压痕深度而获得硬度值.其力加载是连续的,能够连续记录载荷压痕深度曲线.其特点是不但可测量材料表面某点亚微层的硬度值,还可在此范围内测量其硬度随层深分布曲线.该设备力加载最大范围:0～200g,力分辨率:≤1mg;压入深度测量范围:0～60μm,分辨率:≤1nm.     

法向载荷对紫铜的微米划痕测试的影响

使用Rockwell C金刚石圆锥压头对紫铜进行微米划痕实验,研究了法向载荷对样品的微米划痕测试的影响。结果表明:随着法向载荷的增大,压入深度和残余深度均线性增加,弹性恢复率线性减小;划痕宽度随压入深度的增加先非线性地增大,之后趋于线性增加。当法向载荷在0.08~0.11N的范围内时,摩擦力线性增大,摩擦系数趋于一个常数,摩擦机制为粘着摩擦;当法向载荷在0.11~17N的范围内时,摩擦力和摩擦系数非线性地增大,摩擦机制为犁沟摩擦;当法向载荷在17~28N的范围内时,摩擦系数趋于一个常数,摩擦力线性增大,摩擦机制为微切削。     

基于EBSD方法测定单晶Cu纳米压痕的各向异性实验

为研究单晶Cu材料的各向异性力学特性,针对单晶连铸技术制备的单晶Cu,采用电子背散射衍射(EBSD)法对其3个不同晶粒的晶面进行定向,利用原位纳米压痕仪在不同晶面进行不同压入载荷的纳米压痕实验.通过EBSD分析,发现用单晶连铸技术制备的单晶Cu在拉拔方向上具有较强的择优取向,单个晶粒较大,且晶粒内部没有(亚)晶界存在.纳米压痕实验结果表明单晶Cu样件在各种压痕载荷下的约化模量为50 GPa～120GPa,材料的晶体取向对纳米压痕载荷-位移曲线和约化模量有很大影响,面(032)比面(119)和面(041)有更大的约化模量.不同载荷下,硬度值在0.8 GPa左右变动,晶体取向对硬度的影响较小.实验所得单晶Cu各晶面约化模量与采用金属弹性力学理论计算所得数值吻合较好.     

微纳米尺度单晶铜各向异性表面切削特性实验研究

利用纳米压痕仪和原子力显微镜对微纳米尺度下单晶铜各向异性表面在不同载荷和刻划速度下的切削特性进行实验研究。结果表明:单晶铜各晶面表面在较低载荷下,划痕细小且不明显。随着载荷的逐渐增大,划痕深度和宽度逐渐变大,并形成明显的沟槽,在沟槽的两侧出现明显的侧流现象,探针前方出现切屑堆积,尤其单晶铜Cu(100)切屑堆积较明显;单晶铜Cu(100)在刻划速度为10μm/s、50μm/s时,切削力无明显变化规律,其余两晶向都是在同等载荷下,刻划速度越大,切削力越大。随着刻划速度的增大,切削力趋于稳定;载荷越大,切削力越大,其相应摩擦系数也增大。     

两种微纳米硬度测试方法的比较

在对材料微纳米硬度测试中,可利用纳米压痕方法得到载荷-位移曲线,并用相关算法得到接触面积和硬度值;也可通过原子力显微镜测出压痕残余面积,由残余面积和最大载荷得到材料的硬度值.利用这两种方法对塑性材料单晶铝和脆性材料单晶硅做微纳米硬度测试试验,经过比较分析,这两种方法各有优势和不足,得到的材料微纳米硬度都有压痕尺寸效应,但第二种方法得到的微纳米硬度尺寸效应比第一种明显.     

超精密车削单晶硅刀具振动频谱分析

为了在线监测单晶硅超精密车削的脆塑转变现象及分析单晶硅车削过程中材料的微纳去除方式,采用圆弧刃金刚石刀具对单晶硅（100）晶面进行了超精密车削,研究了单晶硅超精密车削时刀具振动频谱分布与切削参数的关系,并对刀具振动频谱的变化规律及其演变机理进行了分析.结果表明,刀具振动频谱分布与刀具和单晶硅接触方式、单晶硅微纳去除模式密切相关.当单晶硅的去除模式从脆性域过渡到塑性域时,材料由崩碎状脆性去除方式转变为以剪切滑移变形为主的塑性去除方式,刀具振动频谱高频段信号增多,且振动总能量增大;塑性域车削时,切削速度越小、切削深度越大、进给量越大,材料微观剪切变形区内位错滑移数量越多,刀具振动频谱高频段信号越多,刀具振动主总能量越大.切削速度、进给量、切削深度对刀具振动频谱分布的影响依次减小,采用合理的切削参数,可以降低切削系统的总体振动.     

Evaluation of the strain energy density control volume for a nanoscale singular stress field

Fracture mechanics at micro‐ and nano‐scale has become a very attractive topic in the last years. However, the results are still few, mostly because of the lack of effective analytical tools and of the difficult to conduct experimental tests at those scales. In this study, the authors report preliminary analysis on the application of the Strain Energy Density (SED) method at nano‐scale. In detail, starting from mechanical properties experimentally evaluated on small single crystal silicon cracked specimens, a first evaluation of the control volume due to a nano‐size singular stress field is carried out. If the extension of the SED approach at micro‐ nano‐scale is given in near future, an easy and fast tool to design against fatigue will be provided for micro‐ nano‐devices such as MEMS and NEMS, resulting in a significant technological impact and providing an easy and fast tool to conduct static and fatigue assessment at micro‐ and nano‐scale.     

Compression of nanowires using a flat indenter: diametrical elasticity measurement

A new experimental approach for the characterization of the diametrical elastic modulus of individual nanowires is proposed by implementing a micro/nanoscale diametrical compression test geometry, using a flat punch indenter. A 250 nm diameter single crystal silicon nanowire is compressed inside of a scanning electron microscope. Since silicon is highly anisotropic, the wire crystal orientation in the compression axis is determined by electron backscatter diffraction. In order to analyze the load-displacement compression data, a two-dimensional analytical closed-form solution based on a classical contact model is proposed. The results of the analytical model are compared with those of finite element simulations and to the experimental diametrical compression results and show good agreement.     

The study of highly crystalline ZnSe growth on porous silicon

The objective of this study relates to producing a ZnSe epilayer on porous silicon. In the subsequent process, ZnSe having a direct energy gap of 2.68 eV at room temperature was grown on porous silicon under differing anodization conditions utilizing chemical vapor deposition techniques, resulting in the successful growth of a single crystal ZnSe epilayer on the porous silicon substrate. The characteristics of the epilayer were then analyzed by X-ray diffraction and photoluminescence. The photoluminescence spectrum of the single ZnSe epilayer exhibited good emission properties at 444 nm (2.792 eV), 457 nm (2.718 eV), 478 nm (2.594 eV), and 574 nm (2.16 eV).     

Accelerated resistive humidity sensing properties of silicon nanoporous pillar array

Silicon nanoporous pillar array (Si-NPA), with micro/nanometer composite structure, was prepared by hydrothermally etching single crystal silicon. Resistive humidity sensors were fabricated through evaporating coplanar interdigital aluminium electrodes on Si-NPA and the humidity sensing properties were tested. It was shown that with relative humidity changing from 11.3% to 94.6%, a resistance device response over one order of magnitude with response time less than 1 s was achieved at frequency of 1 kHz. This extraordinary property was mainly attributed to the unique morphology of Si-NPA, i.e., the regular pillar array provided an effective pathway for vapor transportation and the nanoporous structure of the pillars greatly enlarged the sensing areas.     

A Methodology for Accurately Measuring Mechanical Properties on the Micro‐Scale

Abstract: A methodology has been developed for accurately measuring the mechanical properties of materials used on the micro‐scale. The direct tension test method using a dog bone‐type specimen has been employed, as it is the most effective and straightforward method to obtain results including a full stress–strain curve. The goal of this investigation was to develop a universal, yet simple and reliable, methodology to be used for accurate characterisation of mechanical properties for a wide variety of materials. Specimens from single crystal silicon were fabricated using photolithography by means of deep reactive ion etching. This material was chosen as it is expected that on both the micro‐ and macro‐scales, Young's modulus will have the same value. Hence, the accuracy of the methodology may be unambiguously examined. The test set‐up includes a small test machine containing a load cell whose maximum capacity is 5 N and is capable of direct gripping and displacement control. The specimens were found to have a trapezoidal cross‐section that was accurately measured using a scanning electron microscope. The strains were obtained by means of digital image correlation using images obtained via optical microscopy. The quantities measured include Young's modulus E, the fracture strength σ_f and the fracture strain ε_f. The average value of E obtained in the micro‐tests agrees well with the reference value obtained on the macro‐scale.     

带有位移检测功能的纳米级定位平台

为了解决纳米定位平台小型化、定位精度高的问题,采用体硅加工技术成功地研制了一种基于单晶硅的、带有位移检测功能的新型二自由度微型定位平台．介绍了定位平台的工作原理,通过理论计算和有限元模拟相结合的方法实现定位平台的结构设计．提出了一种面内侧壁压阻加工方法,成功地在定位平台上集成了压阻位移检测传感器．实验结果表明,有效驱动电压取23．68V时,定位平台最大单轴输出位移为10gm,运动平台的定位精度优于20nm;室温下压阻传感器的阻值为4．2kΩ,击穿电压为75V,在平台输出位移为10nm时,压阻器件的灵敏度（电阻相对变化）达到了3．6×10^-5,完全满足设计要求.     

Monocrystalline silicon used for integrated circuits: still on the way

With the rapid development of semiconductor technology, highly integrated circuits (ICs) and future nano-scale devices require large diameter and defect-free monocrystalline silicon wafers. The ongoing innovation from silicon materials is one of the driving forces in future micro and nano-technologies. In this work, the recent developments in the controlling of large diameter silicon crystal growth processes, the improvement of material features by co-doping with the intend-introduced impurities, and the progress of defect engineered silicon wafers (epitaxial silicon wafer, strained silicon, silicon on insulator) are reviewed. It is proposed that the silicon manufacturing infrastructure could still meet the increasingly stringent requirements arising from ULSI circuits and will expand Moore’s law into a couple of decades.     

Monocrystalline silicon used for integrated circuits: still on the way

With the rapid development of semiconductor technology, highly integrated circuits (ICs) and future nano-scale devices require large diameter and defect-free monocrystalline silicon wafers. The ongoing innovation from silicon materials is one of the driving forces in future micro and nano-technologies. In this work, the recent developments in the controlling of large diameter silicon crystal growth processes, the improvement of material features by co-doping with the intend-introduced impurities, and the progress of defect engineered silicon wafers (epitaxial silicon wafer, strained silicon, silicon on insulator) are reviewed. It is proposed that the silicon manufacturing infrastructure could still meet the increasingly stringent requirements arising from ULSI circuits and will expand Moore’s law into a couple of decades.     

力平衡式三轴微加速度计的设计与分析

设计了一种具有单一检测质量的力平衡式三轴微加速度计．采用硅-硅键合工艺形成作为单一检测质量块的硅片组合。利用全差分电容检测法实现对加速度三轴分量的检测．通过提高检测质量的重心，有效增加了X、Y轴的灵敏度．利用ANSYS仿真软件对该微加速度计进行了模态及静力学分析，提出了优化设计参数．3个检测模态（1阶、2阶和3阶模态）的频率分别为1．329kHz、1．345kHz和2．174kHz．通过优化设计，提高了3阶模态和4阶模态的频率差距，降低了其他高阶模态的干扰．在100g（g为重力加速度）的Z向加速度作用下，悬臂梁所受的最大应力为46MPa。小于单晶硅的弯曲极限值70-200MPa．静力学分析表明，加速度计的悬臂梁结构参数能够满足加速度计的力学性能要求．