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1.
A four-wavelength quantum-cascade (QC) laser source that operates using a single current channel is presented. The source includes two different heterogeneous cascade QC lasers, one with emission wavelengths of 7.0 $mu{hbox {m}}$ and 11.2 $mu{hbox {m}}$, and the other with 8.7 $mu{hbox {m}}$ and 12.0 $mu{hbox {m}}$ . For 3.0-mm and 3.5-mm cavity lengths, QC lasers with emission wavelengths of 8.7, 11.2, and 12.0 $mu{hbox {m}}$ have threshold current densities within less than a factor of 2, which allows them to be conveniently driven in series by a single current source.   相似文献   

2.
We experimentally demonstrated the enhanced transmission in a fiber-coupled Au stripe waveguide system using a linearly tapered (LT) structure at a telecommunication wavelength of 1.55 $mu{hbox {m}}$. The LT structure consists of two 100- $mu{hbox {m}}$-long tapered regions connecting various widths of input and output waveguides with a waist region. The lowest insertion loss of the 1-cm-long LT-Au stripe waveguide is $sim$4.3 dB, when it has 6-$mu{hbox {m}}$ -wide input and output waveguides and a 4- $mu{hbox {m}}$-wide waist waveguide. The insertion loss is reduced by $sim$ 2 dB compared to the 4-$mu{hbox {m}}$-wide and 1-cm-long straight Au stripe waveguide, which is achieved by decreasing the coupling loss. The losses of the LT region, which has a tapered angle of less than 0.3$^{circ}$ between the input–output waveguides and the waist waveguide, are smaller than 0.4 dB. We showed that the insertion loss of the Au stripe waveguide can be reduced by introducing the LT structure, which can also provide efficient mode conversion.   相似文献   

3.
GaInAsSb–GaSb strained quantum-well (QW) ridge waveguide diode lasers emitting in the wavelength range from 2.51 to 2.72 $ mu{hbox {m}}$ have been grown by molecular beam epitaxy. The devices show ultralow threshold current densities of 44 $hbox{A}/{hbox {cm}}^{2}$ (${L}rightarrow infty $) for a single QW device at 2.51 $ mu{hbox {m}}$, which is the lowest reported value in continuous-wave operation near room temperature (15 $^{circ}hbox{C}$) at this wavelength. The devices have an internal loss of 3 ${hbox {cm}}^{-1}$ and a characteristic temperature of 42 K. By using broader QWs, wavelengths up to 2.72 $mu{hbox {m}}$ could be achieved.   相似文献   

4.
A 17 GHz low-power radio transceiver front-end implemented in a 0.25 $mu{hbox {m}}$ SiGe:C BiCMOS technology is described. Operating at data rates up to 10 Mbit/s with a reduced transceiver turn-on time of 2 $mu{hbox {s}}$, gives an overall energy consumption of 1.75 nJ/bit for the receiver and 1.6 nJ/bit for the transmitter. The measured conversion gain of the receiver chain is 25–30 dB into a 50 $Omega$ load at 10 MHz IF, and noise figure is 12 $pm$0.5 dB across the band from 10 to 200 MHz. The 1-dB compression point at the receiver input is $-$37 dBm and ${hbox{IIP}}_{3}$ is $-$25 dBm. The maximum saturated output power from the on-chip transmit amplifier is $-$1.4 dBm. Power consumption is 17.5 mW in receiver mode, and 16 mW in transmit mode, both operating from a 2.5 V supply. In standby, the transceiver supply current is less than 1 $mu{hbox {A}}$.   相似文献   

5.
We report near-stoichiometric (NS) Ti : LiNbO$_{3}$ waveguides fabricated by indiffusion of 4-, 5-, 6-, 7- $mu{hbox {m}}$-wide 120-nm-thick Ti-strips at 1060 $^{circ}hbox{C}$ for 10 h into a congruent $hbox{LiNbO}_{3}$ (i.e., standard Ti diffusion procedure) and post-vapour-transport-equilibration (VTE) treatment at 1100 $^{circ}hbox{C}$ for 5 h. These waveguides are NS and single-mode at 1.5 $mu{hbox {m}}$, and have a loss of 1.0/0.8 dB/cm for the TM/TE mode. In the width/depth direction of the waveguide, the mode field follows a Gauss/Hermite–Gauss profile, and the Ti profile follows a sum of two error functions/a Gauss function. The post-VTE resulted in increase of diffusion width/depth by 2.0/1.0 $mu{hbox {m}}$. A two-dimensional refractive index profile in the guiding layer is suggested.   相似文献   

6.
This paper presents performances of two-phase cooling of a chip at very high heat flux with refrigerant R236fa in a silicon multimicrochannel heat sink. This heat sink was composed of 134 parallel channels, 67 $mu {hbox {m}}$ wide, 680 $mu {hbox {m}}$ high, and 20 mm long, with 92-$mu {hbox {m}}$ -thick fins separating the channels. The base heat flux was varied from 3 to 255 ${hbox {W/cm}}^{2}$ , the volume flow rate from 0.18 to 0.67 l/min, and the exit vapor quality from 0 to 80%. The working pressure and saturation temperature were set at 273 kPa and 25 $^{circ}{hbox {C}}$, respectively. The present database includes 1040 local heat transfer coefficients. The base temperature of the chip could be maintained below 52 $^{circ}{hbox {C}}$ while dissipating 255 ${hbox {W/cm}}^{2}$ with 10 $~^circ{hbox {C}}$ of inlet subcooling and 90 kPa of pressure drop. A comparison of the respective performances with an extrapolation of the present results shows that two-phase cooling should be able to cool the chip 13 K lower than liquid cooling for the same pumping power at a base heat flux of 350 ${hbox {W/cm}}^{2}$.   相似文献   

7.
An equiangular spiral photonic crystal fiber (ES-PCF) design in soft glass is presented that has high nonlinearity ( $gamma>5250 hbox{W}^{-1}cdothbox{km}^{-1}$ at 1064 nm and $gamma>2150 hbox{W}^{-1}cdothbox{km}^{-1}$ at 1550 nm) with a low and flat dispersion (${D}sim {hbox {0.8}} hbox{ps/km}cdothbox{nm}$ and dispersion slope $sim-0.7 hbox{ps/km}cdothbox{nm}^{2}$ at 1060 nm). The design inspired by nature is characterized by a full-vectorial finite element method. The ES-PCF presented improves over the mode confinement of triangular core designs and dispersion control of conventional hexagonal PCF, combining the advantages of both designs; it can be an excellent candidate for generating supercontinuum pumped at 1.06 $mu{hbox {m}}$.   相似文献   

8.
Broadband Micro-Coaxial Wilkinson Dividers   总被引:1,自引:0,他引:1  
This paper presents several micro-coaxial broadband 2 : 1 Wilkinson power dividers operating from 2 to 22 GHz, a 11 : 1 bandwidth. Circuits are fabricated on silicon with PolyStrata technology, and are implemented with 650 $mu{hbox{m}}times$ 400 $mu{hbox{m}}$ air-supported micro-coaxial lines. The measured isolation between the output ports is greater than 11 dB and the return loss at each port is more than 13 dB over the entire bandwidth. The footprints of these dividers can be miniaturized due to the high isolation between adjacent coaxial lines and their tight bend radius. For higher power handling, larger lines with a cross section of 1050 $ mu{hbox{m}}times$ 850 $ mu{hbox{m}}$ are also demonstrated. The effect of mismatch at the output ports is investigated in order to find the power loss in the resistors.   相似文献   

9.
In this paper, we describe how to use Si/SiGe superlattice microcoolers to cool the target hot spots and how a trench structure could enhance its cooling performance. The microcooler chip is gold fusion bonded with a 65 $mu{hbox {m}}$ -thick silicon chip, where heaters are fabricated on the opposite of fusion bonding layer to simulate the hot spots. Our 3-D electrothermal simulations showed that with a trench structure, the maximum cooling and cooling power density could be doubled at hot spot region. Our experimental prototype also demonstrated a maximum cooling of ${sim 2}~^{circ} {hbox {C}}$ reduction at hot spot or a maximum cooling power density of 110 $~{hbox {W/cm}}^{2}$ with trench structure as compared with the 0.8 $^{circ}{hbox {C}}$ cooling without trench structure. This two-chip bonded configuration will allow the integration of spot coolers and ICs without impact on microelectronics processing process. It could be a potential on-chip hot spot cooling solution.   相似文献   

10.
Design and implementation of a millimeter-wave dual-band frequency synthesizer, operating in the 24 GHz and 77 GHz bands, are presented. All circuits except the voltage controlled oscillators are shared between the two bands. A multi-functional injection-locked circuit is used after the oscillators to simplify the reconfiguration of the division ratio inside the phase-locked loop. The 1 mm $, times , $0.8 mm synthesizer chip is fabricated in a 0.18 $mu{hbox{m}}$ silicon-germanium BiCMOS technology, featuring 0.15 $mu{hbox{m}}$ emitter-width heterojunction bipolar transistors. Measurements of the prototype demonstrate a locking range of 23.8–26.95 GHz/75.67–78.5 GHz in the 24/77 GHz modes, with a low power consumption of 50/75 mW from a 2.5 V supply. The closed-loop phase noise at 1 MHz offset from the carrier is less than ${- }$ 100$~$dBc/Hz in both bands. The frequency synthesizer is suitable for integration in direct-conversion transceivers for K/W-band automotive radars and heterodyne receivers for 94$~$GHz imaging applications.   相似文献   

11.
This paper describes a system architecture and CMOS implementation that leverages the inherently high mechanical quality factor (Q) of a MEMS gyroscope to improve performance. The proposed time domain scheme utilizes the often-ignored residual quadrature error in a gyroscope to achieve, and maintain, perfect mode-matching (i.e., $sim$0 Hz split between the high-Q drive and sense mode frequencies), as well as electronically control the sensor bandwidth. A CMOS IC and control algorithm have been interfaced with a 60 $mu{hbox {m}}$ thick silicon mode-matched tuning fork gyroscope $({rm M}^{2}mathchar"707B {rm TFG})$ to implement an angular rate sensing microsystem with a bias drift of 0.16$^{circ}/{hbox{hr}}$. The proposed technique allows microsystem reconfigurability—the sensor can be operated in a conventional low-pass mode for larger bandwidth, or in matched mode for low-noise. The maximum achieved sensor Q is 36,000 and the bandwidth of the microsensor can be varied between 1 to 10 Hz by electronic control of the mechanical frequencies. The maximum scale factor of the gyroscope is 88 ${hbox{mV}}/^{circ}/{hbox{s}}$ . The 3$~$ V IC is fabricated in a standard 0.6 $ mu{hbox {m}}$ CMOS process and consumes 6 mW of power with a die area of 2.25 ${hbox {mm}}^{2}$.   相似文献   

12.
This paper presents an on-chip characterization method for random variation in minimum sized devices in nanometer technologies, using a sense amplifier-based test circuit. Instead of analog current measurements required in conventional techniques, the presented circuit operates using digital voltage measurements. Simulations of the test structure using predictive 70 nm and hardware based 0.13 $mu{hbox{m}}$ CMOS technologies show good accuracy (error $sim ,$5%–10%) in the prediction of random variation even in the presence of systematic variations. A test chip is fabricated in 0.13 $mu{hbox{m}}$ bulk CMOS technology and measured to demonstrate the operation of the test structure.   相似文献   

13.
This paper presents the design and the characterization of a CMOS avalanche photodiode (APD) working as an optoelectronic mixer. The $hbox{P}^{+}hbox{N}$ photodiode has been implemented in a commercial 0.35-$muhbox{m}$ CMOS technology after optimization with SILVACO. The surface of the active region is $ hbox{3.78} cdot hbox{10}^{-3} hbox{cm}^{2}$. An efficient guard-ring structure has been created using the lateral diffusion of two n-well regions separated by a gap of 1.2 $mu hbox{m}$. When biased at $-$2 V, the best responsitivity $S_{lambda ,{rm APD}} = hbox{0.11} hbox{A/W}$ is obtained at $lambda = hbox{500} hbox{nm}$. This value can easily be improved by using an antireflection coating. At $lambda = hbox{472} hbox{nm}$, the internal gain is about 75 at $-$6 V and 157 at $-$7 V. When biased at $-$6 V, the APD achieves a dark current of 128 $muhbox{A} cdot hbox{mm}^{-2}$ and an excess noise factor $F = hbox{20}$ . Then, the APD is successfully used as an optoelectronic mixer to improve the signal-to-noise ratio of a low-voltage embedded phase-shift laser rangefinder.   相似文献   

14.
A four-element phased-array front-end receiver based on 4-bit RF phase shifters is demonstrated in a standard 0.18- $mu{{hbox{m}}}$ SiGe BiCMOS technology for $Q$-band (30–50 GHz) satellite communications and radar applications. The phased-array receiver uses a corporate-feed approach with on-chip Wilkinson power combiners, and shows a power gain of 10.4 dB with an ${rm IIP}_{3}$ of $-$13.8 dBm per element at 38.5 GHz and a 3-dB gain bandwidth of 32.8–44 GHz. The rms gain and phase errors are $leq$1.2 dB and $leq {hbox{8.7}}^{circ}$ for all 4-bit phase states at 30–50 GHz. The beamformer also results in $leq$ 0.4 dB of rms gain mismatch and $leq {hbox{2}}^{circ}$ of rms phase mismatch between the four channels. The channel-to-channel isolation is better than $-$35 dB at 30–50 GHz. The chip consumes 118 mA from a 5-V supply voltage and overall chip size is ${hbox{1.4}}times {hbox{1.7}} {{hbox{mm}}}^{2}$ including all pads and CMOS control electronics.   相似文献   

15.
In this paper, an integrated adaptive-output switching converter is proposed. The design employs a one-cycle control for fast line regulation and a single outer loop for tight load regulation and fine tuning. A switched-capacitor integrator is introduced to the one-cycle control to obtain positive integration with a single positive power supply, allowing a standard low-cost CMOS fabrication process. To improve the efficiency, a dynamic loss control technique is presented. The converter was designed and fabricated with 0.35 $mu{hbox{m}}$ N-well CMOS process. With a supply voltage of 3 V, a voltage ripple of less than $pm$20 mV is measured. The maximum efficiency is 92% with a load power of 475 mW. The converter exhibits a tracking speed of 23.75 $mu{hbox{s/V}}$ for both start-up and reference voltage transitions. The recovery time for a 20% load change is approximately 9.5 $mu{hbox{s}}$.   相似文献   

16.
Cascading of active regions in InAs–GaSb superlattice light-emitting diodes (LEDs) grown by molecular beam epitaxy is demonstrated as an effective means of increasing optical emission. Devices were fabricated into $120times 120 mu{hbox {m}}^{2}$ mesas to demonstrate suitability for high resolution projection systems. Devices with 1, 4, 8, and 16 stages were designed for midwave infrared emission at 3.8 $mu{hbox {m}}$ operating at 77 K, and quasi-continuous-wave output powers in excess of 900 $mu{rm W}$ from a 16-stage LED have been demonstrated. External quantum efficiency is shown to improve substantially with cascading, approaching 10% for a 16-stage device.   相似文献   

17.
A dual-branch 1.8 V to 3.3 V regulated switched-capacitor voltage doubler with an embedded low dropout regulator is presented. For the power stage, the power switches are individually controlled by their phase signals using a phase-delayed gate drive scheme, and are turned on and off in proper sequence to eliminate both short-circuit and reversion currents during phase transitions. For the regulator, the two branches operate in an interleaving fashion to achieve continuous output regulation with small output ripple voltage. Dual-loop feedback capacitor multiplier is adopted for loop compensation and a P-switch super source follower with high current sinking capability is inserted to drive switching capacitive load, and push the pole at the gate of the output power transistor to high frequency for better stability. The regulated doubler has been fabricated in a 0.35 $mu{hbox {m}}$ CMOS process. It operates at a switching frequency of 500 kHz with an output capacitor of 2 $muhbox{F}$ , and the maximum output voltage ripple is only 10 mV for a load current that ranges from 10 mA to 180 mA. The load regulation is 0.0043%/mA, and the load transient is 7.5 $mu{hbox {s}}$ for a load change of 160 mA to 10 mA, and 25 $mu{hbox {s}}$ for a load change of 10 mA to 160 mA.   相似文献   

18.
We study the breakdown characteristics and timing statistics of InP and $hbox{In}_{0.52}hbox{Al}_{0.48}hbox{As}$ single-photon avalanche photodiodes (SPADs) with avalanche widths ranging from 0.2 to 1.0 $mu{hbox {m}}$ at room temperature using a random ionization path-length model. Our results show that, for a given avalanche width, the breakdown probability of $hbox{In}_{0.52}hbox{Al}_{0.48}hbox{As}$ SPADs increases faster with overbias than InP SPADs. When we compared their timing statistics, we observed that, for a given breakdown probability, InP requires a shorter time to reach breakdown and exhibits a smaller timing jitter than $hbox{In}_{0.52}hbox{Al}_{0.48}hbox{As}$ . However, due to the lower dark count probability and faster rise in breakdown probability with overbias, $hbox{In}_{0.52}hbox{Al}_{0.48}hbox{As}$ SPADs with $hbox{avalanche} hbox{widths}leq 0.5 mu{hbox {m}}$ are more suitable for single-photon detection at telecommunication wavelengths than InP SPADs. Moreover, we predict that, in InP SPADs with $hbox{avalanche} hbox{widths}leq 0.3 mu{hbox {m}}$ and $hbox{In}_{0.52}hbox{Al}_{0.48}hbox{As}$ SPADs with $hbox{avalanche} hbox{widths}leq 0.2 mu{hbox {m}}$, the dark count probability is higher than the photon count probability for all applied biases.   相似文献   

19.
This paper reports on the interfacial reactions and lifetime of electroless Ni-P coatings in contact with molten Sn-Bi based solders. A layer of approximately 4 $mu{hbox{m}}$ thick electroless Ni-P in contact with the molten Sn-58Bi solder began to fail at 48 h at temperatures between 200 $^{circ}{hbox{C}}$ and 240 $^{circ}{hbox{C}}$ . Elemental additions to modify the solder, included 1–2wt.% of Al, Cr, Si, Zn, Ag, Au, Ru, Ti, Pt, Nb, and Cu. Of these, only Cu modified the interfacial intermetallic compound growth from ${hbox{Ni}}_{3}{hbox{Sn}}_{4}$ to $({hbox{Cu,Ni}})_{6}{hbox{Sn}}_{5}$ , resulting in significantly decreased consumption rates of the Ni-P substrate in contact with the molten solder and increasing the lifetime of the Ni-P layer to between 430 and 716 h. Micro cracks were observed in all but the thinnest Ni-P layers, allowing the solder to penetrate.   相似文献   

20.
A Multi-Path Gated Ring Oscillator TDC With First-Order Noise Shaping   总被引:3,自引:0,他引:3  
An 11-bit, 50-MS/s time-to-digital converter (TDC) using a multipath gated ring oscillator with 6 ps of effective delay per stage demonstrates 1st-order noise shaping. At frequencies below 1 MHz, the TDC error integrates to 80 fs (rms) for a dynamic range of 95 dB with no calibration required. The $hbox{157}times, hbox{258} mu{hbox {m}}$ TDC is realized in 0.13 $mu{hbox {m}}$ CMOS and, depending on the time difference between input edges, consumes 2.2 to 21 mA from a 1.5$~$ V supply.   相似文献   

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