Analog circuits optimization based on evolutionary computation techniques

This paper presents a new design automation tool, based on a modified genetic algorithm kernel, in order to improve efficiency on the analog IC design cycle. The proposed approach combines a robust optimization with corner analysis, machine learning techniques and distributed processing capability able to deal with multi-objective and constrained optimization problems. The resulting optimization tool and the improvement in design productivity is demonstrated for the design of CMOS operational amplifiers.     

Analog circuit design space description based on ordered clustering of feature uniqueness and similarity

This paper presents a symbolic technique to create ordered feature clustering schemes that express the main similarities and differences between analog circuits. Four separation scores, based on entropy, item characteristics, category characteristics, and Bayesian classifiers, were studied to produce clustering schemes that offer insight about the uniqueness and importance of specific design features in setting AC performance as well as the limiting factors of the designs. The experiments consider a set of 50 state-of-the-art amplifier circuits. The paper offers a detailed discussion on using the insight obtained from circuit feature clustering for topology synthesis and refinement.     

A new hybrid algorithm for analog ICs optimization based on the shrinking circles technique

This paper presents a novel technique named the Shrinking Circles to enhance the performance of optimization algorithms embedded in automated sizing tools of analog ICs. This technique creates a balance between the exploration and exploitation capabilities when the optimization algorithm is converging to a possible optimum point. With the help of the shrinking circles concept, we upgrade a hybridization version of Gravitational Search Algorithm with Particle Swarm Optimization (Advanced GSA_PSO). Accordingly, a developed tool for the automation of analog ICs sizing is proposed. The performance of this tool is evaluated by two cases: minimizing the power consumption of a two-stage CMOS op-amp and simultaneous minimizing the circuit area and power consumption of a folded-cascode op-amp. In this paper, the corners analysis is also incorporated into the proposed circuit sizing tool based on a straightforward procedure by which this tool not only can obtain the solutions being robust against process, voltage, and temperature (PVT) variations, but also it alleviates the computational burden. Comparisons with available methods show that the proposed tool performs much better in terms of efficiency.     

基于几何规划的模拟器件建模与电路性能优化

基于分段线性函数,提出一种新的对模拟器件进行建模的方法,并提出乐观、悲观两种数据拟合算法,两种算法均能较好地拟合MOS管参数。模型建立之后,利用几何规划对电路性能进行优化。乐观算法会得到较好的电路性能,但可能不满足约束条件;悲观算法能够严格满足约束条件,但是得到的电路性能未必最优。在此基础上,提出一种基于响应曲面方法的折衷优化算法,能够得到综合考虑电路性能和约束条件的电路设计参数。最后,以两级放大器为优化实例,证明该方法的有效性。     

ISGP: Iterative sequential geometric programming for precise and robust CMOS analog circuit sizing

In this paper, a fast yet accurate CMOS analog circuit sizing method, referred to as Iterative Sequential Geometric Programming (ISGP), has been proposed. In this methodology, a correction factor has been introduced for each parameter of the geometric programming (GP) compatible device and performance model. These correction factors are updated using a SPICE simulation after every iteration of a sequential geometric programming (SGP) optimization. The proposed methodology takes advantage of SGP based optimization, namely, fast convergence and effectively optimum design and at the same time it uses SPICE simulation to fine tune the design point by rectifying inaccuracy that may exists in the GP compatible device and performance models. In addition, the ISGP considers the requirement of common centroid layout and yield aware design centering for robust final design point specifying the number of fingers and finger widths for each transistor which makes the design point ready for layout.     

基于二叉树的CVSL电路优化方法

CVSL电路不同于互补CMOS逻辑那样具有固定的构成规则,对于复杂逻辑,若不对电路进行优化,则电路速度、版图面积、功耗等性能指标均会受到影响。因此用一种方法有规律的来完成CVSL电路结构的设计显得十分重要,传统的卡诺图化简法步骤过多,结构不够直观,针对这一缺陷,提出了用二叉树代替传统的卡诺图法的设计思路,从而使CVSL电路结构得到优化。分析结果表明,二叉树优化法较卡诺图法可使电路获得了更加高效的设计结果。     

Simulation-based analog and RF circuit synthesis using a modified evolutionary strategies algorithm

This paper presents a simulation-based analog circuit synthesis methodology. Simulation-based approach is preferred so that the synthesizer, SACSES, is topology independent and requires minimal user effort. We argue that both the simulator and the search algorithm have to be optimized for analog circuit synthesis. In this regard, instead of using a commercially available simulator, an accelerated simulator, SPASE, is implemented. Various acceleration mechanisms for DC, AC and noise simulation are discussed. For example, it is shown that taking the previous DC solution as the starting point of the next DC analysis more than halves the number of iteration required for convergence. A modified version of self-adaptive evolutionary strategies, which incorporates the Metropolis criterion in the selection mechanism, is used as the search algorithm. Smooth penalty mechanisms for biasing constraints are proposed and embedded in the algorithm. Usefulness of the tool is validated by three synthesis examples.     

基于跨导运算放大器的可重构模拟电路及应用设计

常规的粗粒度可重构模拟电路灵活性不高,而且可重构模拟单元(CAB)结构较为复杂。针对此类问题,该文改进并设计了一种新的基于OTA的可重构模拟电路。该电路设计方案降低了CAB的复杂度,提高了CAB的使用效率。该文方法的有效性通过3个模拟设计实例(二阶低通滤波器、高通滤波器和三阶巴特沃思低通滤波器)的设计加以验证。实验结果表明,所提出的方法正确有效,可以较好地兼顾CAB资源与所要求功能的平衡。     

Analog circuit optimization using adjoint network based sensitivity analysis

Performance optimization as per the desired specifications is a major requirement of analog and mixed signal circuit design process. Rapid scaling of the semiconductor technology demands efficient optimization techniques with minimal manual efforts. In this paper, a gradient based method for analog circuit optimization using adjoint network based sensitivity analysis is presented. The sensitivity of circuit response with respect to the different parameters is computed by using analog circuit and its adjoint transformation. The proposed method is applied to optimize performance of a two stage operational amplifier (OpAmp). Subsequently, the OpAmp circuit is simulated using Cadence Virtuoso for optimized parameters and the results are validated with post fabrication measurement results.     

Co-AGSA: An efficient self-adaptive approach for constrained optimization of analog IC based on the shrinking circles technique

This paper aims to take a step forward to enhance the performance of the optimization kernel of electronic design automation (EDA) tools by coping with the existing challenges in the analog circuit sizing problems. For this purpose, a novel co-evolutionary-based optimization approach, called Co-AGSA, is proposed. In the Co-AGSA, a self-adaptive penalty technique based on the concept of the co-evolution model is incorporated into a powerful optimization algorithm, named advanced gravitational search algorithm (AGSA), to efficiently solve more realistic constrained optimization problems. The performance of the Co-AGSA approach is first evaluated by solving three constrained engineering design problems. Then, the optimization capability of the Co-AGSA-based IC sizing tool is validated using three different case studies, i.e., a two-stage op-amp, a folded-cascode op-amp and a two-stage telescopic cascode amplifier, to show the applicability of the proposed approach. The results demonstrate that the Co-AGSA gives better performance compared to other approaches in terms of efficiency, accuracy and robustness.     

Raphael-深亚微米集成互连参数仿真优化系统

针对超深亚微米层次下的金属互连设计,使用Raphael(集成布线互连)仿真系统完成了互连寄生效应参数的提取。介绍了Raphael仿真系统的主要功能及基本应用,并分析了常规集成布线互连参数模型。采用二层跨越式互连结构,对寄生电阻、电容参数进行了仿真,并得到电流密度的分布结果。这些参数的提取及验证对电路的布局设计是十分重要的。     

基于Proteus的电子电路设计探究

电子电路设计的一个重要环节,就包括电路功能实验调试,在具体设计中为了达到简化电路设计进程及缩短电路设计周期的目的,文章在设计分析典型函数信号发生器,四路彩灯（数字电视）和数显直流稳压电源时,使用了Proteus软件。进行分析设计之后得出,将Proteus运用在电子工程设计领域中的电子电路设计,能够达到省时省力省财目标的同时,还能够达到降低设计成本和提高设计效率的最终目标。     

PCS粒度反演中基于差分算法的正则参数优化

正则参数的选择是Tikhonov正则化法光子相关光谱(PCS)粒度反演的关键.为了获取最优正则参数,基于Morozov偏差原理正则参数选择策略,提出利用差分算法对正则参数进行优化,从正则参数的一个解集开始,按着差分变异、交叉和选择3种规则不断迭代,并根据每个解的目标函数值进行优胜劣汰,从而引导搜索过程逐渐逼近最优解.分...     

Design optimization of double-acting hybrid magnetic thrust bearings with control integration using multi-objective evolutionary algorithms

Integration of the geometric and control designs in conjunction with the optimization is the current trend in mechatronic products. In the present work, an optimal design methodology of double-acting hybrid active magnetic thrust bearings has been proposed. Double-acting actuators and controller are optimized as a unified system. Conventionally, in control of rotors in the axial direction using double-acting magnetic bearings, two identical bearings are used. However, in the present design two different bearing geometries with different operating parameters have been considered. Minimization of the powerloss, the weight, the control input and dynamic performance indices and maximization of the load capacity have been considered as objectives. The design considers the 10 geometric, two electrical, and two control design parameters. The constraints are classified into three categories, namely the geometric, electrical, and control constraints. Real coded genetic algorithm has been implemented to carry out the constrained multi-objective optimization of the present problem. The convergence and Pareto-front spaces are studied by using different populations of sizes run for different generations. Some of the convergence criterions have been observed for actuator–controller systems. Designs which are nearest to the utopia point in Pareto-front fronts are compared. Air gaps, bias currents, and lengths of permanent magnets are observed to be consistently different for individual actuators of the double-acting bearing. Performance parameters of double-acting actuators and the controller of the magnetic bearing for different choices have been presented.     

基于PCA-LVQ的模拟电路故障诊断

为了解决模拟电路故障难于识别的问题,提出一种基于主成分分析(PCA)和学习矢量量化神经网络(LVQ)的模拟电路故障诊断新方法。该方法用PCA提取模拟电路故障特征,然后将降维后的故障特征信息输入LVQ网络训练和故障模式的分类识别。通过对Sallen-Key带通滤波器电路的故障诊断实例表明,该方法是有效的,具有较高的故障诊断率。     

基于ε等级约束差分进化的多径估计算法

本文针对基于扩展Kalman滤波（EKF）的多径估计算法需要对非线性观测方程进行线性化.对初值比较敏感,造成估计性能下降的问题,提出了基于智能优化的多径估计算法.该算法将估计误差的二阶矩作为目标函数,将瞬时误差作为约束条件,同时考虑多径参数的先验信息,实现了将多径估计问题转化为具有约束条件的优化问题.然后,利用一种智能优化算法来解决该优化问题.本文采用了ε等级约束差分进化（εCRDE）算法来解决有约束条件的优化问题,并对该算法进行改进,使改进后的εCRDE算法可以实现多径参数的迭代估计.仿真结果表明,与EKF算法相比,在单一多径和2路多径情况下,基于改进εCRDE的多径估计算法都具有更好的估计性能.     

谱分析方法的混合电路BIST

SoC芯片内对于混合信号电路测试有着举足轻重的作用.本文介绍了一种通过谱密度分析方法的混合电路内建自测试.此方法通过使用噪声源与比较器数字量化得到被测信号的频谱特性.它的主要特点是电路简单、抗干扰性能强和多点插入多路并行采集,不需要多位AD转换器和多路选择开关.此方法基本上是全数字式的,采用一位量化,数据处理速度快,能满足给定条件下的实时处理要求;并可利用系统内已有的资源,适应于SoC环境.本文给出了系统实现的详细结构和一个测试锁相环电路的测试仿真实例,验证了谱分析方法的测试有效性.     

Soft Fault Diagnosis of Analog Circuit Based on Particle Swarm Optimization

A single soft fault diagnosis method for analog circuit with tolerance based on particle swarm optimization （PSO） is proposed. The parameter deviation of circuit elements is defined as the element of particle. Node-voltage incremental equations based on the sensitivity analysis are built as constraints of a linear programming （LP） equation. Through inducing the penalty coefficient, the LP equation is set as the fitness function for the PSO program. After evaluating the best position of particles, the position of the optimal particle states whether the actual parameter is within tolerance range or not. Simulation result shows the effectiveness of the method.     

基于蚁群支持向量机的模拟电路故障诊断

针对人为选择支持向量机参数的随机性和盲目性,将蚁群算法的全局收敛和并行计算的特点引入到支持向量机参数的优化中,建立了基于蚁群算法优化支持向量机参数的模型,使两种算法的优点有机结合,通过对支持向量机的惩罚因子和核函数参数进行优化,使支持向量机分类效果达到最好,并与遗传支持向量机模型比较,结果表明:蚁群算法优化支持向量机参...