14.2 W/mm internally-matched AlGaN/GaN HEMT for X-band applications

High-performance X-band AlGaN/GaN high electron mobility transistor (HEMT) has been achieved by Γ-gate process in combination with source-connected field plate. Both its Schottky breakdown voltage and pinch-off breakdown voltage are higher than 100 V. Beside, excellent superimposition of direct current (DC) I-V characteristics in different V_ds sweep range indicates that our GaN HEMT device is almost current collapse free. As a result, both outstanding breakdown characteristics and reduction of current collapse effect guarantee high microwave power performances. Based upon it, we have developed an internally-matched GaN HEMT amplifier with single chip of 2.5 mm gate periphery, which exhibits power density of 14.2 W/mm with 45.5 dBm (35.5 W) output power and a power added efficiency (PAE) of 48% under V_ds = 48 V pulse operating condition at 8 GHz. To the best of our knowledge, it is the highest power density at this power level.     

A 2.4 GHz high output power and high efficiency power amplifier operating at inductive breakdown in CMOS technology

In this paper, a novel CMOS power amplifier (PA) with high output power and power added efficiency is designed to operate in the avalanche region by increasing the supply voltage for the first time. With the X-parameter measurement based poly-harmonic distortion (PHD) behavioral model including the X^S and X^T terms, the simulation results can reveal accurate large signal characteristics of the whole PA at breakdown. The output power at 1-dB compression point of 30.2 dBm with 34.1% PAE at 2.4 GHz is obtained.     

Design and fabrication of 94 GHz MMIC single balanced resistive mixer without IF balun

In this paper, a 94 GHz microwave monolithic integrated circuit (MMIC) single balanced resistive mixer affording high LO-to-RF isolation was designed without an IF balun. The single balanced resistive mixer, which does not require an external IF balun, was designed using a 0.1 μm InGaAs/InAlAs/GaAs metamorphic high electron mobility transistor (HEMT). The designed MMIC single balanced resistive mixer was fabricated using the 0.1 μm MHEMT MMIC process. From the measurement, conversion loss of the single balanced resistive mixer was 14.7 dB at an LO power of 10 dBm. The P_1 dB (1 dB compression point) values of the input and output were 10 dBm and −5.3 dBm, respectively. The LO-to-RF isolation of the single balanced resistive mixer was −35.2 dB at 94.03 GHz. The single balanced resistive mixer in this work provided high LO-to-RF isolation without an IF balun.     

A 77 GHz FMCW radar transmitter with reconfigurable power amplifier in 65 nm CMOS

A frequency modulated continuous-wave (FMCW) radar transmitter in 65 nm CMOS is presented. The transmitter consists of one FMCW signal generator, one reconfigurable power amplifier and bias circuits. FMCW chirp signal comes from a sigma-delta modulated fractional-N phase-locked loop (PLL) with an integrated digital triangle-wave generator to control the output division-ratio of the sigma-delta modulator. A four-way power combining power amplifier is employed to improve the output power with a reconfigurable output power to satisfy different detection distance requirements. The measured results show that the chirp bandwidth achieves 2 GHz, from 76 GHz to 78 GHz, and the power amplifier achieves 13.1 dBm output P1dB with 8.1% PAE. The power amplifier and FMCW signal generator consume 228 mW and 56 mW power, respectively, with a 1.0 V power supply. The core die area is only 2.6×0.88 mm².     

An 863-870 MHz spread-spectrum FSK transceiver design for wireless sensor

Simulation results of a 863-870 MHz frequency-hopped spread-spectrum (FHSS) transceiver with binary frequency shift keying (BFSK) modulation at 20 kb/s for wireless sensor applications is presented.The transmit/receive RF front end contains a BFSK modulator, an upconversion mixer, a power amplifier (PA), and an 863-870 MHz band pass filter (BPF) at the transmitter side and a low-noise amplifier with down conversion mixer to zero-IF, a low-pass channel-select filter, a limiter and a BFSK demodulator at the receiver side. The various block parameters of the transmit/receive RF front end like noise figure (NF), gain, 1 dB compression point (P-1 dB), and IIP3 are simulated and optimized to meet low power and low cost transceiver specifications.The transmitter simulations show an output ACPR (adjacent channel power ratio) of −22 dBc, 3.3 dBm P-1 dB of PA, and transmitted power of 0 dBm. The receiver simulations show 51.1 dB conversion gain, −7 dBm IIP3, −15 dB return loss (S11), and 10 dB NF. Low power arctangent-differentiated BFSK demodulator has been chosen and the BER performance has been co simulated with the analog receiver. The complete receiver achieves a BER of 10⁻³ at 10.5 dB of EbtoNo. The transceiver simulations show an RMS frequency error of 1.45 kHz.     

A 1.25 Gbps DC-coupled laser diode driver with VBE compensation technique

A 1.25 Gbps integrated laser diode driver (LDD) driving an edge-emitting laser has been designed and fabricated in 0.35 μm BiCMOS technology. The IC can provide independent bias current (5-100 mA) with automatic power control, and modulation current (4-85 mA) with temperature compensation adjustments to minimize the variation in extinction ratio. This paper proposed an unique modulation output driver configuration which is capable of DC-coupling a laser to the driver at +3.3 V supply voltage; and combined a V_BE compensation circuit, the IC can operate at a wide temperature range (−40 to 85 °C) for date rates up to 1.25 Gbps. V_BE compensation technique is used to compensate for variation in V_BE over the operating temperature range so as to minimize the variations in rise and fall time of modulation output over temperatures.     

5–11 GHz CMOS PA with 158.9 ± 41 ps group delay and low power using current-reused technique

This paper proposes the design of a low group delay and low power ultra-wideband (UWB) power amplifier (PA) in 0.18 μm CMOS technology. The PA design employs two stages cascade with inductive peaking technique to provide broad bandwidth characteristic and higher gain while gain flatness can be achieved by connecting inter-stage circuit. A common gate current-reused technique is adopted at the first stage amplifier to achieve good input matching, low group delay and low power. The simulation results show that the proposed PA design has an average gain of 11.5 dB with flatness of ±0.4 dB from 5–11 GHz, while maintaining bandwidth of 4.2–12.3 GHz. An input return loss (S₁₁) less than −10.4 dB and output return loss (S₂₂) less than −9.5 dB, respectively are obtained. The PA design achieves excellent phase linearity (i.e., group delay variation) of ±41 ps and only consuming 17 mW power from 1.2 V supply voltage. A good output 1-dB compression point OP1 dB of 3.7 dBm is obtained. By using this method, the proposed design has low group delay variation and lowest power among the recently reported UWB CMOS PAs applications.     

A 33 mW 12.5 Gbps BiCMOS transmitter for high speed backplane applications

This paper describes a 12.5 Gbps voltage mode transmitter with a high speed signal conditioning capability. Using a linear equalizer that is followed by a power efficient output stage, the transmitter achieves pre-emphasis at very low power consumption. In measurements, the transmitter can reliably transmit a 12.5 Gbps PRBS7 signal through a lossy 14 in. FR4 stripline commonly used in backplanes. It achieves a peak to peak jitter of 24 ps, a differential eye opening amplitude of 120 mV, and a maximum common mode ripple of 40 mV. The proposed topology consumes 33 mW at-speed power which includes both the output stage and the linear equalizer. It also passes 8KV HBM ESD testing without compromising the high speed capability. The transmitter is fabricated in a 130 nm BiCMOS technology with 100 GHz maximum f_t and packaged in a commercial leadless leadframe package.     

Frequency and temperature dependent dielectric properties of Al/Si3N4/p-Si(1 0 0) MIS structure

The dielectric properties of Al/Si₃N₄/p-Si(1 0 0) MIS structure were studied from the C-V and G-V measurements in the frequency range of 1 kHz to 1 MHz and temperature range of 80-300 K. Experimental results shows that the ε′ and ε″ are found to decrease with increasing frequency while the value of ε′ and ε″ increase with increasing temperature, especially, above 160 K. As typical values, the dielectric constant ε′ and dielectric loss ε″ have the values of 7.49, 1.03 at 1 kHz, and only 0.9, 0.02 at 1 MHz, respectively. The ac electrical conductivity (σ_ac) increases with both increasing frequency and temperature. The activation energy of 24 meV was calculated from Arrhenius plot at 1 MHz. The results indicate that the interfacial polarization can be more easily occurred at low frequencies and high temperatures.     

Epitaxial growth of Dy2O3 thin films on epitaxial Dy-germanide films on Ge(0 0 1) substrates

Ultra-thin films of Dy are grown on Ge(0 0 1) substrates by molecular beam deposition near room temperature and immediately annealed for solid phase epitaxy at higher temperatures, leading to the formation of DyGe_x films. Thin films of Dy₂O₃ are grown on the DyGe_x film on Ge(0 0 1) substrates by molecular beam epitaxy. Streaky reflection high energy electron diffraction (RHEED) patterns reveal that epitaxial DyGe_x films grow on Ge(0 0 1) substrates with flat surfaces. X-ray diffraction (XRD) spectrum suggests the growth of an orthorhombic phase of DyGe_x films with (0 0 1) orientations. After the growth of Dy₂O₃ films, there is a change in RHEED patterns to spotty features, revealing the growth of 3D crystalline islands. XRD spectrum shows the presence of a cubic phase with (1 0 0) and (1 1 1) orientations. Atomic force microscopy image shows that the surface morphology of Dy₂O₃ films is smooth with a root mean square roughness of 10 Å.     

A 1.0 V power supply, 9.3 GB/s write speed, Single-Cell Self-Boost program scheme for high performance ferroelectric NAND flash SSD

A Single-Cell Self-Boost (SCSB) program scheme is proposed to achieve a 1.0 V power supply operation in Ferroelectric (Fe-) NAND flash memories. The proposed SCSB scheme only self-boosts the channel voltage of the cell to which the program voltage V_PGM is applied in the program-inhibit NAND string. The program disturb is well suppressed at the 1.0 V power supply voltage in the proposed program scheme. The power consumption of the Fe-NAND at V_CC = 1.0 V decreases by 86% compared with the conventional floating gate (FG-) NAND at V_CC = 1.8 V without the degradation of the write speed. The number of NAND chips written simultaneously in Solid-State Drives (SSD) increases by 6.7 times and the 9.3 GB/s write throughput of the Fe-NAND SSD is achieved for an enterprise application.     

Experimental and theoretical investigation of defects at (1 0 0) Si1−xGex/oxide interfaces

The identification of a nontrigonal Ge dangling bond at SiO₂/Si_1−xGe_x/SiO₂ heterostructures and its electrical activity are discussed, both from experimental and theoretical points of view. This dangling bond is observed from multifrequency electron-spin resonance experiments performed at 4.2 K, for typical Ge concentrations in the range 0.4 ≤ x ≤ 0.85. The electrical activity of this defect is revealed from capacitance-voltage characteristics measured at 300 and 77 K, and is found to behave like an acceptor defect. First-principles calculations of the electronic properties of this Ge dangling bond indicate that its energy level approaches the valence band edge of the Si_1−xGe_x layer as the Ge content increases, confirming its acceptor-like nature.     

Record gain at 3.1 GHz of 4H-SiC high power RF MESFET

In this paper, a very high gain 4H-SiC power MESFET with incorporation of L-gate and source field plate (LSFP-MESFET) structures for high power and RF applications is proposed. The influence of L-gate and source field plate structures on saturation current, breakdown voltage (V_b) and small-signal characteristics of the LSFP-MESFET was studied by numerical device simulation. The optimized results showed that V_b of the LSFP-MESFET is 91% larger than that of the 4H-SiC conventional MESFET (C-MESFET), which meanwhile maintains almost 77% higher saturation drain current characteristics. The maximum output power densities of 21.8 and 5.5 W/mm are obtained for the LSFP-MESFET and C-MESFET, respectively, which means about 4 times larger output power for the proposed device. Also, the cut-off frequency (f_T) of 23.1 GHz and the maximum oscillation frequency (f_max) of 85.3 GHz for the 4H-SiC LSFP-MESFET are obtained compared to 9.4 and 36.2 GHz for that of the C-MESFET structure, respectively. The proposed LSFP-MESFET shows a new record maximum stable gain exceeding 22.7 dB at 3.1 GHz, which is 7.6 dB higher than that of the C-MESFET. To the best of our knowledge, this is 2.5 dB greater than the highest gain yet reported for SiC MESFETs, showing the potential of this device for high power RF applications.     

Band offsets at the (1 0 0)GaSb/Al2O3 interface from internal electron photoemission study

From electron internal photoemission and photoconductivity measurements at the (1 0 0)GaSb/Al₂O₃ interface, the top of the GaSb valence band is found to be 3.05 ± 0.10 eV below the bottom of the Al₂O₃ conduction band. This interface band alignment corresponds to conduction and valence band offsets of 2.3 ± 0.10 eV and 3.05 ± 0.15 eV, respectively, indicating that the valence band in GaSb lies energetically well above the valence band of In_xGa_1−xAs (0 ? x ? 0.53) or InP.     

Yttrium silicide formation and its contact properties on Si(1 0 0)

Yttrium silicide formation and its contact properties on Si(1 0 0) have been studied in this paper. By evaporating a yttrium metal layer onto Si(1 0 0) wafer in conventional vacuum condition and rapid thermal annealing, we found that YSi_2-x begins to form at 350 °C, and is stable to 950 °C. Atomic force microscopy characterization shows the pinholes formation in the formed YSi_2-x film. By current-voltage measurement, the Schottky barrier height (SBH) of YSi_2-x diode on p-type Si(1 0 0) was shown to be between 0.63 and 0.69 eV for annealing temperature from 500 to 900 °C. By low temperature current-voltage measurement, the SBH of YSi_2-x diode on n-type Si(1 0 0) was directly measured and shown to be 0.46, 0.37, 0.32 eV for annealing temperature of 500, 600, and 900 °C, respectively, and possibly even lower for annealing at 700 or 800 °C.     

LP-MOCVD growth of ternary BxGa1−xAs epilayers on (0 0 1)GaAs substrates using TEB, TMGa and AsH3

Zinc-blende B_xGa_1−xAs alloys have been successfully grown on exactly oriented (0 0 1)GaAs substrates using triethylboron, trimethylgallium and arsine sources. The growth has been accomplished in a vertical low-pressure metalorganic chemical vapor deposition (LP-MOCVD) reactor. Boron incorporation behaviors have been extensively studied as a function of growth temperature and gas-phase boron mole fraction. The evolution of surface morphology was also observed.The maximum boron composition of 5.8% is obtained at the optimum growth temperature of 580 °C. RMS roughness over the surface area of 1×1 μm² is only 0.17 nm at such growth conditions. Based on the experimental results, it has been clearly shown that boron incorporation will decrease significantly at higher temperature (>610 °C) or at much lower temperature (?550 °C).     

Growth and structural properties of crystalline LaAlO3 on Si (0 0 1)

Crystalline LaAlO₃ was grown by oxide molecular beam epitaxy (MBE) on Si (0 0 1) surfaces utilizing a 2 ML SrTiO₃ buffer layer. This SrTiO₃ buffer layer, also grown by oxide MBE, formed an abrupt interface with the silicon. No SiO₂ layer was detectable at the oxide-silicon interface when studied by cross-sectional transmission electron microscopy. The crystalline quality of the LaAlO₃ was assessed during and after growth by reflection high energy electron diffraction, indicating epitaxial growth with the LaAlO₃ unit cell rotated 45° relative to the silicon unit cell. X-ray diffraction indicates a (0 0 1) oriented single-crystalline LaAlO₃ film with a rocking curve of 0.15° and no secondary phases. The use of SrTiO₃ buffer layers on silicon allows perovskite oxides which otherwise would be incompatible with silicon to be integrated onto a silicon platform.     

An integrated 0.35 μm CMOS optical receiver with clock and data recovery circuit

This paper presents an integrated optical receiver that operates at 1 Gb/s in a standard 0.35 μm digital CMOS technology. The receiver consists of an integrated CMOS photodetector, a transimpedance amplifier (TIA) followed by a post-amplification stage and a dual-loop clock and data recovery (CDR) circuit. At a wavelength of 860 nm, the circuit requires an average light input power of −19.7 dBm to obtain a bit-error rate (BER) of 10⁻¹². The complete receiver consumes a total power of approximately 155 mW from a 3.3-V supply. The core circuit area is 0.85×1.32 mm².     

In situ atomic layer deposition and synchrotron-radiation photoemission study of Al2O3 on pristine n-GaAs(0 0 1)-4 × 6 surface

This work presents the in situ reflection high-energy electron diffraction (RHEED), scanning tunneling microscopy (STM) and synchrotron-radiation photoemission studies for the morphological and interfacial chemical characterization of in situ atomic layer deposited (ALD) Al₂O₃ on pristine molecular beam epitaxy (MBE) grown Ga-rich n-GaAs (1 0 0)-4 × 6 surface. Both the RHEED pattern and STM image demonstrated that the first cycle of ALD-Al₂O₃ process reacted immediately with the GaAs surface. As revealed by in situ synchrotron-radiation photoemission studies, two types of surface As atoms that have excess in charge in the clean surface served as reaction sites with TMA. Two oxidized states were then induced in the As 3d core-level spectra with chemical shifts of +660 meV and +1.03 eV, respectively.     

PAMBE growth of (1 1 2¯ 2)-oriented GaN/AlN nanostructures on m-sapphire

We report on the plasma-assisted molecular-beam epitaxial growth of (1 1 2¯ 2)-oriented GaN/AlN nanostructures on (1 1¯ 0 0) m-plane sapphire. Moderate N-rich conditions enable to synthesize AlN(1 1  2) directly on m-sapphire, with in-plane epitaxial relationships [1 1 2¯ 3¯]_AlN∥[0 0 0 1]_sapphire and [1  0 0]_AlN∥[1 1 2¯ 0]_sapphire. In the case of GaN, a Ga-excess of one monolayer is necessary to achieve two-dimensional growth of GaN(1 1 2¯ 2). Applying these growth conditions, we demonstrate the synthesis of (1 1 2¯ 2)-oriented GaN/AlN quantum well structures, showing a strong reduction of the internal electric field. By interrupting the growth under vacuum after the deposition of few monolayers of GaN under slightly Ga-rich conditions, we also demonstrate the feasibility of quantum dot structures with this orientation.