Silicon-based FMCW signal generators: A review

FMCW radars with high resolution necessities the generation of highly linear, low phase noise, and low spur chirp signals with large bandwidth and a short modulation period. This paper reviews recent research progress on silicon-based FMCW signal generators, identifies advances in architecture, fundamental design, performance analysis, and applications of the FMCW synthesizer.     

A four-point electrical measurement technique for characterizing mask superposition errors on semiconductor wafers

Data are obtained using a microelectronic van der Pauw resistor structure in conjunction with automated test, computing, and graphic display equipment. Computer-drawn vector displacement maps, equivalue contour maps, and histograms are used to display the data in a format which assists in the interpretation of sources of MSE. A six-parameter model which takes into account mask translation, rotation, and expansion is shown to fit successfully the data obtained from test wafers masked using conventional alignment equipment. A comparative evaluation of the performance of a group of aligners used for manufacturing integrated circuits is given, and an investigation of the consequences of masking silicon wafers which have been subjected to high-temperature processing is performed.     

Human errors: A review

This paper briefly reviews human errors in engineering systems. Definitions for human reliability and human errors are presented. Consequences and causes of human errors are discussed. Historical developments in human reliability are briefly described. Breakdowns of human errors are given. Human error prevention and reduction methods are discussed along with human reliability data banks. In particular, Data Store and Operational Recording and Data System (OPREDS) are described. Human errors in structures and computer systems are discussed. Error rates for selected tasks are presented.     

A van der Pauw resistor structure for determining mask superposition errors on semiconductor slices

A symmetric eight-point van der Pauw resistor structure is described which makes it possible to determine the x- and y- axis vector components of mask superposition error on specially processed semiconductor slices. The structure is fabricated by first delineating a corner-contacted square van der Pauw resistor geometry. A second masking step adds sensor arms at the midpoints of the sides of the square body if the two masks have been correctly superimposed. The actual location of the sensor arms is determined by carrying out a series of four-point resistance measurements after doping the structure. Control geometries, in which the eight sensor arms are delineated on the same masking step, are used to investigate the accuracy and precision of the measurement technique. It is found that the vector components of mask superposition error can be determined, in the absence of mask-to-mask registration errors, with an absolute accuracy in the range ±0.10 μm and standard error below 0.015 μm. Examples of vector displacement maps are presented which illustrate the information which can be obtained when a large number of such devices is evaluated using automatic test and computing equipment.     

畸变的掩模对光刻图形质量的影响

基于描述激光直写邻近效应的双高斯函数之差抗蚀剂模型,计算分析了邻近效应带来的掩模加工的偏差,及其对光刻图形质量的影响.模拟结果表明,当掩模的特征尺寸为1.5μm时,激光直写所加工掩模的相对面积偏差达5%,并对最终的光刻图形的质量产生严重影响.     

Efficient test pattern generators based on specific cellular automata structures

A new method of designing built-in test pattern generator (TPG) for digital circuits is presented in the paper. The specific cellular automata register structure (henceforth denoted as DTI-LFSR) composed of D and T flip–flops with either active-high or active-low inputs is used as an effective TPG. It is shown in the paper how to find DTI-LFSR structure that generates vector sequence that contains at least some of deterministic test patterns detecting hard faults in the given circuit under test. The remaining faults, if any, are covered by the sequence of pseudo-random patterns produced either by the same DTI-LFSR structure or by its modified version supplemented with a linear feedback path, which is henceforth called IEDTI-LFSR. The main advantage of a TPG designed according to the proposed method is short testing time. This feature is supported by experimental results. Another good point of the DTI-LFSR is its low area overhead and high operational frequency.     

Computation of the average power pattern of a reflector antennawith random surface errors and misalignment errors

To specify manufacturing tolerances of a reflector antenna, various errors such as random surface errors and misalignment errors must be considered at one time because superposition of the effects of those errors may not hold. Based on the Rahmat-Samii's formulation (1983), a method for computing efficiently the average power pattern of a reflector antenna with those errors is presented. Simulation results show that superposition of the effects of errors does not generally hold and demonstrate how those errors degrade the peak-gain and sidelobe levels     

Sub-100 nm space pattern replication by using a cross-sectioned X-ray mask

Ultra-fine space pattern printing by Synchrotron Radiation x-ray lithography was investigated. New types of cross-sectioned mask¹⁾ were used to overcome the difficulty of mask fabrication. As a result, feasibility to print space patterns with a width of 50 nm or less by contact printing was demonstrated. In practice, a very narrow mask-to-wafer gap setting and precise control of the x-ray irradiation angle are necessary.     

Soft errors in floating gate memory cells: A review

Soft errors due to neutrons and alpha particles are among the main threats for the reliability of digital circuits operating at terrestrial level. These kinds of errors are typically associated with SRAMs and latches or DRAMs, and less frequently with non-volatile memories. In this paper we review the studies on the response of NAND and NOR Flash memories to ionizing particles, focusing on both single-level and multi-level cell architectures, manufactured in technologies down to a feature size of 25 nm. We discuss experimental error rates obtained with accelerated tests and identify the relative importance of neutron and alpha contributions. Technology scaling trends are finally discussed and modelled.     

An ichnographic two-dimensional analysis of the MOS LSI mask layout pattern

This simulation technique is particularly suitable for analyzing the electric property of a MOSFET or a part of an MOS LSI, taking account of the source-drain average resistivity of the diffused area and the layout pattern effect. The algorithm is presented and calculated examples are given. The simulated result shows satisfactory agreement with the experimental data. The scaling property and the layout pattern effect of the MOSFET were also investigated with the use of this simulation technique.     

高清晰度电视图形误差的自动调整

介绍一种高清晰度电视图形误差自动调整系统，它采用面阵CCD数据采集系统获取高清晰度电视的图形，运用图像处理技术分析实际图形与标准图形间的误差，通过I^2C总线自动修正图形误差。     

A novel silicon texturization method based on etching through a silicon nitride mask

We present a new texturing technique applicable to silicon solar cells. The technique is based on the isotropic etching of silicon through a very thin layer of silicon nitride, deposited by low‐pressure chemical vapor deposition. Spectrophotometry measurements show that the resulting surface texture displays low reflectivity after encapsulation behind glass, and nearly ideal light‐trapping behaviour. The surfaces can also be well passivated using standard passivation techniques. Emitter dark saturation currents in the range 4–5 × 10⁻¹⁴ A/cm² have been measured by quasi‐steady‐state photoconductance following the growth of a thermal oxide. Copyright © 2005 John Wiley & Sons, Ltd.     

Current-mode square wave generators based on a single CDTA

This paper proposes two designs for current-mode square wave generators based on a current-differencing transconductance amplifier (CDTA). Both the proposed circuits are compact and employ a single CDTA with only two external passive components. The first circuit has a fixed duty-cycle topology and can generate a symmetrical square wave with variable frequency. The second circuit has a variable duty-cycle design and can operate in a current-controlled dual duty-cycle mode with a single-circuit topology. The proposed generators allow independent control of the operating frequency, output amplitude, and duty cycle by tuning diverse circuit parameters. This paper discusses several previous designs for square wave generators and presents the circuit principles, related governing formulas, and nonideal problems for the proposed circuits. In addition, computer simulations and experimental results, which are consistent with those of the theoretical analyses and confirm the feasibility of the new generators, are presented.     

A method for comparison of pseudo-random number generators

In this paper a method for comparison of pseudo-random number generators which have uniform distributions in the interval [0, 1] is proposed. With the suggested criterion, it is better to use a pseudo-random number generator whose distribution of the pseudo-random variable is closer to the ideal uniform distribution. The application of the suggested method is illustrated by an example.     

Truly random number generators based on a non-autonomous chaotic oscillator

A non-autonomous chaotic circuit which is suitable for high-frequency integrated circuit (IC) realization is presented. Simulation and experimental results verifying the feasibility of the circuit are given. We have numerically verified that the bit streams obtained from the stroboscopic Poincaré map of the system passed the four basic tests of FIPS-140-2 test suite. We also have verified that the binary data obtained from the hardware realization of this continuous-time chaotic oscillator in the same way pass the full NIST random number test suite. Then, in order to increase the output throughput and the statistical quality of the generated bit sequences, we propose a TRNG design which uses a dual oscillator architecture with the proposed continuous-time chaotic oscillator. Finally, we have experimentally verified that the binary data obtained by this oscillator sampling technique pass the tests of full NIST random number test suite without Von Neumann processing for a higher throughput speed while compared with the previous one where the proposed continuous-time chaotic oscillator is used alone.     

Dynamics of two coupled generators with a delay

The interaction of two coupled generators with a delay is investigated. Each of the generators contains an inertial element. The operation of the system is considered in the case when the subsystems have asymmetric characteristics. It is shown that, in this case, the coupled system can operate in chaotic modes with a small delay when only regular oscillations are excited autonomously. Results of the numerical analysis of an original scenario of motion chaotization developing in the presence of a small delay are presented. Chaotic mutual synchronization in the coupled system is considered in the case when the delay in the feedback loops of the partial generators is large.