Parylene based bilayer flexible gate dielectric layer for top-gated organic field-effect transistors

In this paper, we report on a bilayer insulating film based on parylene-c for gate dielectric layers in top-gate/bottom-contact inkjet-printed organic field-effect transistors (OFETs) with indacenodithiophene-co-benzothiadiazole (IDTBT) and poly([N,N’-bis(2-octyldodecyl)-naphthalene-1,4,5,8-bis(dicarboximide)-2,6-diyl]-alt-5,5’-(2,2’-bitthiophene)) (P(NDI2OD-T2)) as with p- and n-channel semiconductors. The thin parylene-c film (t = 210 nm) show large gate leakage density (2.52 nA/cm² at 25 V) and low breakdown voltage (2.2 MV/cm). In addition, a degraded field-effect mobility (μ) was observed in printed IDTBT and P(NDI2OD-T2) OFETs with the parylene-c single-layered dielectric. X-ray photoelectron spectroscopy (XPS) analysis reveals that the degradation of μ is due to unwanted chemical interaction between parylene-c and the conjugated polymer surface during the parylene-c deposition process. By inserting 50-nm thick poly(methyl-methacrylate) (PMMA) and polystyrene (PS) layer in-between the parylene-c and conjugated polymer film, highly improved gate leakage density and breakdown voltage are achieved. The printed IDTBT and P(NDI2OD-T2) OFETs with a bilayer dielectric compose of parylene-c and PMMA and PS show significantly improved hole and electron μ of 0.47 cm²/Vs and 0.13 cm²/Vs, respectively, and better operation stability. In addition, we demonstrate inkjet-printed polymer complementary inverter with a high voltage gain of 25.7 by applying a PS/parylene-c bilayer dielectric.     

聚酰亚胺为栅绝缘层的并五苯场效应晶体管

以真空蒸发的有机半导体材料并五苯为有源层,以旋涂的聚酰亚胺作为栅绝缘层,以真空蒸发的Al为栅、源和漏电极,成功制作了顶接触式并五苯有机场效应晶体管(OFET).测试表明,在源漏电压为70 V时,器件的载流子迁移率μ为0.079 cm2/V·s,器件的开关电流比为1.7×104.     

Programmable memory in organic field-effect transistor based on lead phthalocyanine

A nonvolatile organic field-effect transistor (OFET) with a polymeric electret as gate insulator and spun cast film of lead phthalocyanine (PbPc) as semiconductor channel is reported. Hysteresis induced by gate–bias stress was exploited to study nonvolatile memory effects. The observation of the hysteresis and memory window is proposed to originate from charge storage in the polymeric electret. The on state retention time for the OFET memory device is more than 5 h and the device can reproduce continuous write–read–erase–read switching cycles.     

Realization of electrically stable organic field-effect transistors using simple polymer blended dielectrics

Organic field-effect transistors (OFETs) were fabricated using polymer blended gate dielectrics in an effort to enhance the electrical stability against a gate bias stress. A poly(melamine-co-formaldehyde) acrylated (PMFA) gate dielectric layer with great insulating properties was blended with polypentafluorostyrene (PFS), a type of hydrophobic fluorinated polymer. Although the overall electrical performance dropped slightly due to the rough and hydrophobic surfaces of the blend films, at the blend ratio (10%), the OFET’s threshold voltage shift under a sustained gate bias stress applied over 3 h decreased remarkably compared with an OFET based on a PMFA dielectric alone. This behavior was attributed to the presence of the hydrophobic and electrically stable PFS polymer, which provided a low interfacial trap density between the gate dielectric and the semiconductor. A stretched exponential function model suggested that the energetic barrier to create trap states was high, and the distribution of energetic barrier heights was narrow in devices prepared with PFS.     

Al2O3/TiO2 nanolaminate gate dielectric films with enhanced electrical performances for organic field-effect transistors

Nanolamination has entered the spotlight as a novel process for fabricating highly dense nanoscale inorganic alloy films. OFET commercialization requires, above all, excellent dielectric properties of gate dielectric layer. Here, we describe the fabrication and characterization of Al–O–Ti (AT) nanolaminate gate dielectric films using a PEALD process, and their OFET applications. The AT films exhibited a very smooth surface (R_q < 0.3 nm), a high dielectric constant (17.8), and a low leakage current (8.6 × 10⁻⁹ A/cm² at 2 MV/cm) compared to single Al₂O₃ or TiO₂ films. Importantly, a 50 nm thick AT film dramatically enhanced the value of μFET (0.96 cm²/V) on a pentacene device, and the high off-current level in a single TiO₂ film was effectively reduced. The nanolamination process removes the drawbacks inherent in each single layer so that the AT film provides excellent dielectric properties suitable for fabricating high-performance OFETs. Triethylsilylethynyl anthradithiophene (TES-ADT), a solution-processable semiconductor, was combined with the AT film in an OFET, and the electrical properties of the device were characterized. The excellent dielectric properties of the AT film render nanolamination a powerful strategy for practical OFET applications.     

Effect of selenophene in naphthalene-diimide-vinylene-based small molecules on n-type organic field-effect transistors

Two naphthalene diimide (NDI)-based small molecules, one with a thiophene-vinylene-thiophene linker donor unit (N-TVT-N) and the other with a selenophene-vinylene-selenophene linker donor unit (N-SVS-N), were newly synthesized for the purpose of serving as the active materials of n-type organic field-effect transistors (OFETs). We investigated the various characteristics of the synthesized small molecules to study how the type of donor unit would affect the charge transport of the resulting thin film. The monomeric molecular structure of N-SVS-N, i.e., that with selenium (Se) substituted for sulfur, was found to be tilted about twice as much as that of N-TVT-N, and to display lower backbone planarity. Unexpectedly, the thin films of N-SVS-N each showed a smoother and more uniform surface morphology and predominantly edge-on orientation in comparison with those of N-TVT-N. As the result, the optimally annealed OFETs containing N-SVS-N and N-TVT-N exhibited electron mobilities of up to 0.016 cm² V⁻¹ s⁻¹ and 6.6 × 10⁻³ cm² V⁻¹ s⁻¹, respectively. These results could be explained by the structural features of N-SVS-N facilitating interactions between the electron-rich selenophenes.     

Performance comparison of pentacene organic field-effect transistors with SiO2 modified with octyltrichlorosilane or octadecyltrichlorosilane

Performance of pentacene organic field-effect transistors (OFETs) is significantly improved by treatment of SiO₂ with octyltrichlorosilane (OTS-8) compared to octadecyltrichlorosilane (OTS-18). The average hole mobility in these OFETs is increased from 0.4 to 0.8 cm²/Vs when treating the dielectric with OTS-8 versus OTS-18 treated devices. The atomic force microscope (AFM) images show that the OTS-8 treated surface produces much larger grains of pentacene (∼500 nm) compared to OTS-18 (∼100 nm). X-ray diffraction (XRD) results confirmed that the pentacene on OTS-8 is more crystalline compared to the pentacene on OTS-18, resulting in higher hole mobility.     

Printable ammonia sensor based on organic field effect transistor

We report an organic field-effect transistor (OFET)-based sensor made from printable materials with an unusually high sensitivity of 0.5 ppm v/v for ammonia and with limit of detection on the order of 0.1 ppm v/v. The device developed has a polyethylene terephthalate (PET) substrate, bottom contacts, and poly (3,3^?$3\text{,}{3}^{?}$-didodecylquaterthiophene) (PQT-12) cast from 4 mg/mL cholorobenzene solution as active semiconductor. The fabrication process is simplified by replacing the gate electrode and dielectric deposition steps with the introduction of static charges on the back surface of the PET substrate by corona charging, a procedure that is adaptable to roll-to-roll processing. Hydrophobic polymers applied to the back surface stabilize this charge, providing evidence for their activity at that location. In the proposed sensor, these static charges are used as a static gate, reducing the OFET architecture to a chemiresistor. The sensor is selective for ammonia over common organic solvent vapors, and the response is generally reversible. The device also demonstrates memory behavior required for dosimetric sensors when kept at low temperature (4 °C to −30 °C). A converse response from an n-channel semiconductor is also reported.     

Flexible organic field-effect transistors with TIPS-Pentacene crystals exhibiting high electrical stability upon bending

Flexible organic field-effect transistors with high electrical stability upon bending are demonstrated on indium tin oxide coated polyethylene terephthalate substrates with TIPS-Pentacene semiconductor crystals formed by drop casting on a hybrid gate dielectric consisting hafnium dioxide grown by atomic layer deposition and spin coated poly(4-vinylphenol). Fabricated devices exhibited excellent p-channel characteristics with field-effect mobility up to 0.12 cm²/Vs with high current on/off ratio >10⁴ and low threshold voltage of −0.2 V. Device performance was slightly affected by mechanical strain applied by bending for 5 min with radius varying from 12.5 mm to as low as 5.0 mm; and a high stability in performance was demonstrated upon applying constant tensile strain for more than 48 h at bending radius of 5.0 mm. It was found that strain induced changes in the device performance primarily occur due to increase in dielectric surface roughness; and the semiconductor-dielectric interface uniformity is influenced more with magnitude of strain rather than its duration.     

Morphology control of tunneling dielectric towards high-performance organic field-effect transistor nonvolatile memory

We report high-performance organic field-effect transistor nonvolatile memory based on nano-floating-gate, which shows a large memory window of about 70 V, high ON/OFF ratio of reading current over 10⁵ after 1 week storage, high field-effect mobility of 0.6 cm²/V s, and good programming/erasing/reading endurance. The devices incorporate Au nanoparticles and polystyrene layer on top to form the nano-floating-gate, and we demonstrate that the morphology control of the tunneling dielectric is critically significant to improve the memory performance. The optimized tunneling dielectric morphology is favorable to the efficient charge tunneling, reliable charge storage and high-quality organic film growth.     

Enhanced performance of room temperature ammonia sensors using morphology-controlled organic field-effect transistors

Developing electronic sensors for ammonia (NH₃) is very useful for environmental monitoring and diagnostic purposes. In this work, a highly sensitive, organic field-effect transistor (OFET) based, room temperature sensor for NH₃ has been fabricated using dinaphtho [2,3-b:2′,3′-f]thieno [3,2-b]thiophene (DNTT), which showed a fast response to low concentration of the analyte down to 100 ppb. A thin film of solution-processed polymethyl methacrylate (PMMA) has been used as the gate dielectric material and its hydrophobic surface promoted structured growth of organic semiconductor, DNTT, by inducing mass transfer. By controlling the thickness and thereby exploiting the growth dynamics of the semiconductor film, the sensor performance was improved. The sensitivity of the device towards 1 ppm of NH₃ was almost doubled with a thinner and porous film of DNTT as compared to that with a thick film. Morphological studies of the sensing layers, using atomic force microscopy (AFM), have established this structure-property relation. The variations in different transistor parameters have been studied with respect to different analyte concentrations. The p-channel devices in the enhancement mode showed depletion upon exposure to NH₃. The devices exhibited a fast response and good recovery to the initial state within 2 min.     

UV assisted non-volatile memory behaviour using Copper (II) phthalocyanine based organic field-effect transistors

In this report, we have demonstrated the optical non-volatile memory characteristics using CuPc OFET. The memory operation was comprehensively demonstrated with different programming conditions. It was found that the programming of CuPc OFET with an electric pulse at the gate terminal under UV-light photo-illumination compared to other programming conditions, could substantially increase the memory window due to massive charge trapping in the polymer electret layer, which causes shift in the device transfer characteristics from low-conduction state (“OFF state”, or logic 0) to high conduction state (“ON state”, or logic 1) at V_GS = 0V. From device operation at −50V, a memory window of greater than 45V could be achieved by applying a programming voltage of +70 V at the gate terminal under UV-light photo-illumination. Moreover, it was completely erased by applying −100 V at the gate terminal in dark.     

Surface-induced highly oriented perylo[1,12-b,c,d]selenophene thin films for high performance organic field-effect transistors

Epitaxial crystallization of perylo[1,12-b,c,d]selenophene (PESE) on highly oriented polyethylene (PE) substrate through vapor phase deposition has been achieved. Oriented PESE crystals with different crystalline morphologies can be fabricated by changing the temperature of PE substrate during vacuum evaporation. When the PE substrate temperature is lower than 70 °C, sparsely dispersed PESE lathlike crystals are produced with their long axis preferentially aligned perpendicular to the chain direction of PE crystals. While the close films of PESE with lathlike crystals aligned with long axis parallel to the chain direction of PE film were obtained above 90 °C. Transistors based on expitaxially crystallized PESE films have been fabricated and the transistor properties were also studied. It is found that transistors show different electrical characteristics depending on the preparation conditions of expitaxially crystallized PESE films. The transistors based on the PESE/PE-SiO₂/Si with PESE deposited on oriented PE film at low temperature, i.e., <70 °C, display a similar poor properties with the PESE/OTS-SiO₂/Si type transistors. However, when the deposition temperature was elevated to 90 °C, the transistors exhibit a maximum field-effect mobility of 4.4 × 10⁻² cm² V⁻¹ s⁻¹ and maximum on/off ratio of 2.0 × 10⁵, which are about 2 orders of magnitudes higher than the PESE/OTS-SiO₂/Si based transistors.     

The effect of porous structure of PMMA tunneling dielectric layer on the performance of nonvolatile floating-gate organic field-effect transistor memory devices

In this paper, we used the low and high density porous structure of polymethylmethacrylate (PMMA) film as tunneling dielectric layer in the floating-gate organic field-effect transistor (OFET) memory devices. Compared to the thin/thick nonporous structure of PMMA tunneling layer, the porous structure of PMMA tunneling layer had positive impacts on the device performance of the floating-gate OFET memory devices. Moreover, it was found that the memory performance was also increased as pore density of PMMA film increased. The atomic force microscopy (AFM) results of both porous structure of PMMA film and pentacene film on porous structure of PMMA film revealed that high density porous structure of PMMA tunneling layer can produce larger tunneling area and more electron transfer paths between pentacene film and PMMA film, which resulted in high electron capture and release efficiency of the floating-gate OFET memory devices with porous structure of PMMA tunneling layer. In addition, our porous structure of PMMA tunneling layer as well as nonporous PMMA film has high electrical insulating property due to their semi-hollow structure film, which is favourable to maintain stable retention property. Eventually, the floating-gate OFET memory devices with high density porous structure of PMMA tunneling layer showed good nonvolatile memory properties with a large memory window of about 43 V, a high ON/OFF current ratio of about 10⁴, and stable endurance and retention properties. Our results provided a new strategy to achieve the high performance floating-gate OFET memory devices.     

Low-power organic field-effect transistors and complementary inverter based on low-temperature processed Al2O3 dielectric

Organic-based complementary inverter could be a key component in future flexible and portable electronic products, which require low-power operation, high operating stability and flexible compatibility at the same time. A simple method for making excellent Al₂O₃ gate dielectric is developed toward the target, and it is a low-cost solution process with a low annealing temperature compatible with plastic substrates. Utilizing the Al₂O₃ dielectric, both p-type and n-type low-voltage organic field-effect transistors (OFETs) are realized. The device operating voltage is down to ±3 V, and the On/Off ratio is up to 10⁶. The hole and electron field-effect mobilities are 2.7 cm²/V and 0.2 cm²/V, respectively, and the subthreshold swing is as small as about 110 mV/decade. The high quality of the Al₂O₃ dielectric results in high operating stability of the devices. The p-type and n-type OFETs are integrated to achieve a low-power complementary inverter with a large gain, which can be successfully fabricated on a flexible substrate.     

All ink-jet printed low-voltage organic field-effect transistors on flexible substrate

In this work, all ink-jet printed (IJP) low-voltage organic field-effect transistors (OFETs) on flexible substrate are reported. The OFETs use IJP silver (Ag) for source/drain/gate electrodes, poly(4-vinylphenol) (PVP) for gate dielectric, 6,13-bis(triisopropylsilylethynyl)-pentacene (TIPS-pentacene) blended with polystyrene (PS) as the semiconducting layer and CYTOP for encapsulation layer. All the printing processes were carried out in ambient air environment using a single laboratory ink-jet printer Dimatix DMP-2831. The all IJP device presents state-of-the-art performance with low operation voltage down to 3 V, small subthreshold swing (SS) of 0.155 V/decade, mobility of 0.26 cm² V⁻¹s⁻¹, threshold voltage (V_th) of −0.17 V and on/off ratio of 3.1 × 10⁵, along with a yield of 62.5%. Through interface engineering and proper process optimization, this work demonstrates a promising low-voltage all IJP device platform for low-cost flexible printed electronics.     

Facile polymer gate dielectric surface-modification for organic thin-film transistors using self-assembled surfactant layer

We demonstrate facile polymer gate dielectric surface-modification method for organic thin-film transistors (OTFTs). We simply introduce self-assembled surfactant layer onto the top surface of poly(4-vinylphenol) (PVP) dielectric by spin coating PVP solution mixed with sodium dodecyl sulfate and tridecafluorohexane-1-sulfonic acid potassium salt as additive agents. The surfactant-modified PVP layer acquires various merits compared to pristine PVP layer in terms of surface smoothness and hydrophobicity, as confirmed by contact angle measurement, atomic force microscopy analyses, grazing incident X-ray diffraction and near-edge X-ray absorption fine structure spectroscopy. The resulting OTFTs with the conventional semiconducting poly(2,5-bis(3-hexadecylthiophen-2-yl)thieno[3,2-b]thiophene) as the active layer and surfactant-modified PVP as the dielectric layer reveal overall ascendency over the OTFT with pristine PVP, especially in terms of operating hysteresis and reliability. The effects of hydrophobicity of surfactants on the surface properties of PVP as well as the OTFT performances are fully discussed in conjunction with various characterization tools.     

High mobility organic field-effect transistors based on defect-free regioregular poly(3-hexylthiophene-2,5-diyl)

We report on organic field-effect transistors (OFETs) prepared using defect free (100% regioregular) poly(3-hexylthiophene-2,5-diyl) (DF-P3HT) as semiconductor and cross-linked poly(vinyl alcohol) (cr-PVA) as gate insulator. High field-effect mobility (μ_FET) of 1.2 cm² V⁻¹ s⁻¹ is obtained and attributed to the absence of regioregularity defects. These transistors have transconductance of 0.35 μS and the DF-P3HT film shows larger crystallites (∼80 Å) than a highly regioregular (>98%) material (∼32 Å). Devices with increased μ_FET (2.8 cm² V⁻¹ s⁻¹) could be obtained at the expense of the On-Off current ratio, which was reduced by one order of magnitude, when poly(3,4-ethylenedioxythiophene):poly(styrenesulfonate) treatment was applied to the dielectric surface. Our results suggest that the interaction of charged sites at the dielectric surface with regioregularity defects of the P3HT is an important factor degrading μ_FET even at very low concentration of regioregularity defects.     

基于场效应管的光电式电流传感器

提出一种新型光电式电流传感器。利用电流取样电阻将被测电流转换为电压,并利用场效应管(FET)的转移特性和发光二极管(LED)将被测电流信号转换为光强度信号,再将光信号由塑料光纤(POF)传输到光电探测器(PD),可以实现直流电流(DC)、方波脉冲电流(PC)以及工频交流电流(AC)的光学传感。综合利用FET的转移特性和PD的开路电压,并合理选择FET的静态工作点,可以实现DC的线性传感。在0.03～17.00A范围内,DC测量的非线性误差低于0.44%;方波脉冲电流响应的延迟时间约为160ns。本文提出的传感器具有响应速度快、结构简单、成本低和可实现绝缘测量等优点。     

Photo-patternable high-k ZrOx dielectrics prepared using zirconium acrylate for low-voltage-operating organic complementary inverters

Solution-processed dielectric materials with a high dielectric constant (k) have attracted considerable attention due to their potential applications in low-voltage-operating organic field-effect transistors (OFETs) for realizing large-area and low-power electronic devices. In terms of device commercialization, the patterning of each film component via a facile route is an important issue. In this study, we introduce a photo-patternable precursor, zirconium acrylate (ZrA), to fabricate photo-patterned high-k zirconium oxide (ZrO_x) dielectric layers with UV light. Solution-processed ZrA films were effectively micro-patterned with UV exposure and developing, and transitioned to ZrO_x through a sol-gel reaction during deep-UV annealing. The UV-assisted and ∼10 nm-thick ZrO_x dielectric films exhibited a high capacitance (917.13 nF/cm² at 1 KHz) and low leakage current density (10⁻⁷ A/cm² at 1.94 MV/cm). Those films could be utilized as gate dielectric layers of OFETs after surface modification with ultrathin cyclic olefin copolymer layers. Finally, we successfully fabricated organic complementary inverters exhibiting hysteresis-free operation and high voltage gains of over 42 at low voltages of ≤3 V.