低杂散锁相环中的电荷泵设计

用TSMC0.18μm CMOS工艺设计并实现了一种电荷泵电路，传统的电荷泵电路中充放电电流有较大的电流失配,电流失配导致相位偏差,从而引起杂散并降低了锁相环的锁定范围，文中采用与电源无关的基准电流源电路,运用运算放大器和自偏置高摆幅共源共栅电流镜电路实现了充放电电流的高度匹配,从而降低了杂散。测试结果表明：电源电压1.8V时,电荷泵电流为0.475mA,在0.3-1.6V输出电压范围内电流失配小于10mA,功耗为6.8mW。     

红外探测器测试系统噪声分析与抑制方法研究

随着红外焦平面技术的发展,探测器规模变得越来越大,像元噪声水平越来越低,因此对红外探测器测试系统噪声水平提出了更高的要求。本文从线缆、采集电路、电源和偏压以及ADC四个部分分析其对系统的影响,较为完整地分析了系统的噪声,并对相应部分噪声抑制方法进行研究。测试结果表明红外探测器测试系统动态范围优于100 dB。     

一种高精度低噪声运算放大器设计北大核心

设计并实现了一种高精度低噪声运算放大器。提出了一种基极电流消除技术，补偿了输入对管基极电流，有效地降低了运算放大器的输入偏置电流，从而能够通过提高输入对管的集电极电流来减小输入噪声电压，实现了较低的运算放大器总等效输入噪声。同时，采用集电极-发射极电压补偿电路，消除了厄利效应的影响，提高了电路精度。电路采用36 V互补双极工艺流片，测试结果表明，芯片的失调电压为6.94μV,在1 kHz下的电压噪声密度为■,电流噪声密度为■。     

低杂散锁相环中的电荷泵设计

用TSMC 0.18μm CMOS工艺设计并实现了一种电荷泵电路.传统的电荷泵电路中充放电电流有较大的电流失配,电流失配导致相位偏差,从而引起杂散并降低了锁相环的锁定范围.文中采用与电源无关的基准电流源电路,运用运算放大器和自偏置高摆幅共源共栅电流镜电路实现了充放电电流的高度匹配,从而降低了杂散.测试结果表明:电源电压1.8V时,电荷泵电流为0.475mA,在0.3～1.6V输出电压范围内电流失配小于10mA,功耗为6.8mW.     

一种动态电流测试产生方法的SPICE模拟验证

数字电路状态发生改变时,数字电路中的逻辑跳变直接影响电路中的动态电流.基于布尔过程的波形模拟器能够快速准确地对电路进行模拟,其结果既能反映电路的逻辑特性又能反映电路的定时特性.利用波形模拟器可以准确的了解电路中跳变的情况.本文利用波形模拟器改进并实现了一种基于逻辑跳变计数的动态电流测试方法.对于S208电路中的部分开路故障和延时故障,本文用该方法产生了一组测试结果,并利用SPICE软件对这些测试结果进行了模拟实验.模拟结果表明,对于某些故障,测试向量对能够使故障电路的动态电流和无故障电路的动态电流产生较大的差别.通过比较两者平均动态电流的大小,我们能够区分出故障电路和无故障电路.实验结果验证了本文中的动态电流测试产生方法的有效性和可行性.     

一种高速片内电流监控器实现

静态电流(IDDQ)测试的实现方法研究是IDDQ测试领域的重要内容之一,高速、高精度是共同追求的目标。通过分析测试向量改变时流过被测电路的电源电流变化情况,得出制约IDDQ测试速度的主要因素。基于此,采用CMOS0.5μm工艺参数、SPICE仿真工具和模拟集成电路设计规则,提出一种快速、高精度的BICS(片内电流监控器)的设计方案。设计中利用辅助的PMOS开关管和延迟电路,有效地解决测试速度问题。设计出的电路达到了100MHz的测试速率、1A测量精度、500mV的最大电源电压降、50μA以上的故障电流检测能力,可以满足一定的实际应用需要。     

高精度电流源电路的设计

提出了一种高精度的电流源电路,通过V/I变换,将由带隙基准电压电路产生的与温度和电源电压无关的带隙基准电压转换成与温度和电压无关的高精度基准电流,并通过高精度电流镜结构产生所需的镜像电流,有效地抑制了由于温度、电源电压、负载阻抗的变化及干扰对电流源的影响.用HSPICE对改进前后的电路进行对比测试,结果表明,改进后电流镜的镜像误差约减小90%,电流源的精度显著提高.     

大功率发光二级管的高效电流源

为了得到大功率发光二极管的最大亮度和最长寿命，需要用适合的电流来驱动，超过电流的容许值会大大降低器件的寿命，采用整流电源或电池再加一个小阻值的限流电阻来供应发光二极管的电流并不是理想的解决方法，因为不仅电阻发热要消耗能量，而且即使选用小电阻降低了损耗，但外加电压点小变化，将会引起流经管子电流的大变化，众所周知在最佳工作点附近发光二极管具有较小动态电阻，这就造成了电流的大变化，因此需要设计出比简单串联电阻更好的电路来对发光二极管供电。     

非常见问题解答 来自ADI公司的电话记录中奇怪但真实的故事

锁定噪声——不让它逃跑问题:如何防止开关电源的噪声破坏电路性能呢?回答:非常难——但可以做到。可以想象,开关电源在本质上来说是最嘈杂的电路。电源的大电流在高频下以极快的dl/dt开启、关断,这将不可避免的出现大而快的瞬态电压与瞬态电流。预防系统中的敏感电路受到干扰的唯一方法是让瞬态电流和瞬态电压保持在转换器内部。我们无法阻止内部的大电流切换。     

交错式单管正激变换的半导体激光器电源研究

为了简化半导体激光器电源的电路结构、提升其电能转换效率、实现输出电流的快速动态响应,采用单管正激变换的并联交错技术,设计出一种2kW单级变换的开关型直流驱动电源。测试并分析了电源的静态特性、动态特性及电能转换效率。结果表明,电源的效率高达85%;输出电流0A～100A的上升、下降时间仅为1ms;满载100A工作时,输出电流的纹波系数仅为0.04%。与两级串联结构的半导体激光器电源相比,电源的效率得以提升,输出电流的动态响应速度迅速,满足激光加工的要求。     

Dynamic Power Supply Current Testing of CMOS SRAMs

We describe the design and implementation of a dynamic power supply current sensor which is used to detect SRAM faults such as disturb faults as well as logic cell faults. A formal study is presented to assess the parameters that influence the sensor design. The sensor detects faults by detecting abnormal levels of the power supply current. The sensor is embedded in the SRAM and offers on-chip detectability of faults. The sensor detects abnormal dynamic current levels that result from circuit defects. If two or more memory cells erroneously switch as a result of a write or read operation, the level of the dynamic power supply current is elevated. The sensor can detect this elevated value of the dynamic current. The dynamic power supply current sensor can supplement the observability associated with any test algorithm by using the sensor as a substitute for the read operations. This significantly reduces the test length and the additional observability enhances defect coverages.     

石油测井仪器电流检测系统分析

在测井仪器的研发期间,对仪器的功耗要进行监测,利于可以科学的给仪器搭配适合的电池,为此设计了可以在大动态情况下,连续的对直流的小电流进行监测的检测系统,对于系统有连续监测小电流的独特需求,设计出了运用高输入阻抗的方法和差分运放的I/V转换方法选用放大信号、多级硬件的电路滤波和数字的滤波相综合形式的制止干扰的方法,主要是制止系统内的噪声和系统外在的工频干扰;在此之外还运用软件来达到自动量程的效替来实现大范围的电流检测要求,通过实验来实现使用的需求.     

Dynamic Power Supply Current Testing for Open Defects in CMOS SRAMs

The detection of open defects in CMOS SRAM has been a time consuming process. This paper proposes a new dynamic power supply current testing method to detect open defects in CMOS SRAM cells. By monitoring a dynamic current pulse during a transition write operation or a read operation, open defects can be detected. In order to measure the dynamic power supply current pulse, a current monitoring circuit with low hardware overhead is developed. Using the sensor, the new testing method does not require any additional test sequence. The results show that the new test method is very efficient compared with other testing methods. Therefore, the new testing method is very attractive.     

Novel Self-Timed, Pipelined Clock Scan Architecture

In this paper, we describe a novel self-timed scan chain design approach to mitigate hold time and power supply noise problems during scan testing, and to simultaneously allow no delay penalty due to the front-end multiplexer in a multiplexer-D flip-flop (mux-DFF) scan cell. Hold time problems due to clock skew and static and dynamic power supply noise (i.e. IR drop and LdI/dt noise) due to simultaneous switching are two problems associated with shift operations during scan testing using ATPG patterns. These problems are particularly serious with mux-DFF style scan, and are either nonexistent or negligible with level-sensitive scan design (LSSD). This paper deals with a circuit technique to mitigate hold time, power supply noise and front-end delay penalty seen with mux-DFF and achieve a middle ground on clock routing overhead between LSSD and mux-DFF scan styles.     

Fault tolerant system based on IDDQ testing

Offline test is essential to ensure good manufacturing quality. However, for permanent or transient faults that occur during the use of the integrated circuit in an application, an online integrated test is needed as well. This procedure should ensure the detection and possibly the correction or the masking of these faults. This requirement of self-correction is sometimes necessary, especially in critical applications that require high security such as automotive, space or biomedical applications. We propose a fault-tolerant design for analogue and mixed-signal design complementary metal oxide (CMOS) circuits based on the quiescent current supply (IDDQ) testing. A defect can cause an increase in current consumption. IDDQ testing technique is based on the measurement of power supply current to distinguish between functional and failed circuits. The technique has been an effective testing method for detecting physical defects such as gate-oxide shorts, floating gates (open) and bridging defects in CMOS integrated circuits. An architecture called BICS (Built In Current Sensor) is used for monitoring the supply current (IDDQ) of the connected integrated circuit. If the measured current is not within the normal range, a defect is signalled and the system switches connection from the defective to a functional integrated circuit. The fault-tolerant technique is composed essentially by a double mirror built-in current sensor, allowing the detection of abnormal current consumption and blocks allowing the connection to redundant circuits, if a defect occurs. Spices simulations are performed to valid the proposed design.     

A current based self-test methodology for RF front-end circuits

This paper presents a critical step in the realization of a robust, low overhead, current-based Built-In Self-Test (BIST) scheme for RF front-end circuits. The proposed approach involves sampling the high frequency supply current drawn by the circuit under test (CUT) and using it to extract information about various performance metrics of the RF CUT. The technique has inherently high fault coverage and can handle soft faults, hard faults as well as concurrent faults because it shifts the emphasis from detecting individual faults, to quantifying all the significant performance specifications of the CUT. This work also presents the realization of an HF current monitor which is a critical component in the proposed architecture. The current monitor has then been interfaced with three standard RF front-end circuits; a Low noise amplifier, a Single Balanced Mixer and a Voltage controlled oscillator, while minimally impacting their performance. The extracted information has then been used to create a mapping between variations in CUT performance and the sensed current spectrum. The monitor circuit has been fabricated in the IBM 6 metal, RF CMOS process, with a gain of 24 db and bandwidth of 3.9 GHz.     

旋转元件动态微电压测试电路设计

在旋转元件进行动态测试过程中,信号传输以及测试元件供电需要电线由动态旋转状态装换为静态,这样信号以及供电才能顺利实现.在为电压信号测试过程中,信号较容易受到外界干扰,信噪比较低;需要一个微型并且稳定的多通道信号放大器对信号进行放大.本文利滑环,基于AD620微型放大器设计出一个三通道微型放大器电路来实现对信号的准确采集.     

Built-in sensor based on current supply high-frequency behaviour

A built-in sensor based on the detection of highest frequency components of the dynamic current supply of the circuit under test is proposed. In analogue SI circuits, there are faults difficult to detect using conventional test methods. It is possible to detect these faults by the changes in the slope of the dynamic current supply.