锌银航空蓄电池失效分析及对策

以工作电流和工作温度为主要考虑因素,建立了锌银航空蓄电池基本失效率模型和工作失效率模型。以试验数据为基础,采用失效率模型,通过数值计算得到基本失效率预计值,将预计值与试验值进行了比较,结果表明,得到的失效率模型可以应用于工程实践,为预防锌银航空蓄电池失效提供了基础,对锌银航空蓄电池在飞机上的正确使用具有重要意义。     

多失效机理下基于FIDES的MEMS失效率预计研究

针对MEMS在工艺和结构上的新特点以及当前国内外尚未形成与MEMS相关的失效率预计模型的研究现状,基于失效物理方法和现有FIDES标准,提出了一种MEMS失效率预计方法。在MEMS工艺影响分析基础上,结合实验数据和失效物理方法,提出了MEMS在多失效机理下的总体失效分布函数计算方法;之后,基于FIDES基本失效率预计模型,提出了MEMS的失效率预计模型及其适用的参数取值方法;最后,完成了某型MEMS高g值微加速度计的失效率预计案例。结果表明,预计模型充分考虑了MEMS在工艺和结构上的新特点以及多失效机理的共同作用,可有效解决现有标准手册不能准确反映制造工艺发展现状和手册中失效数据不适用的问题。     

多芯片组件MCM的失效率预计研究

通过对多芯片组件(MCM)的结构、失效模式和机理的分析,提出了适合我国生产实际的MCM失效率预计模型.采用加速寿命试验和点估计法获得了膜电阻的基本失效率λRT和布线与工艺基本失效率λC;并采用极限应力对比试验获得了层间系数πcp.     

基于元器件应力法的电能表可靠性预计报告

元器件应力法是目前最适于电子式电能表可靠性预计的工程实用方法。文中分析了单相智能电能表可靠性预计的基本目标,基于GJB/Z299C-2006手册建立可靠度模型,进行可靠性分配,计算元器件失效率和平均工作寿命,为定量预计电能表可靠性建立了基本框架。     

一种星载电子产品老练试验加速因子估计方法

提出一种基于可靠性预计数据的星载电子产品老练试验加速因子的估计方法。在该方法中,温度对产品失效过程的影响通过器件失效率预计模型中的温度应力参数予以刻画。通过比较产品在工作环境温度与老练试验温度下的预计失效率数据来估计老练试验加速因子。该方法简单、易行,含义明确,有望增强可靠性评估结果与可靠性预计结果的可比性。     

砷化镓微波单片集成电路可靠性预计模型研究

在对微波单片集成电路（MMIC）的失效模式和失效机理进行分析的基础上,提出了砷化镓微波单片集成电路（GaAsMMIC）的可靠性预计数学模型,并通过加速寿命试验确定了产品的基本失效率和预计模型温度系数πT0在大量统计工艺数据和文献数据的基础上,获得了可靠性预计模型中的其它系数。     

晶体管非工作状态可靠性预计

本文根据晶体管非工作期可靠性统计数据建立了我国晶体管非工作状态失效率预计模型，经验证，预计失效率与现场失效率相吻合，通过预计模型可预计晶体管在各类环境下的非工作状态失效率，尤其给出了我国晶体管普遍库房贮存失效率和贮存有效期。     

晶体管非工作期失效率预计

本文根据晶体管非工作期可靠性统计数据建立了我国晶体管非工作期失效率预计模型，经验证，预计失效率与现场失效率相吻合．通过预计模型可预计晶体管在各类环境下的非工作期失效率，尤其给出了我国晶体管普通库房贮存失效率和贮存有效期．     

非工作期微电路的可靠性预计模型研究

通过分析影响非工作期微电路可靠性的主要因素，采用大量的现场和试验数据进行归一化-线性化-回归分析，研究各主要影响因素与微电路非工作期失效率的定量关系，进而建立可靠性预计模型，该模型预计的失效率与电子设备非工作现场失效率比较，初步验证结果良好。     

接口混合集成电路长期工作寿命预计及验证

寿命试验常被用来评估集成电路等半导体器件的可靠性,为了节约试验时间,常采用加速寿命试验方法去评估集成电路产品的工作寿命。采用基于可靠性手册中器件失效率历史数据和基于失效物理模型两种方法对接口混合集成电路的长期工作寿命进行了预计及验证。首先,通过接口混合集成电路产品多批次寿命可靠性试验的历史数据计算出了电路工作寿命;然后,基于可靠性手册中器件失效率的历史数据、模型及其使用特性要素计算出产品的工作寿命。结果表明,两者较为接近;从而证明该类混合集成电路在加速寿命试验数据不够的情况下,采用基于可靠性手册中器件失效率数据对其进行寿命预测是可行的,为接口混合集成电路长期工作寿命评估提供了一定的参考。     

真空电子器件工作和非工作可靠性的探讨

论述了几个军用真空电子器件在不同应用条件下的工作和非工作的可靠性情况 ,提出器件在非工作贮存期内的预计失效率模型 ,并讨论在长期非工作贮存期内出现的失效机理及定性得出存放寿命与时间相关的结论。     

Reliability and availability analysis for two non-identical unit parallel systems with common cause failures and human errors

This paper presents three models with common cause failure and human error analysis of a two non-identical unit parallel system. The difference between models I and II is that, in model I the failed system is repaired back to its normal operating state whereas in model II it is not so. Similarly, the basic difference between models II and III is that, in model II it is possible for the partially failed system to be restored to its normal operating state and in model III it is not so. The system reliability, time dependent system availability, steady-state system availability and mean-time to failure are developed for the above models. The problem is discussed with a numerical example.     

Failure Time for a Redundant Repairable System of Two Dissimilar Elements

The distribution of time to failure for a system consisting of two dissimilar elements or subsystems operating redundantly and susceptible to repair is discussed. It is assumed that the times to failure for the two system elements are independent random variables from possibly different exponential distributions, and that the repair times peculiar to each element are independently distributed in an arbitrary fashion. For this basic model a derivation is given of the Laplace-Stieltjes transform of the distribution function of time to system failure, i.e, the time until both elements are simultaneously down for repair, measured from an instant at which both are operating. An explicit formula is given for the mean or expected time to system failure, a natural approximation to the latter is exhibited, and numerical comparisons indicate the quality of this approximation for various repair time distributions. In a second model the possibility of system failures due to overloading the remaining element after a single element failure is explicitly recognized. The assumptions made for the basic model are augmented by a stochastic process describing the random occurrence of overloads. Numerical examples are given. Finally, it is shown how the above models may be easily modified to account for delays in initiating repairs resulting from only occasional system surveillance, and to account for random catastrophic failures.     

Reliability of Some Modularly Redundant Systems

A mathematical model is established for the reliability of modularly redundant systems with unequal failure rates for the operating and standby units. The failure modes include failures of the active and standby units, three types of switch failures, and failures on system recovery. System reliability is considered for cases of both similar and dissimilar units, and for various restrictions on the failure parameters. It is shown that the most important failure parameters are those related to catastrophic failures, and that putting more reliable units as basic units, which operate initially, is important when switches and recovery are imperfect.     

MOS Integrated Circuit Reliability

This paper presents information on the reliability of MOS integrated circuits based on p-channel enhancement-mode transistors, and describes their failure modes and mechanisms. The principal failure mechanisms were ion migration at the surface and oxide shorting. The results of experimental studies of the effects of variations in construction, processing, and levels of stress are presented, and are compared with other available information on MOS integrated circuit reliability. The failure rate for commercially available complex MOS arrays is on the order of 0.001 to 0.01 per 1000 h of operating life at 125°C for arrays containing approximately 600 p-channel transistors. This corresponds to a failure rate on the order of 5 × 10?6 to 5 × 10?5 per equivalent gate per 1000 h. The effects of device complexity, operating temperature, and other factors are discussed. A reliability prediction equation for MOS integrated circuits is derived from available information. An overall activation energy for functional failure mechanisms of approximately 5 kcal/mole (?0.2 eV/molecule) is considered applicable to typical MOS integrated circuits. Thus, the failure rate of MOS devices operated at 50°C ambient temperature can be predicted to be on the order of 10?6 to 10?5 per equivalent gate per 1000 h.     

A case study of C.mmp, Cm*, and C.vmp: Part II—Predicting and calibrating reliability of multiprocessor systems

This paper focuses on measurement and modeling of hard failures in multiprocessors. The failure rate predictions of the Military Standardization Handbook 217B (MIL 217B) are compared with semiconductor chip vendor data and data from Carnegie-Mellon University's multiprocessor systems. Based on these comparisons a modified MIL 217B model is proposed. The modified model is employed to calculate module failure rates for the three multiprocessors designed, implemented, and currently operating at CMU. Hard failure reliability models for these three systems are presented. These models use the calculated module failure rates as a basis for a consistent comparison of the three systems.     

A general repair, proportional-hazards, framework to model complex repairable systems

A system (machine) is observed to operate in 1 of 2 modes. The most common mode is loaded (or regular) operation. Occasionally the system is placed in an unloaded state, wherein while the system is mechanically still operating, it is assumed that the failure intensity is lower due to this reduction in operating intensity. A proportional hazards framework is used to capture this potential reduction in failure intensity due to switching of operating modes. In either operating condition, analyzed maintenance-records indicate that the system was occasionally shut down, and either a minor or a major repair was undertaken. Furthermore, despite such repairs, it is observed that both modes of operation (loaded or unloaded) resulted in random failures. On failure, 1 of 3 actions are taken: (1) failures were minimally repaired, (2) given a minor repair, or (3) given a major repair. Both minor and major repairs are assumed to impact the intensity following a virtual age process of the general form proposed by Kijima. This research develops a statistical model of such an operating/maintenance environment. Its purpose is to quantify the impacts of performing these repair actions on the failure intensities. Field data from an industrial-setting demonstrate that appropriate parameter estimates for such multiple phenomena can be obtained. Providing a richer, more detailed, modeling of the failure intensity of a system incorporating both operating conditions and repair effects has important ramifications for maintenance planning. This paper refers to related research, in which optimal timing of maintenance repairs depends fundamentally on the failure rate of the system.     

Quality assurance system and reliability testing of LSI circuits

The development of LSI circuits as well as their quality and reliability assurance in the current production require, due to the specified high quality levels, a precisely defined Quality Assurance System. Such a System was presented in the first two Sections.For the predictions of field failure rate generally the time-temperature acceleration in accordance with the Arrhenius model has to be applied. Field reliability at lower operating temperatures has to be determined from the results and defectives of sampling life-tests at elevated temperatures. Obviously for LSI circuits the time-temperature acceleration depends very strongly on different failure mechanisms involved. For this reason an efficient and correct failure rate prediction can only be performed, if the failure mechanisms in the defective chips are exactly known and classified.     

某装备开关式相敏整流电路可靠性研究

某装备开关式相敏整流电路的核心部件是变压器,根据国军标中变压器的基本故障率和工作故障率模型,研究分析了在不同条件和工作环境下变压器的工作可靠性,并对结果做了比较和分析。在此基础上,研究分析不同的冗余结构对开关式相敏整流电路可靠性的影响,提出对改进工程设计有益的结论。