Metalorganic chemical vapor deposition of silver thin films for future interconnects by direct liquid injection system

Deposition of Ag films by direct liquid injection-metal organic chemical vapor deposition (DLI-MOCVD) was chosen because this preparation method allows precise control of precursor flow and prevents early decomposition of the precursor as compared to the bubbler-delivery. Silver(I)-2,2-dimethyl-6,6,7,7,8,8,8-heptafluoro-3,5-octanedionato-triethylphosphine [Ag(fod)(PEt₃)] as the precursor for Ag CVD was studied, which is liquid at 30 °C. Ag films were grown on different substrates of SiO₂/Si and TiN/Si. Argon and nitrogen/hydrogen carrier gas was used in a cold wall reactor at a pressure of 50–500 Pa with deposition temperature ranging between 220 °C and 350 °C. Ag films deposited on a TiN/Si diffusion barrier layer have favorable properties over films deposited on SiO₂/Si substrate. At lower temperature (220 °C), film growth is essentially reaction-limited on SiO₂ substrate. Significant dependence of the surface morphology on the deposition conditions exists in our experiments. According to XPS analysis pure Ag films are deposited by DLI-MOCVD at 250 °C by using argon as carrier gas.     

Passivation of p-n junction in crystalline silicon by amorphous silicon

Hydrogenated amorphous silicon, a-Si:H, is shown to be an excellent passivant for crystalline silicon (c-Si) p-n junctions. A two-orders-of-magnitude reduction in reverse leakage current from that of a typical thermal oxide passivated junction is obtained. This is achieved through a lowering of the interface state density by hydrogenation of the c-Si surface. Superior bias-temperature stability of the passivated junctions also is observed. There is evidence that the hydrogen in the bulk of the a-Si:H can act as a hydrogen reservoir for rehydrogenation of the interface between c-Si and a-Si:H. Thermal stability of the a-Si:H is adequate for temperatures up to 500°C for 30 min, which is sufficient for most device-processing requirements. Above 550°C, significant dehydrogenation from both the interface and the bulk a-Si:H regions and an increase in leakage are observed. The passivation properties were assessed through studies of the current-voltage and current-temperature characteristics of the p-n junctions.     

Development of embedded capacitor with bismuth-based pyrochlore thin films at low temperatures for printed circuit board applications

Bi₂Mg_2/3Nb_4/3O₇ (BMN) pyrochlore films deposited on Cu/Si substrates at low temperatures are characterized for structural and dielectric properties as a function of oxygen flow rate. BMN films deposited at 150 °C were partially crystallized with nano-sized crystallines of approximately 8.7 nm. The dielectric properties of films are independent on variation of an oxygen flow rate, but the lowest leakage current densities observed in the range between 10 and 30 sccm(standard cc/min). BMN films (50 nm-thick) deposited at 100 °C and an oxygen flow rate of 30 sccm show a capacitance density of 570 nF/cm² and a breakdown voltage of 3 V.     

XRD and EXAFS studies of crystallisation in films

This paper reports a detailed structural study on the nucleation of t-HfO₂ nanocrystals in thin films of 70SiO₂–30HfO₂ prepared by sol–gel route on v-SiO₂ substrates. Thermal treatment was performed at different temperatures ranging from 900 to 1200 °C for short (30 min) or long (24 h) time periods. Crystallisation and microstructure evolutions were traced by X-ray diffraction (XRD). The local structure around hafnium ions was determined from Hf L₃-edge extended X-ray absorption fine structure (EXAFS) measurements carried out at the BM08-GILDA Beamline of ESRF (France). XRD shows the nucleation of HfO₂ nanocrystals in the tetragonal phase after heat treatment at 1000 °C for 30 min, and a partial phase transformation to the monoclinic phase (m-HfO₂) starts after heat treatment at 1200 °C for 30 min. The lattice parameters as well as the average crystallites size and their distributions were determined as a function of the heat treatment. EXAFS results are in agreement with the XRD ones, with hafnium ions in the film heat treated at 1100 °C for 24 h are present in mixed phases.     

a-Si/c-Si异质结结构太阳能电池设计分析

通过应用 Scharfetter- Gum mel解法数值求解 Poisson方程 ,对热平衡态 a- Si/ c- Si异质结太阳能电池进行计算机数值模拟分析 ,着重阐述在 a- Si/ c- Si异质结太阳能电池中嵌入 i( a- Si:H)缓冲薄层的作用 ,指出采用嵌入 i( a- Si:H )缓冲薄层设计能有效增强光生载流子的传输与收集 ,从而提高 a- Si/ c- Si异质结太阳能电池的性能 ,同时还讨论 p+ ( a- Si:H)薄膜厚度和 p型掺杂浓度对光生载流子传输与收集的影响 ,而高强度光照射下模拟计算表明 ,a- Si/ c- Si异质结结构太阳能电池具有较高光稳定性     

Ballistic electron emission microscopy studies of the temperature dependence of Schottky barrier height distribution in CoSi2/n-Si(1 0 0) diodes formed by solid phase reaction

Ballistic electron emission microscopy (BEEM) and ballistic electron emission spectroscopy have been performed on polycrystalline and epitaxial CoSi₂/n-Si(1 0 0) contacts at temperatures ranging from −144°C to −20°C. The ultra-thin CoSi₂ films (10 nm) were fabricated by solid state reaction of a single layer of Co (3 nm) or a multilayer of Ti (1 nm)/Co (3 nm)/amorphous-Si(1 nm)/Ti (1 nm) with a Si substrate, respectively. The spatial distribution of barrier height over the contact area obeys a Gaussian function at each temperature. The mean barrier height increases almost linearly with decreasing temperature with a coefficient of −0.23±0.02 meV/K for polycrystalline CoSi₂/Si diodes and −0.13±0.03 meV/K for epitaxial diodes. This is approximately equal to one or one-half of the temperature coefficient of the indirect energy gap in Si, respectively. It suggests that the Fermi level is pinned to different band positions of Si. The width of the Gaussian distribution is about 30–40 meV, without clear dependence on the temperature. The results obtained from conventional current–voltage and capacitance–voltage (I–V/C–V) measurements are compared to BEEM results.     

Correlation between infrared transmission spectra and the interface trap density of SiO2 films

This work is an attempt to estimate the electrical properties of SiO₂ thin films by recording and analyzing their infrared transmission spectra. In order to study a big variety of films having different infrared and electrical properties, we studied SiO₂ films prepared by low pressure chemical vapor deposition (LPCVD) from SiH₄ + O₂ mixtures at 425 °C and annealed at 750 °C and 950 °C for 30 min. In addition thermally grown gate quality SiO₂ films of similar thickness were studied in order to compare their infrared and electrical properties with the LPCVD oxides. It was found that all studied SiO₂ films have two groups of Si–O–Si bridges. The first group corresponds to bridges located in the bulk of the film and far away from the interfaces, the grain boundaries and defects and the second group corresponds to all other bridges located near the interfaces, the grain boundaries and defects. The relative population of the bulk over the boundary bridges was found equal to 0.60 for the LPCVD film after deposition and increased to 4.0 for the LPCVD films after annealing at 950 °C. Thermally grown SiO₂ films at 950 °C were found to have a relative population of Si–O–Si bridges equal to 3.9. The interface trap density of the LPCVD film after deposition was found equal to 5.47 × 10¹² eV⁻¹ cm⁻² and decreases to 6.50 × 10¹⁰ eV⁻¹ cm⁻² after annealing at 950 °C for 30 min. The interface trap density of the thermally grown film was found equal to 1.27 × 10¹¹ eV⁻¹ cm⁻² showing that films with similar Si–O–Si bridge populations calculated from the FTIR analysis have similar interface trap densities.     

Epitaxial growth of LaAlO3 on Si(0 0 1) using interface engineering

In this work, the potentiality of molecular beam epitaxy techniques to prepare epitaxial lanthanum aluminate (LaAlO₃) films on Si(0 0 1) is explored. We first demonstrate that the direct growth of LaAlO₃ on Si(0 0 1) is impossible : amorphous layers are obtained at temperatures below 600 °C whereas crystalline layers can be grown at higher temperatures but interfacial reactions leading to silicate formation occur. An interface engineering strategy is then developed to avoid these reactions. SrO and SrTiO₃ have been studied as buffer for the subsequent growth of LaAlO₃. Only partial LaAlO₃ epitaxy is obtained on SrO whereas high quality layers are achieved on SrTiO₃. However both SrO and SrTiO₃ appear to be unstable with respect of Si at the growth temperature of LaAlO₃ (700 °C). This leads to the formation of relatively thick amorphous interfacial layers. Despite their instability at high temperature, these processes could be used for the fabrication of twins-free LaAlO₃ templates on Si, and for the fabrication of complex oxide/Si heterostructures for various applications.     

Ultra high temperature rapid thermal annealing of GaN

All of the major acceptor (Mg, C, Be) and donor (Si, S, Se and Te) dopants have been implanted into GaN films grown on Al₂O₃ substrates. Annealing was performed at 1100–1500°C, using AlN encapsulation. Activation percentages of ≥90% were obtained for Si⁺ implantation annealed at 1400°C, while higher temperatures led to a decrease in both carrier concentration and electron mobility. No measurable redistribution of any of the implanted dopants was observed at 1450°C.     

Effect of rapid thermal annealing of sputtered aluminium nitride film in an oxygen ambient

Aluminium nitride (AlN) thin films were deposited by radio frequency (RF) magnetron sputtering on p-type silicon (Si) substrate of (1 0 0) orientation using only argon (Ar) gas at substrate temperature of 300 °C. In order to achieve improved electrical properties, we performed post-deposition rapid thermal annealing (RTA). Sputtered AlN films were annealed in an oxygen ambient at temperatures of 600, 700, and 800 °C using RTA for 30 min. The orientation of the AlN crystal in the film was investigated using X-ray diffraction (XRD). The characteristic spectra by functional group were analyzed by Fourier transformation infrared (FTIR) spectroscopy. The electrical properties of the AlN thin films were studied through capacitance–voltage (C–V) characteristics in metal–insulator–semiconductor (MIS) device using the films as insulating layers. The flatband voltages (V_FB) in C–V curves were found to depend on crystal orientations. Negative V_FB was found in the case when AlN (1 0 0) peak was found. Also, when AlN (1 0 3) peak was observed upon increasing the annealing temperature, the value of V_FB was positive and after annealing at 700 °C, AlN (1 0 3) peak intensity was found to be maximum and V_FB was as high as+6.5 V.     

Evidence that N2O is a stronger oxidizing agent than O2 for both Ta2O5 and bare Si below 1000 °C and temperature for minimum low-K interfacial oxide for high-K dielectric on Si

N₂O is known to be the stronger oxidizing agent than O₂ for the post-deposition annealing of Ta₂O₅·N₂O should also be stronger than O₂ for Si oxidation. However, NO released from N₂O is also a nitridation agent which can produce silicon oxynitride at a temperature above 1000 °C and silicon oxynitride can be a diffusion barrier for oxygen. Below 1000 °C, SiO sublimation can make the comparison of N₂O oxidation and O₂ oxidation of Si difficult. Below 750 °C, N₂O is obviously the faster oxidizing agent than O₂ for bare Si. Furthermore, our results show that minimum interfacial SiO_x, which has a low dielectric constant, occurs at about 800 °C or 950 °C for high-K metallic oxide gate insulator for future generations of CMOS because rapid thermal oxidation at these two temperatures can help to reduce leakage current or charge trapping by suppressing oxygen vacancies without too much low-K interfacial SiO_x formation.     

Nanoindentation-induced phase transformation in crystalline silicon and relaxed amorphous silicon

Nanoindentation-induced phase transformation in both crystalline silicon (c-Si) and relaxed amorphous silicon (a-Si) have been studied. A series of nanoindentations were made with a sharp diamond Berkovich tip. During nanoindentations, maximum loads were applied from 1000 to 6000 μN, with a 1000 μN/s loading rate. A slow unloading rate at 100 μN/s was chosen to favor the formation of the high-pressure polycrystalline phases (Si-III and Si-XII). A fast unloading rate within 1 s was used to obtain a-Si end phase. The nanoindentation behavior and the structure of deformation regions were examined by load–depth characteristics curves and Raman. Large differences were observed between the transformation behavior in c-Si and that in relaxed a-Si. Indentation curves in c-Si present plastic deformation curves with elbow (no pop-out) on the unloading curves, even for loads up to 9000 μN. On the other hand, indentations in relaxed a-Si give rise to the same plastic deformation as c-Si at low loads (1000–2000 μN), whereas show clear pop-outs at high loads (above 3000 μN). Raman results suggest that high-pressure phases (HPPs) can occur more easily within a relaxed a-Si matrix than in a c-Si matrix. The results suggest a significantly different indentation behavior and phase transformation sequence in c-Si and relaxed a-Si at the nanoscale.     

Interface properties of the Si(1 0 0)–SiO2 system formed by rapid thermal oxidation

In this work, the properties of the Si(1 0 0)–SiO₂ interface are examined directly following wet and dry rapid thermal oxidation (RTO) at 1000–1100°C. The high frequency and quasi-static CV response of the Si(1 0 0)–SiO₂ system are measured using a mercury probe method. The analysis indicates a high interface state density across the band gap for dry oxidation, with a characteristic peak in the range 0.8–0.9 eV above the valence band edge. These interface state profiles are compared to polysilicon/oxide/Si(1 0 0) structures, measured after rapid thermal annealing at 1050°C (where the gate oxide is grown by conventional furnace oxidation). The results show a striking similarity, pointing to a common origin for the interfacial defects. Steam-assisted RTO samples do not reveal these peaks, and the reasons for this are presented. The significance of these new results to thin oxide growth and optimisation by RTO are discussed.     

Characterization of crystalline MOCVD SrTiO3 films on SiO2/Si(100)

SrTiO₃ thin films (STO), were deposited on Si(100) covered by 2 nm of SiO₂, at different temperatures from 450 °C to 850 °C using liquid injection MOCVD, the bimetallic precursor being Sr₂Ti₂(OiPr)₈(tmhd)₄. The STO films were analysed by XRD, FTIR, SIMS and TEM. An amorphous layer was observed between STO and SiO₂/Si. The nature and thickness of the interlayer were determined, as well as the most favourable conditions for a good quality crystalline STO film, and a reduced interlayer.     

Influence of the annealing temperature on the IR properties of SiO2 films grown from SiH4 + O2

Dispersion analysis was performed on low pressure chemically vapor deposited (LPCVD) SiO₂ films grown from SiH₄ + O₂ at 425 °C. The transmission spectra were analyzed using four Lorentz oscillators within the range 900–1400 cm⁻¹. It was found that the distribution of the SiOSi angles is a superposition of two Gaussians; one corresponding to bridges located in the bulk of the film and one corresponding to bridges located close to the boundaries of the film namely the interfaces of the films and the grain boundaries. The ratio between the bulk like SiOSi bridges over the boundary bridges was found equal to 0.61:1 indicating that films grown from SiH₄ + O₂ contain a higher number of boundary SiOSi bridges relative to those located in the bulk of the film. After annealing for 30 min at temperatures in the range from 550 to 950 °C, films were found to have a lower thickness. The calculated ratio of the two distributions after annealing have shown a clear reduction in the concentration of the boundary bridges as the temperature of annealing increases, in advance of the bridges located in the bulk of the film. For the film annealed at 950 °C for 30 min the ratio was found equal to 4.0:1 which is the same to that of thermally grown films at the same temperature.     

Silicide application on gated single-crystal, polycrystalline andamorphous silicon FEAs. I. Mo silicide

In order to improve both the level and the stability of electron field emission, the tip surface of silicon field emitters have been coated with a molybdenum layer of thickness 25 nm through the gate opening and annealed rapidly at 1000°C in inert gas ambient. The gate voltages of single-crystal silicon (c-Si), polycrystalline silicon (poly-Si) and amorphous silicon (a-Si) field emitter arrays (FEAs) required to obtain anode current of 10 nA per tip are 90 V, 69 V, and 84 V, respectively. In the case of the silicide emitters based on c-Si, poly-Si and a-Si, these gate voltages are 76 V, 63 V, and 69 V, respectively. Compared with c-Si, poly Si and a-Si field emitters, the application of Mo silicide on the same silicon field emitters exhibited 9.6 times, 2.1 times, and 4.2 times higher maximum emission current, and 6.1 times, 3.7 times, and 3.1 times lower current fluctuation, respectively. Moreover, the emission currents of the silicide FEAs depending on vacuum level are almost same in the range of 10^-9~10^-6 torr. This result shows that silicide is robust in terms of anode current degradation due to the absorption of air molecules     

Characteristics of a-Si solar cells prepared by the super chamber at a high substrate temperature

A new approach to high-performance a-Si solar cells was studied. a-Si films prepared at a high substrate temperature (> 250°C) have a higher absorption coefficient and a low Si H₂ bond density. the effect of deposition temperature on the open-circuit voltage (V_oc) has been investigated systematically for glass/SnO2 Ipin/metal and glass/metal/nip/indium tin oxide (ITO) structure a-Si solar cells. The V_oc is found to depend strongly on the thermal history of the p/i interface. A short-circuit current of 19.5 mA/cm⁻⁻² was achieved for an a-Si solar cell using an a-Si i-layer with a thickness of 4000 Å, which was prepared at a substrate temperature of 270°C.     

等离子体过程不稳定性和氢处理对HIT电池界面特性影响的研究

采用等离子体增强化学气相沉积（PECVD）技术制备薄膜硅/晶体硅异质结,通过测量沉积了本征非晶硅（a-Si:H(i)）后晶体硅（c-Si）的少子寿命以及结构为Ag/a-Si:H(p)/a-Si:H(i)/c-Si(n) /Ag 异质结的暗I-V特性,研究了等离子体初期瞬态过程和氢预处理对异质结界面性质的影响。结果表明：使用挡板且当挡板时间（tS）大于100秒时,可以有效地减少等离子体初期瞬态过程对界面性质的负面影响;与热丝化学气相沉积中氢原子处理有利于界面钝化不同,PECVD中的氢等离子体处理,由于氢原子的轰击特性,对钝化可能存在一定的不利影响;最优氢预处理时间为60秒。     

Conduction type and defect levels of β-FeSi2 films grown by MBE with different Si/Fe ratios

[1 0 0]-oriented β-FeSi₂ films were grown on Si(0 0 1) substrates by molecular beam epitaxy (MBE) with a deposited Si to Fe atomic ratio (Si/Fe ratio) varied from 1.6 to 2.8. It was found that the conduction type of the β-FeSi₂ films changed from p- to n-type between the deposited Si/Fe=2.4 and 2.8. Rutherford Back Scattering (RBS) measurements revealed that the real Si/Fe ratio of β-FeSi₂ is 2.0–2.1 for all the samples after 900°C annealing for 14 h, showing that stoichiometry of the grown films is almost satisfied even though the deposited Si/Fe ratio was away from stoichiometry.     

Energy pay-back time and life-cycle CO2 emission of residential PV power system with silicon PV module

The concerns about environmental impacts of photovoltaic (PV) power systems are growing with the increasing expectation of PV technologies. In this paper, three kinds of silicon-based PV modules, namely single-crystalline silicon (c-Si), polycrystalline silicon (poly-Si) and amorphous silicon (a-Si) PV modules, are evaluated from the viewpoint of their life-cycle. For the c-Si PV module it was assumed that off-grade silicon from semiconductor industries is used with existing production technologies. On the other hand, new technologies and the growth of production scale were presumed with respect to the poly-Si and a-Si PV modules. Our results show that c-Si PV modules have a shorter energy pay-back time than their expected lifetime and lower CO₂ emission than the average CO₂ emission calculated from the recent energy mix in Japan, even with present technologies. Furthermore the poly-Si and the a-Si PV modules with the near-future technologies give much reduction in energy pay-back times and CO₂ emissions compared with the present c-Si PV modules. The reduction of glass use and the frameless design of the PV module may be effective means to decrease them more, although the lifetime of the PV module must be taken into account. © 1998 John Wiley & Sons, Ltd.