High-voltage bipolar mode JFET with normally off characteristics

The first realization of a power vertical JFET operated in the bipolar mode (BJFET) with normally off behavior is reported. The structure combines minority carrier injection from the gate region in the on-state, and lateral pinch-off of the channel, due to the built-in voltage, in the off-state. The realized devices show high blocking voltages, up to 900 V, with zero gate bias, and have extremely low on-resistance. Fast switching speeds with forced gate turn-off times as low as 100 ns for devices of 600-V blocking voltages have been obtained.     

On-state modeling of power JFET structures in the bipolar mode

An analytical model for the on-state operation of the bipolar-mode power JFET is proposed. A closed-form solution in the low-voltage rnage of the output characteristics is obtained as a function of device parameters.The model shows that the hole-reflecting properties of the high-low drain transition are very important in order to achieve a lower on-state voltage drop. This allows us to explain the presence of an offset voltage in the output characteristics due to the recombination velocity effect at this transition.The effects of device parameters on the on-state operation, such as epi-thickness, lifetime and extent of heavy doping of source and drain are analyzed in detail and found in good agreement with experimental results.     

Physical modeling of bipolar mode JFET for CAE/CAD simulation

A circuit model of a power bipolar JFET, based on a specific formulation of its charge control model,is presented. The circuit obtained accurately describes both unipolar and bipolar modes of operation of the device, and is presented in a form suitable to be incorporated in circuit CAD (computer-aided design) simulators. The model was developed on a physical basis, and its parameters can in principle be directly computed from geometrical and physical characteristics of the device. The author also presents the implementation of the model into the version 4.02 of PSPICE obtained by modifying a device subroutine     

A quasi-one-dimensional analysis of vertical JFET devices operated in the bipolar mode

“Bipolar operation”, namely forward-basing the gate-source diode of a JFET, has been proposed in the literature as a means to reduce the on-state resistance of such devices.In this paper, the physics of bipolar operation of power JFET's is analysed in detail and closed-form solutions of its output characteristics are derived as a function of the device geometry and of physical parameters of the semiconductor.From that model, it turns out that the low value of the saturation voltage originates from the existence of an high-density electron-hole plasma that fills the space between source and drain. In the active region of the output characteristics, the control of the gate current the drain current is due to the possibility to control the level of majority-carrier injection from the source transition. The closed-form expression for the current gain allows to identify the structure parameters that affect it. It shown that, under suitable conditions, a substantial current amplification can be observed.The model has been found to be in good agreement with the results obtained on experimental devices.     

Investigation of MOSFET operation in bipolar mode

The work is concerned with the properties of conventional MOSFET in bipolar mode of operation. It is shown that the base current can provide useful information about interface trap density at the Si–SiO₂ interface. The new device characteristics are found promising for use in low-voltage low-power logic circuits.     

A JFET/bipolar eight-channel analog multiplexer

Describes the design and fabrication of the first of a new generation of analog multiplexers using the bipolar/ionimplanted JFET process. The switch configuration used is especially suited to this process, and consequently results in a moderate size bipolar IC. The design of the switch, aided by the process characteristics, produces a high-performance monolithic multiplexer which can withstand input signals of greater than the power supplies and does not require special care in handling. A high degree of optimization is attained in the design of the bias circuits, and this plays a major role in achieving high fabrication yield, and subsequently low production costs.     

Micropower monolithic filters using bipolar/JFET technology

Two approaches for the implementation of micropower monolithic filters operating from a 1.3-V supply were investigated. The filters were fabricated using a bipolar/JFET compatible technology. The characteristics and limitations of each of the filtering approaches are discussed and a comparison between the two, based on the performance of second-order bandpass filter realizations, is presented.     

A low-voltage micropower JFET/bipolar operational amplifier

A single cell supply (operable down to 1.2 V) micropower operational amplifier using compatible low pinchoff voltage JFET's (V/SUB p/=0.4 V) in conjunction with standard bipolar technology has been developed. The subvolt pinchoff JFET's have proved useful in the common-mode feedback-assisted biasing of a simple p-n-p input stage to permit single supply operation, the design of a low-voltage high-performance current mirror and a differential to single-ended converter. The amplifier exhibits excellent ac performance (unity gain slew rate=0.25 V//spl mu/s, unity gain bandwidth=850 kHz) with low power dissipation (245 /spl mu/W).     

Micropower monolithic filters using bipolar/JFET technology

Two approaches for the implementation of micropower monolithic filters operating from a 1.3-V supply were investigated. The filters were fabricated using a bipolar/JFET compatible technology. The characteristics and limitations of each of the filtering approaches are discussed and a comparison between the two, based on the performance of second-order bandpass filter realizations, is presented.     

High power single mode operation of AlGaInP visible laser diodewith lateral leaky waveguide structure

AlGaInP visible laser diode with lateral leaky waveguide structure employing 0.025 of negative refractive index step have been fabricated. In comparison to conventional loss guided structure, lateral leaky waveguide structure indicated stable fundamental mode operation. The output power at kink for lateral leaky waveguide laser was around 1.5 times higher than loss guided structure for same stripe widths. The stability was attributed to large mode discrimination against higher order mode. The lateral leaky waveguide laser with 560 μm cavity length employing the antireflection (5%)/high reflection (82%) showed 66 mW of output power with no kinks at 25°C     

电力变电运行管理模式的创新

随着社会经济的快速发展和科学技术水平的不断提高,我国的电力事业也繁荣发展起来。在电力系统运行的过程中,变电运行的管理是十分重要的,但是在实际的电力运行管理工作进行的过程中,常常会出现一些故障,这些故障应该及时解决,不然很可能会为相关的电力系统的正常运行带来一定的阻碍。文章以电力变电运行为切入点,积极探索电力变电运行管理模式的创新。     

High temperature physical modeling and verification of a novel 4H-SiC lateral JFET structure

This paper studies the unique behavior of a novel 4H-SiC LJFET structure, featuring the series-connection of a normally-on lateral channel with normally-off vertical channels. A comprehensive physical model is established for the novel structure to explain its different static and dynamic characteristics than the conventional LJFET structure, both at room temperature and high temperature (300 °C). Finite element numerical simulation and experimental measurement are carried out to verify the validity of the established physical model. Good agreements have been achieved among these three sets of results. For the first time, the modeling work studied the detailed operating mechanism and provided valuable design guidelines for SiC LJFET device at temperature as high as 300 °C.     

JFET optical detectors in the charge storage mode

The operation of a JFET as an optical detector in the charge storage mode is described and it is shown that due to the nondestructive readout, this device is particularly useful when high charge gains are required. On silicon, for example, it is calculated that small device structures should give charge gains > 10⁶. A method of resetting devices using the punchthrough effect is shown to reduce gain variations across an array and this principle is extended to a double punchthrough structure with a buried gate which can be read selectively. Measurements on lateral and longitudinal JFET structures verify these features and it is shown that they may be operated as two-terminal devices, a large voltage pulse being applied to the drain to reset and a small voltage to read.     

High output power and high temperature operation of 1.5 μmDFB-PPIBH laser diodes

Highly efficient 1.5-μm distributed-feedback (DFB) p-substrate partially-inverted buried heterostructure laser diodes with a thin active layer developed using a metal-organic chemical vapor deposition technique are discussed. An average slope efficiency of 0.26 mW/mA (quantum efficiency 33%) and maximum slope efficiency of 0.39 mW MW/mA (49%) were achieved. The full width at half maximum in the direction perpendicular to the junction plane of 25° was obtained. A high output power of 77 mW was obtained under CW conditions at room temperature. This laser diode lased up to 120°C, and more than 10 mW was obtained, even at 90°C     

High current gain hybrid lateral bipolar operation of DMOStransistors

This paper describes a new operation mode of the DMOS transistor. By utilizing the diffused channel region as base and connecting it to the gate, hybrid lateral bipolar operation is obtained in the device. Current gain higher than 2000 and a cut-off frequency of 1.6 GHz are achieved. Superior breakdown voltages were obtained compared to previously published hybrid devices. It is demonstrated that hybrid operation of a DMOS transistor is a simple way to implement a high gain lateral bipolar transistor, without complex sub-μm processing     

高压SiC JFET研究进展

利用自主生长的SiC外延材料,采用干法刻蚀μm级密集深槽工艺技术和高能、高剂量离子注入结合高温激活退火方法,进行SiC电力电子JFET器件的开发,研制出常开型、常关型SiC JFET器件,反向阻断电压都达到1 700V,正向电流达3.5A。常开型JFET的夹断电压在-1.7V,最大跨导Gm为0.52S,比导通电阻最小到4.6mΩ.cm2;常关型JFET的夹断电压在0.9V,最大跨导Gm为1.07S,比导通电阻最小到4.2mΩ.cm2。常开型与常关型器件的栅流开启时栅电压差距小,常开型VG=3.5V时,栅流开始出现,常关型VG=3.3V时,栅流开始出现。     

Estimation of SiC JFET temperature during short-circuit operations

This paper presents results showing the robustness of different SiC JFET transistors from SiCED in current limitation regime or short-circuit operation. Crystal temperature during failure was estimated after different electrical characterizations and using appropriate models of saturation current which is used as a thermal indicator. This work shows the exceptional robustness of SiC JFET transistors in current limitation mode compared to Si devices (MOSFETS and IGBTs).     

An epitaxial emitter-cap SiGe-base bipolar technology optimized forliquid-nitrogen temperature operation

We give the first demonstration that a properly designed silicon bipolar technology can achieve faster unloaded circuit speed at liquid-nitrogen temperature than at room temperature. Transistors were fabricated using a reduced-temperature process employing an in situ arsenic-doped polysilicon emitter contact, a lightly phosphorus-doped epitaxial emitter-cap layer, and a graded SiGe base. At 84 K, transistors have a current gain of 500, with a cutoff frequency of 61 GHz, and a maximum oscillation frequency of 50 GHz. ECL circuits switch at a record 21.9 ps at 84 K, 3.5-ps faster than at room temperature. Circuits which were optimized for low-power operation achieve a minimum power-delay product of 61 fJ (41.3 ps at 1.47 mW), nearly a factor of two smaller than the best achieved to date at 84 K. The unprecedented performance of these transistors suggests that SiGe-base bipolar technology is a promising candidate for cryogenic applications requiring the fastest possible devices together with the processing maturity and integration level achievable with silicon fabrication     

Microwave operation of high power InGaP/GaAs heterojunction bipolar transistors

The first high power demonstration of an InGaP/GaAs heterojunction bipolar transistor is presented. Multifinger selfaligned HBTs were tested at 3 GHz. A maximum output power of 2.82 W CW was obtained for a 600 mu m/sup 2/ emitter area device (4.7 mW/ mu m/sup 2/ power density) with an attendant gain of 6.92 dB; simultaneously, the device exhibited 55.2% power added efficiency, 69.1% collector efficiency and 8.0*10/sup 4/ A/cm/sup 2/ emitter current density.<>