89-GHz fT room-temperature silicon MOSFETs

The authors report the implementation of deep-submicrometer Si MOSFETs that at room temperature have a unity-current-gain cutoff frequency (f_T) of 89 GHz, for a drain-to-source bias of 1.5 V, a gate-to-source bias of 1 V, a gate oxide thickness of 40 Å, and a channel length of 0.15 μm. The fabrication procedure is mostly conventional, except for the e-beam defined gates. The speed performance is achieved through an intrinsic transit time of only 1.8 ps across the active device region     

75-GHz fT SiGe-base heterojunction bipolartransistors

The fabrication of silicon heterojunction bipolar transistors which have a record unity-current-gain cutoff frequency (f_T) of 75 GHz for a collector-base bias of 1 V, an intrinsic base sheet resistance (R_bi) of 17 kΩ/□, and an emitter width of 0.9 μm is discussed. This performance level, which represents an increase by almost a factor of 2 in the speed of a Si bipolar transistor, was achieved in a poly-emitter bipolar process by using SiGe for the base material. The germanium was graded in the 45-nm base to create a drift field of approximately 20 kV/cm, resulting in an intrinsic transit time of only 1.9 ps     

Process integration and device performance of a submicrometerBiCMOS with 16-GHz ft double poly-bipolar devices

Submicrometer-channel CMOS devices have been integrated with self-aligned double-polysilicon bipolar devices showing a cutoff frequency of 16 GHz. n-p-n bipolar transistors and p-channel MOSFETs were built in an n-type epitaxial layer on an n⁺ buried layer, and n-channel MOSFETs were built in a p-well on a p⁺ buried layer. Deep trenches with depths of 4 μm and widths of 1 μm isolated the n-p-n bipolar transistors and the n- and p-channel MOSFETs from each other. CMOS, BiCMOS, and bipolar ECL circuits were characterized and compared with each other in terms of circuit speed as a function of loading capacitance, power dissipation, and power supply voltage. The BiCMOS circuit showed a significant speed degradation and became slower than the CMOS circuit when the power supply voltage was reduced below 3.3 V. The bipolar ECL circuit maintained the highest speed, with a propagation delay time of 65 ps for C_L=0 pF and 300 ps for C_L=1.0 pF with a power dissipation of 8 mW per gate. The circuit speed improvements in the CMOS circuits as the effective channel lengths of the MOS devices were scaled from 0.8 to 0.4 μm were maintained at almost the same ratio     

Process investigations for a 30-GHz fT submicrometerdouble poly-Si bipolar technology

Major process issues are investigated to establish a manufacturable process for a 30-GHz f_T deep-trench isolated submicrometer double polysilicon bipolar technology. A thinner deep-trench surface oxide minimizes crystal defects generated by thermal stresses during the subsequent processes, and significantly improves collector-to-emitter leakage currents in npn transistors. The effects of reactive-ion-etch (RIE) process used for the base surface oxide etch are evaluated in terms of current gain, emitter resistance, and cutoff frequency of the npn transistors. Silicon surface roughness created by an RIE process produces a nonuniform interface oxide film between the emitter polysilicon and the silicon surface, which results in a lower current gain due to a retardation of arsenic diffusion from the emitter polysilicon through the unbroken thicker portion of the interface oxide film. Lateral pnp transistors and Schottky diodes using a vanadium silicide are characterized as a function of epitaxial layer thickness. Schottky diodes are integrated with high performance npn transistors without using extra photo-masking process steps. The reverse leakage currents of Schottky diodes fabricated by using an RIE process are acceptable for practical use in circuits. A planarization process is investigated by employing an RTA reflow of BPSG films deposited in an LPCVD furnace. The maximum RTA reflow temperature is limited to 1000°C in order to maintain an acceptable integrity of TiSi₂ layer formed on top of the n+ polysilicon layer. The planarity achieved by an RTA reflow at a temperature between 975°C and 1000°C is acceptable for double polysilicon bipolar integrated circuits using metal interconnects produced by an electroplated gold process     

MBE-grown Si/SiGe HBTs with high β, fT,and fmax

Si/SiGe heterojunction bipolar transistors (HBTs) were fabricated by growing the complete layer structure with molecular beam epitaxy (MBE). The typical base doping of 2×10¹⁹ cm^-3 largely exceeded the emitter impurity level and led to sheet resistances of about 1 kΩ/□. The devices exhibited a 500-V Early voltage and a maximum room-temperature current gain of 550, rising to 13000 at 77 K. Devices built on buried-layer substrates had an f_max of 40 GHz. The transit frequency reached 42 GHz     

Effect of reduced temperature on the fT ofAlGaAs/GaAs heterojunction bipolar transistors

The high-frequency and DC performances of single-heterojunction Al _0.25Ga_0.75As/GaAs heterojunction bipolar transistors (HBTs) have been measured at temperatures between 300 and 110 K. It is found that the maximum unity-current-gain cutoff frequency increases from 26 GHz at 300 K to 34 GHz at 110 K. It is shown that electron diffusion as determined from the majority-carrier mobility does not accurately estimate the base transit time, at least until corrections for degeneracy and minority-carrier mobility enhancement are included. Reasonable agreement is obtained assuming that base transport is limited by the thermal velocity of electrons at reduced temperatures     

Improved current gain and fT through dopingprofile selection in linearly graded heterojunction bipolar transistors

Analytical and experimental results are used to show that extension of a thin p-doped layer of base doping into the graded-gap region, close to the base, of an n-p-n AlGaAs/GaAs heterojunction bipolar transistor and removing n-type dopant from the rest of the linearly graded AlGaAs region improves current gain β and unity gain cutoff frequency f_T. Current gain is significantly improved by reducing recombination near the metallurgical interface and using the effective electric field from the grading to accelerate electrons as they are injected into the p-base. The doping profile also inhibits the formation of a potential minimum in which electrons can be stored in close proximity to the base. This greatly improves f_T, and does not hamper the current injection or increase the turn-on voltage. Space-charge recombination current is also reduced, due to the carrier density reduction associated with the effective electric field due to the graded gap     

Bias dependence of fT and fmax in anIn0.52Al0.48As/n+-In0.53Ga0.47As MISFET

Detailed microwave characterization of a recently fabricated In _0.52Al_0.48As/n⁺-In_0.53Ga _0.47As MISFET reveals that high values of current-gain cutoff frequency (f_T) and unilateral-gain cutoff frequency (f_max) are obtained for a broad range of gate bias voltage values. A significant peak in f_T and f _max has also been observed at high gate-source bias values. The peak coincides with the onset of electron accumulation at the heterointerface and is attributed to reduced ionized impurity scattering coupled with reduced drain conductance. This result suggests an improved device structure that optimizes operation in the accumulation regime     

On the leverage of high-fT transistors foradvanced high-speed bipolar circuits

A detailed study on the leverage of high-f_T transistors for advanced high-speed bipolar circuit applications is presented. It is shown that for the standard ECL (emitter-coupled logic) circuit, the leverage of high f_T is limited by the passive resistors (emitter-follower resistor and collector load resistor) and wire delay, especially in the low-power regime. For the standard NTL (nonthreshold logic) circuit, the leverage is higher due to its front-end configuration and lower power supply value. As the passive resistors are decoupled from the delay path in various advanced circuits utilizing active-pull-down schemes, the leverage of high F_T becomes more significant     

Reduction of ft by nonuniform base bandgapnarrowing

Analytical and simulation results are presented to illustrate qualitatively the effect of doping on base transit time. Nonuniform base bandgap narrowing (BGN) in silicon bipolar transistors can give rise to an electric field that is comparable to and against the built-in field. The base transit time τ is subsequently increased, leading to a deterioration of the cutoff frequency f₁. It is shown that the BGN effectively reduces the impurity profile grading factor K and subsequently the transit-time coefficient η. Physically, the minority carriers can be thought of as moving in a new profile characterized by a reduced η but in the absence of BGN. Unlike earlier investigations which also consider effective BGN dopings but ignore the field effects, this treatment includes their impact on the minority-carrier base transit time. For a steep exponential profile with strong BGN, an increase of η by a factor 3.57 at 300 K is calculated. Device simulations predict a smaller f_t reduction factor of 1.5 for more general profiles     

Hot-electron InGaAs/InP heterostructure bipolar transistors withfT of 110 GHz

A hot-electron InGaAs/InP heterostructure bipolar transistor (HBT) is discussed. A unity-current-gain cutoff frequency of 110 GHz and a maximum frequency of oscillation of 58 GHz are realized in transistors with 3.2×3.2-μm² emitter size. Nonequilibrium electron transport, with an average electron velocity approaching 4×10⁷ cm/s through the thin (650 Å) heavily doped (p=5×10¹⁹ cm^-3) InGaAs base and 3000-Å-wide collector space-charge region, results in a transit delay of 0.5 ps corresponding to an intrinsic cutoff frequency of 318 GHz     

Importance of source and drain resistance to the maximum fT of millimeter-wave MODFETs

The usual approximate expression for measured f_T =[g_m/2π (C_gs+C _gd)] is inadequate. At low drain voltages just beyond the knee of the DC I-V curves, where intrinsic f _t is a maximum for millimeter-wave MODFETs, the high values of C_gd and G_ds combine with the high g_m to make terms involving the source and drain resistance significant. It is shown that these resistances can degrade the measured f_T of a 0.30-μm GaAs-AlGaAs MODFET from an intrinsic maximum f_T value of 73 GHz to a measured maximum value of 59 GHz. The correct extraction of maximum f_T is essential for determining electron velocity and optimizing low-noise performance     

0.33-μm gate-length millimeter-wave InP-channel HEMTs with highf1 and fmax

The fabrication of 0.33-μm gate-length AlInAs/InP high electron mobility transistors (HEMTs) is reported. These InP-channel devices have f_t values as high as 76 GHz, f_max values of 146 GHz, and maximum stable gains of 16.8, 14, and 12 dB at 10, 18, and 30 GHz, respectively. The extrinsic DC transconductances are as high as 610 mS/mm; with drain-source breakdown voltages exceeding 10 V. The effective electron velocity in the InP channel is estimated to be at least 1.8×10⁷ cm/s, while the f_tL_g product is 29 GHz-μm. These results are comparable to the best reported results for similar InGaAs-channel devices     

Fabrication of 200-GHz fmax resonant-tunnelingdiodes for integration circuit and microwave applications

Room-temperature current densities of 1.3×10⁵ A/cm² and peak-to-valley ratios of 2.5 have been achieved for resonant tunneling diodes (RTDs) in the GaAs/AlAs material system. The devices were fabricated in a microwave-compatible process using topside contacts and a semi-insulating substrate to allow device integration. Proton implantation creates a nonconducting surface compatible with high-frequency coplanar transmission lines and other passive microwave structures     

An input-free VT extractor circuit using atwo-transistor differential amplifier

A three-terminal circuit (power, ground, and output) that provides a DC output voltage equal to the MOS threshold voltage V_T is presented. The circuit uses the four-terminal extractor topology of Z. Wang (1992), but it adds self-biasing and a two-transistor differential amplifier to provide a ground-referenced output voltage     

High/fmax collector-up AlGaAs/GaAsheterojunction bipolar transistors with a heavily carbon-doped basefabricated using oxygen-ion implantation

AlGaAs/GaAs collector-up heterojunction bipolar transistors (HBTs) with a heavily carbon-doped base layer were fabricated using oxygen-ion implantation and zinc diffusion. The high resistivity of the oxygen-ion-implanted AlGaAs layer in the external emitter region effectively suppressed electron injection from the emitter, allowing collector current densities to reach values above 10⁵ A/cm ². For a transistor with a 2-μm×10-μm collector, f_T was 70 GHz and f_max was as high as 128 GHz. It was demonstrated by on-wafer measurements that the first power performance of collector-up HBTs resulted in a maximum power-added efficiency of as high as 63.4% at 3 GHz     

Automatic VT extractors based on ann×n2 MOS transistor array and theirapplication

The development of incremental and decremental V_T extractors based on the square-law characteristic and an n ×n² transistor array is described. Different implementations have been discussed and the effect of nonidealities such as mobility reduction, channel-length modulation, mismatch, and body effect has been analyzed. Besides automatic V_T extraction, parameter K of an MOS transistor can also be extracted automatically using the V_T extractor, without any need of calculation and delay, and the extracted V_T and K are, respectively, in voltage and current. Experimental results are presented and indicate that the differences between extracted values using the V_T extractor and the most popular numerical method are as small as 0.15% and 0.064%. Additional applications, such as in level shifting, temperature compensation, and temperature measurement, where the V_T extractor can be used either as a PTAT sensor or as a centigrade sensor, are presented     

Quarter-micrometer gate ion-implanted GaAs MESFET's with an f1 of 126 GHz

The fabrication and characterization of a 0.25-μm-gate, ion-implanted GaAs MESFET with a maximum current-gain cutoff frequency f_t of 126 GHz is reported. Extrapolation of current gains from bias-dependent S-parameters at 70-100% of I _dss yields f₁'s of 108-126 GHz. It is projected that an f₁ of 320 GHz is achievable with 0.1-μm-gate GaAs MESFETs. This demonstration of f₁'s over 100 GHz with practical 0.25-μm gate length substantially advances the high-frequency operation limits of short-gate GaAs MESFETs     

Si/a-Si:H heterojunction microwave bipolar transistors with cut-offfrequencies ft above 5 GHz

The fabrication of a silicon heterojunction microwave bipolar transistor with an n⁺ a-Si:H emitter is discussed, and experimental results are given. The device provides a base sheet resistance of 2 kΩ/□ a base width 0.1 μm, a maximum current gain of 21 (V_CE=6 V, I_c=15 mA), and an emitter Gummel number G _E of about 1.4×10¹⁴ Scm^-4. From the measured S parameters, a cutoff frequency f_t of 5.5 GHz and maximum oscillating frequency f_max of 7.5 GHz at V_CE=10 V, I_c=10 mA are obtained     

0.2-μm gate-length atomic-planar doped pseudomorphic Al0.3Ga0.7As/In0.25Ga0.75As MODFETswith fT over 120 GHz

The authors report the DC and RF performance of nominally 0.2-μm-gate length atomic-planar doped pseudomorphic Al_0.3Ga_0.7As/In_0.25Ga_0.75As modulation-doped field-effect transistors (MODFETs) with f_T over 120 GHz. The devices exhibit a maximum two-dimensional electron gas (2 DEG) sheet density of 2.4×10¹² cm^-2, peak transconductance g _m of 530-570 mS/mm. maximum current density of 500-550 mA/mm, and peak current-gain cutoff frequency f_T of 110-122 GHz. These results are claimed to be among the best ever reported for pseudomorphic AlGaAs/InGaAs MODFETs and are attributed to the high 2 DEG sheet density, rather than an enhanced saturation velocity, in the In_0.25Ga_0.75As channel