The development of a low-stress polysilicon process compatible withstandard device processing

When surface micromachined devices are combined with on-chip circuitry, any high-temperature processing must be avoided to minimize the effect on active device characteristics. High-temperature stress annealing cannot be applied to these structures. This work studies the effects of deposition parameters and subsequent processing on the mechanical properties of the polysilicon film in the development of a low-strain polysilicon process, without resorting to high-temperature annealing. The films are deposited as a semi-amorphous film and then annealed, in situ at 600°C for 1 h, to ensure the desired mechanical characteristics for both doped and undoped samples. This low temperature anneal changes the strain levels in undoped films from -250 to +1100 με. The best results have been obtained for an 850°C anneal for 30 min which is used to activate the dopant (both phosphorus and boron). No further stress annealing was used, and 850°C does not present problems in terms of thermal budget for the electrical devices. It is shown that these mechanical characteristics are achieved by forming the grain boundaries during subsequent low temperature annealing, and not during deposition. TEM (transmission electron microscopy) studies have been used to investigate the link between the structure and mechanical strain. This has shown that it is the formation of the grain boundary rather than the grain size which has a significant effect on strain levels, contrary to reports in the literature. Using the above-mentioned deposition process, a series of experiments have been performed to establish the flexibility in subsequent processing available to the designer. Therefore, by careful consideration of the processing, a low-temperature polysilicon process, which can be used to fabricate thin micromachined structures, has been developed     

Thermal conductivity of doped polysilicon layers

The thermal conductivities of doped polysilicon layers depend on grain size and on the concentration and type of dopant atoms. Previous studies showed that layer processing conditions strongly influence the thermal conductivity, but the effects of grain size and dopant concentration were not investigated in detail. The current study provides thermal conductivity measurements for low-pressure chemical-vapor deposition (LPCVD) polysilicon layers of thickness near 1 μm doped with boron and phosphorus at concentrations between 2.0×10¹⁸ cm^-3 and 4.1×10¹⁹ cm^-3 for temperatures from 20 K to 320 K. The data show strongly reduced thermal conductivity values at all temperatures compared to similarly doped single-crystal silicon layers, which indicates that grain boundary scattering dominates the thermal resistance. A thermal conductivity model based on the Boltzmann transport equation reveals that phonon transmission through the grains is high, which accounts for the large phonon mean free paths at low temperatures. Algebraic expressions relating thermal conductivity to grain size and dopant concentration are provided for room temperature. The present results are important for the design of MEMS devices in which heat transfer in polysilicon is important     

Sealing of micromachined cavities using chemical vapor depositionmethods: characterization and optimization

This paper presents results of a systematic investigation to characterize the sealing of micromachined cavities using chemical vapor deposition (CVD) methods. We have designed and fabricated a large number and variety of surface-micromachined test structures with different etch-channel dimensions. Each cavity is then subjected to a number of sequential CVD deposition steps with incremental thickness until the cavity is successfully sealed. At etch deposition interval, the sealing status of every test structure is experimentally obtained and the percentage of structures that are sealed is recorded. Four CVD sealing materials have been incorporated in our studies: LPCVD silicon nitride, LPCVD polycrystalline silicon (polysilicon), LPCVD phosphosilicate glass (PSG), and PECVD silicon nitride. The minimum CVD deposition thickness that is required to successfully seal a microstructure is obtained for the first time. For a typical Type-1 test structure that has eight etch channels-each 10 μm long, 4 μm wide, and 0.42 μm tall-the minimum required thickness (normalized with respect to the height of etch channels) is 0.67 for LPCVD silicon nitride, 0.62 for LPCVD polysilicon, 4.5 for LPCVD PSG, and 5.2 for PECVD nitride. LPCVD silicon nitride and polysilicon are the most efficient sealing materials. Sealing results with respect to etch-channel dimensions (length and width) are evaluated (within the range of current design). When LPCVD silicon nitride is used as the sealing material, test structures with the longest (38 μm) and widest (16 μm) etch channels exhibit the highest probability of sealing. Cavities with a reduced number of etch channels seal more easily. For LPCVD PSG sealing, on the other hand, the sealing performance improves with decreasing width but is not affected by length of etch channels     

多晶硅横向压阻灵敏度的统计分析

本文用统计方法对择优生长的多晶硅横向压阻进行了分析:计算了<100>、<110>、<111>、<211>、<221>、<311>、<331>等低指数晶向择优生长的P型和N型多晶硅横向平均晶粒压阻系数;采用全空间统计平均的方法,计算得到了晶向完全随机的多晶硅横向平均晶粒压阻系数;从欧姆定律和多晶硅晶粒特性出发,推导了多晶硅横向压阻灵敏度的表达式。通过实验测量了多晶硅横向压阻器件的灵敏度及其与角度的关系,证实多晶硅横向压阻灵敏度与器件倾角α符合sin2α的关系。将实验结果与理论分析的结果相比较后,得到了多晶硅的杨氏模量,这些结果表明多晶硅横向压力传感器具有实用价值,并为器件提供了优化的设计方案。     

Rapid thermal annealing of polysilicon thin films

In comparison with conventional heat treatment, high-temperature rapid thermal annealing (RTA) in a radio frequency (RF) induction-heated system can reduce or eliminate residual stresses in thin films in a few seconds. In this work, changes in the stress level due to the RTA of polycrystalline silicon thin films were studied as a function of annealing time and temperature. The corresponding variations in the microstructure and surface layer of the thin films were experimentally investigated by a variety of analytical tools. The results suggest that the residual stress evolution during annealing is dominated by two mechanisms: 1) microstructure variations of the polysilicon thin film and 2) effects of a surface layer formed during the heat treatment. The fact that the microstructure changes are more pronounced in samples after conventional heat treatment implies that the effects of the formed surface layer may dominate the final state of the residual stress in the thin film     

A new organic modifier for anti-stiction

The chemical and mechanical characteristics of a new surface modifier, dialkyldichloromethylsilane (DDMS, CH₃)₂SiCl₂, for stiction-free polysilicon surfaces are reported. The main strategy is to replace the conventional monoalkyl-trichlorosilane (MTS, RSiCl₃) such as octadecyltrichlorosilane (ODTS) or 1H,1H,2H,2H-perfluorodecyltrichlorosilane (FDTS) with dichlorodisilane (DDS, R₂SiCl₂) with two short chains, especially DDMS. DDMS, with shorter chains in aprotic media, rapidly deposits on the chemically oxidized polysilicon surface at room temperature and successfully prevents long cantilevers 3 mm in length from in-use as well as release stiction. DDMS-modified polysilicon surfaces exhibit satisfactory hydrophobicity, long term stability and thermal stability, which are comparable to those of FDTS. DDMS as an alternative to FDTS and ODTS provides a few valuable advantages; ease in handling and storage of the solution, low temperature-dependence and low cost. In addition to the new modifier molecule, the simplified process of direct release right after washing the modified surface with isooctane was proposed to cut the processing time     

Micro-electro-mechanical systems fast fabrication by selective thick polysilicon growth in epitaxial reactor

A thick layer selective polysilicon growth technique has been developed for micro-electro-mechanical systems (MEMS) fabrication. It allows fast MEMS fabrication without using silicon on insulator wafers or deep ICPRIE etching. The fabrication technique is based on two main steps: a first seed layer of polysilicon is deposited and patterned; the second step consists in the selective growth of this layer in an epitaxial reactor. The first part of this work is devoted to the optimisation of growth parameters. Afterwards, this technique is applied for fabrication of different kinds of actuators, involving films several microns thick with good mechanical properties such as a low mechanical stress and a low roughness of the polysilicon film surface. Furthermore, thermal actuator prototypes were fabricated by using this technique;showing good mechanical properties and high reliability.     

Design and fabrication of an angular microactuator for magneticdisk drives

Angular electrostatic microactuators suitable for use in a two-stage servo system for magnetic disk drives have been fabricated from molded chemical-vapor-deposited (CVD) polysilicon using the HexSil process. A 2.6-mm-diameter device has been shown to be capable of positioning the read/write elements of a 30% picoslider over a ±1-μm range, with a predicted bandwidth of 2 kHz. The structures are formed by depositing polysilicon via CVD into deep trenches etched into a silicon mold wafer. Upon release, the actuators are assembled onto a target wafer using a solder bond. The solder-bonding process will provide easy integration of mechanical structures with integrated circuits, allowing separate optimization of the circuit and structure fabrication processes. An advantage of HexSil is that once the mold wafer has undergone the initial plasma etching, it may be reused for subsequent polysilicon depositions, amortizing the cost of the deep-trench etching over many structural runs and thereby significantly reducing the cost of finished actuators. Furthermore, 100-μm-high structures may be made from a 3-μm deposition of polysilicon, increasing overall fabrication speed     

Horizontal buried channels in monocrystalline silicon

A thick layer selective polysilicon growth technique has been developed for micro-electro-mechanical systems (MEMS) fabrication. It allows fast MEMS fabrication without using silicon on insulator wafers or deep ICPRIE etching. The fabrication technique is based on two main steps: a first seed layer of polysilicon is deposited and patterned; the second step consists in the selective growth of this layer in an epitaxial reactor. The first part of this work is devoted to the optimisation of growth parameters. Afterwards, this technique is applied for fabrication of different kinds of actuators, involving films several microns thick with good mechanical properties such as a low mechanical stress and a low roughness of the polysilicon film surface. Furthermore, thermal actuator prototypes were fabricated by using this technique;showing good mechanical properties and high reliability.

     

New low-stress PECVD poly-SiGe Layers for MEMS

Thick poly-SiGe layers, deposited by plasma-enhanced chemical vapor deposition (PECVD), are very promising structural layers for use in microaccelerometers, microgyroscopes or for thin-film encapsulation, especially for applications where the thermal budget is limited. In this work it is shown for the first time that these layers are an attractive alternative to low-pressure CVD (LPCVD) poly-Si or poly-SiGe because of their high growth rate (100-200 nm/min) and low deposition temperature (520/spl deg/C-590/spl deg/C). The combination of both of these features is impossible to achieve with either LPCVD SiGe (2-30 nm/min growth rate) or LPCVD poly-Si (annealing temperature higher than 900/spl deg/C to achieve structural layer having low tensile stress). Additional advantages are that no nucleation layer is needed (deposition directly on SiO/sub 2/ is possible) and that the as-deposited layers are polycrystalline. No stress or dopant activation anneal of the structural layer is needed since in situ phosphorus doping gives an as-deposited tensile stress down to 20 MPa, and a resistivity of 10 m/spl Omega/-cm to 30 m/spl Omega/-cm. With in situ boron doping, resistivities down to 0.6 m/spl Omega/-cm are possible. The use of these films as an encapsulation layer above an accelerometer is shown.     

Polysilicon micro beams buckling with temperature-dependent properties

The suspended electrothermal polysilicon micro beams generate displacements and forces by thermal buckling effects. In the previous electro-thermal and thermo-elastic models of suspended polysilicon micro beams, the thermo-mechanical properties of polysilicon have been considered constant over a wide rang of temperature (20–900°C). In reality, the thermo-mechanical properties of polysilicon depend on temperature and change significantly at high temperatures. This paper describes the development and validation of theoretical and Finite element model (FEM) including the temperature dependencies of polysilicon properties such as thermal expansion coefficient and Young’s modulus. In the theoretical models, two parts of elastic deflection model and thermal elastic model of micro beams buckling have been established and simulated. Also, temperature dependent buckling of polysilicon micro beam under high temperature has been modeled by Finite element analysis (FEA). Analytical results and numerical results using FEA are compared with experimental data available in literature. Their reasonable agreement validates analytical model and FEM. This validation indicates the importance of including temperature dependencies of polysilicon thermo-mechanical properties such as Coefficient of thermal expansion (CTE) in the previous models.     

A sticking model of suspended polysilicon microstructure includingresidual stress gradient and postrelease temperature

A sticking (stiction) model for a cantilevered beam is derived. This model includes the effect of the bending moment, which stems from stress gradient along the vertical direction of structural polysilicon, and the temperature during the release process. The bending moment due to the stress gradient will play an important role in evaluating antisticking efficiency since liquid tension and surface energy of microstructures tend to become smaller by newly developed antisticking techniques. The effects of stress gradient and temperature were analyzed and verified with surface-micromachined polysilicon cantilevers. By modifying the substrate polysilicon with grain-hole formation technique, the effects of residual stress gradient in polysilicon on stiction could be observed in the condition of low work of adhesion     

Analysis of thermal stresses due to moving frictional load in an infinite elastic layered medium

The temperature and stress distribution of an infinitely long elastic layered medium subjected to a moving frictional load traversing with constant speed over the surface are analyzed. A quasi-static theory is applied by use of a coordinate transformation. In this paper, the temperature and thermal stress distributions are obtained by means of a Fourier transformation. Numerical results are obtained for the cases of both uniform and parabolic pressure. Examining the results, it is found that the thermal principal stress is much higher than the mechanical principal stress. The Young's modulus ratio and the thermal conductivity ratio of the layered medium also play important roles in the thermal stress distribution.     

用正交实验法优化多晶硅制备工艺参数

在研制多功能集成压力传感器过程中,对关键材料多晶硅来说,制备的工艺条件对其性能影响较大。讨论了沉积温度、反应气体流量和反应室工作压力对多晶硅的沉积速率、晶粒大小和表面粗糙度的影响程度。设计出正交试验,以优化出不同性能要求的多晶硅制备工艺参数。     

High-aspect-ratio, molded microstructures with electrical isolation and embedded interconnects

 A thin film molding process was developed to enable the fabrication of monolithic micromechanical structures with built-in electrical isolation and embedded interconnects. High-aspect-ratio composite structures were created from undoped polysilicon, low stress nitride and doped polysilicon, in a dual micromolding process. These monolithic electro-mechanical microstructures are more resistant to thermal effects and misalignment errors compared to microsystems assembled from discrete elements. In addition, the microstructures are molded in a re-usable mold providing an economical advantage. A gimballed electrostatic microactuator was successfully fabricated using this process. Electrical isolation was achieved with a combination of low stress nitride and undoped polycrystalline silicon. Various isolation geometries were investigated. Current leakages of less than 1 nA at 30 V were measured for isolation structures 40 μm long and 80 μm tall. Received: 13 November 2000/Accepted: 16 November 2000     

Electrothermal properties and modeling of polysilicon microthermal actuators

This work addresses a range of issues on modeling electrothermal microactuators, including the physics of temperature dependent material properties and Finite Element Analysis (FEA) modeling techniques. Electrical and thermal conductivity are a nonlinear function of temperature that can be explained with electron and phonon transport models, respectively. Parametric forms of these equations are developed for polysilicon and a technique to extract these parameters from experimental data is given. A modeling technique to capture the convective and conductive cooling effects on a thermal actuator in air is then presented. Using this modeling technique and the established polysilicon material properties, simulation results are compared with measured actuator responses. Both static and transient analyzes have been performed on two styles of actuators and the results compare well with measured data.     

Thick glass film technology for polysilicon surface micromachining

This paper explores the use of thick glass films as suitable alternatives to CVD oxide films for use as sacrificial, planarization, and passivation layers in polysilicon surface micro-machining processes. Such glasses can be spin-coated to produce films up to 20 μm thick in one step and to globally planarize the wafer surface, extending the overall mechanical design capability by enabling additional device structural complexity. Glass optical constants were determined, and the film quality was evaluated using SEM, EDS, XPS, and XRD. The films were found to have low intrinsic stresses and other characteristics desirable for sacrificial layer applications. A glass chemical-mechanical polishing process with 5300~Å/min removal rate and acceptable selectivity to polysilicon was developed, along with a wet etch chemistry that preferentially etches the film at 3.24 μm/min without affecting the silicon substrate or the structural polysilicon. The film was used to planarize up to 10-μm-tall topographies associated with surface micromachined features through spin-on and polish-back steps, and was in addition demonstrated to be a viable protective layer for silicon wafers during extended KOH etching in silicon bulk micro-machining processes. The glass has stable constituents that do not diffuse or contaminate either the substrate or the device features during the application and firing procedures     

Large-area,high-temperature stainless steel foil substrate for manufacturing low-cost and flexible CMOS polysilicon TFTs

A large-area stainless steel foil substrate which is compatible with high-temperature (>800°C) processing was developed to support a hybrid printed and conventional process technology to fabricate polysilicon thin-film transistors (TFTs). The purpose was to build a platform that could lead to low-cost, roll-to-roll manufacturing of polysilicon TFTs. To fabricate a self-aligned top-gate TFT structure, a screen-printed dopant process, which requires high-temperature activation, was developed to substitute capital-intensive ion implantation. For the pilot line process, a 300-mm² and 100-μm-thick stainless steel substrate made of an alloy with a low thermal expansion coefficient (CTE) was chosen. Then, the foil finishing process was optimized to achieve flatness and minimize surface roughness. A barrier and dielectric encapsulation were developed to prevent trace metal diffusion from the substrate into the active layers. The polysilicon TFTs were then evaluated with static and dynamic bending tests.     

Characterization of Deformation Behaviors and Elastic Moduli of Multilayered Films in Piezoelectric Inkjet Head

A bulge testing system was developed to mechanically characterize the deformation behaviors and elastic moduli of multilayered films, mainly composed of polycrystalline silicon (polysilicon) and lead zirconate titanate (PZT), used in a multilayer actuator of a piezoelectric inkjet head. In the tests, commercial inkjet heads including a few tens of multilayer actuators were directly pressurized by air, and the corresponding deflections were measured via full-field optical measurement techniques. An analytic solution derived from a thin-plate theory and finite-element analysis were used to describe pressure-deflection behaviors of films, and the results were compared with the experimental data to evaluate the elastic modulus of individual film. The results showed that the elastic moduli of polysilicon and PZT films are ~110 and ~49 GPa, respectively. These values were consistent with the nanoindentation results. For polysilicon films, about 30% reduction in elastic modulus, compared with that calculated from single-crystal elastic constants, was observed, and this was most likely attributed to the presence of microdefects like voids and microcracks at grain boundaries between columnar grains.     

A nodal analysis method for simulating the behavior of electrothermal microactuators

This paper presents a novel approach to verify and optimize surface micromachined electrothermal microactuators by using a nodal analysis method. The nodal analysis method for the mechanical and electrostatic devices is a schematic-based method which simplifies the design of MEMS devices significantly. A variety of the surface micromachined electrothermal microactuators have been widely applied in various areas due to the high force provided at a relatively low input voltage. These electrothermal microactuators can also be decomposed into essential elements of beams and anchors. This paper presents the nodal analysis method for the electrothermal microactuators. The temperature dependent properties for the thermal conductivity, electrical resistivity and thermal expansion coefficient of polysilicon beams are included. The effect of the effective axial length for the beams due to lateral deflection and large axial stress is also taken into account. This approach is verified by ANSYS and the simulation data agrees well with each other. It extends the general nodal analyses method to simulate the electrothermal microactuators.