卷积码Viterbi译码器的硬件实现

第三代移动通信系统标准中普遍采用卷积码和Turbo码作为信道编码方案。本文首先阐述了维特比译码算法,然后论述了（2,1,3）卷积码编码电路和维特比译码的单片机实现方案。最后把维特比算法与交织方案相结合,统计结果表明纠错性能有较大改善。     

截尾卷积码的译码算法分析

介绍了截尾卷积码的循环维特比译码算法和BCJR译码算法，以及在循环维特比算法基础上改进的环绕维特比译码算法和双向维特比算法，最后对各种译码算法的性能进行了仿真分析。     

基于LTE截尾卷积码的译码算法改进研究

文章基于LTE(长期演进)采用的截尾卷积码.介绍了截尾卷积码的循环维特比译码算法(CVA)和环绕维特比算法(WAVA).并综合两种算法的优点,对现有算法做了改进,减小了译码计算的复杂度.仿真结果表明,同WAVA相比.改进算法可获得较好的效果,且计算量减小了1/4.     

一种卷积码维特比译码算法的实现

卷积码编译码在现代数据通信中十分重要，对卷积码译码算法的研究也方兴未艾。本文在分析了卷积码译码的维特比译码算法后，给出了具体的实现方法。     

一种改进的快速相关攻击算法

T.Johansson[4]提出了一种基于卷积码维特比(Viterbi)译码方案的快速相关攻击算法。在此基础上, 本文对这个算法进行了改进,提出了一种序列密码的快速相关攻击的改进算法。该改进算法使用了Fano译码方案: 由于它在寻找正确的路径时,力求尽早地排除所有非最大似然路径,这样使译码复杂度比维特比的译码复杂度低, 从而大大地提高了算法攻击成功的速度。     

Viterbi译码的FPGA免回溯实现

卷积码在多种通信领域中广泛应用,Viterbi译码是对卷积码的一种最大似然译码算法。随着卷积码约束度的增加,并行维特比译码所需的硬件资源呈指数增长,限制其硬件实现。介绍了一种串行译码结构的FPGA实现方案,在保证性能译码的前提下有效地节省资源。同时提出了充分利用FPGA的RAM存储单元的免回溯Viterbi解码实现算法,减少了译码时延,这种算法在串行和并行译码中都可以应用。     

一种约束卷积码的研究与仿真

通信系统中广泛使用的卷积码,其译码通常采用维特比译码的方法。为了获得更好的译码性能,在原有的卷积码的基础上提出一种约束卷积码算法。该约束卷积码是在发送系列中固定的位置加入确定的比特位,以在维特比译码时尽量获得发送序列的先验概率的基础上提高译码性能。通过对这种约束卷积码数学分析,提出其对应的编解码算法,并用蒙特卡罗仿真方法,验证该算法的正确性。     

卷积译码的维特比算法和实现技术

介绍了卷积编码、解码的原理及适用于卷积码和网格码维特比译码的编程技术,叙述了用德州仪器(TI)TMS32054CX实现维特比算法的过程。认为此基本方法可用于对任何卷积码进行解码和译码,比如序列译码等。     

低速率语音通信中高效维特比译码的FPGA实现

维特比译码是卷积码勰码中一种最大似然的译码算法,文章给出了一种高效的卷积码编码及维特比解码FPGA硬件实现的结构,提出了一种采用（2,1,7）卷积码对2．4kbps MELP语音编码参数进行抗误码保护的信道编码方案。实验表明,能有效提舞噪声信道下传输的语音参数的抗误码性能。     

一种改进的堆栈译码算法

深太空通信对编译码的性能有十分高的要求,卷积码的性能和约束长度密切相关,约束长度越大卷积码的编码增益越大,则其性能越好。维特比译码算法由于受译码开销的限制,并且其译码开销随约束长度增加呈指数增长,维特比译码算法仅适用于短约束长度的卷积码。目前仅有序列译码算法适用于大约束长度卷积码译码。由于堆栈译码算法中堆栈的大小是有限的,在信道受扰较为严重的情况下,潜在的正确路径有可能被删除,这将影响到译码的性能。多堆栈译码算法不存在潜在删除的问题,多堆栈译码算法完成译码所需计算量远小于堆栈译码算法。     

A convolutional single-parity-check concatenated coding scheme forhigh-data-rate applications

The coding scheme uses a set of n convolutional codes multiplexed into an inner code and a (n,n-1) single-parity-check code serving as the outer code. Each of the inner convolutional codes is decoded independently, with maximum-likelihood decoding being achieved using n parallel implementations of the Viterbi algorithm. The Viterbi decoding is followed by additional outer soft-decision single-parity-check decoding. Considering n=12 and the set of short constraint length K=3, rate 1/2 convolutional codes, it is shown that the performance of the concatenated scheme is comparable to the performance of the constraint length K=7, rate 1/2 convolutional code with standard soft-decision Viterbi decoding. Simulation results are presented for the K=3, rate 1/2 as well as for the punctured K=3, rate 2/3 and rate 3/4 inner convolutional codes. The performance of the proposed concatenated scheme using a set of K=7, rate 1/2 inner convolutional codes is given     

(2,1,7)卷积码Viterbi译码器FPGA实现方案

移动通信系统标准中普遍采用卷积码作为信道编码方案。本文阐述了目前最常用的卷积码译码算法——Vit-erbi译码算法,然后给出了(2,1,7)卷积码编码电路FPGA实现方法。该方法给出了新的Viterbi幸运路径算法和高效的状态度量存储技术,可以充分利用FPGA的优势获得较好的译码结果。利用幸存路径交换寄存器模块,能有效减少存储量并降低功耗。     

(2,1,7)卷积编码及其维特比译码算法的软件实现

提出了一种（2，1，7）卷积编码及其维特（Viterbi）译码的软件实现方案，在Matlab环境中应用软件技术实现了（2，1，7）卷积码的Viterbi译码器功能。测试证明，该Viterbi译码算法在低信噪比下的误码率仍能达到10^-6。     

TD-SCDMA中(2,1,9)卷积编码及其VITERBI译码算法的SIMULINK S-FUNCTION实现

文章提出了TD-SCDMA系统中一种(2,1,9)卷积编码及其Viterbi译码的软件实现方案,在Matlab/Simulink平台中应用S-Function实现了(2,1,9)卷积码的Viterbi译码器功能.测试证明,该Viterbi译码器输出的信息比特误码率在低信噪比下仍能达到0.0583.     

一种基于FPGA的Viterbi译码器优化算法

Viterbi译码是卷积码的最佳译码算法,针对Viterbi译码器实现中资源消耗、译码速度、处理时延和结构等问题,通过对Viterbi译码算法及卷积码编码网格图特点的分析,提出一种在FPGA设计中,采用全并行结构、判决信息比特与路径信息向量同步存储以及路径度量最小量化的译码器优化实现方案。测试和试验结果表明,该方案与传统的译码算法相比,具有更高的速度、更低的时延和更简单的结构。     

Systolic array processing of the Viterbi algorithm

Results on efficient forms of decoding convolutional codes based on the Viterbi algorithm by using systolic arrays are presented. Various properties of convolutional codes are discussed. A technique called strongly connected trellis decoding is introduced to increase the efficient utilization of all the systolic array processors. Issues dealing with the composite branch metric generation, survivor updating, overall system architecture, throughput rate, and computational overhead ratio are also investigated. The scheme is applicable to both hard and soft decoding of any rate b/n convolutional code. It is shown that as the length of the code becomes large, the systolic Viterbi decoder maintains a regular and general interconnection structure as well as moderate throughput rate gain over the sequential Viterbi decoder     

基于GPU的Viterbi并行解码算法的设计与实现

针对GPU并行计算特征,对Viterbi解码自身做了并行处理探索,并提出使用Zero-Termination卷积码来实现基于GPU的Viterbi解码分块并行处理.设计的实现结果表明:Zero-Termination卷积码的简单而适用于GPU分块并行;误码率降低,特别是在信噪比低的情况下,Zero-Termination卷积码误码率比不损失码率的卷积码要低.同时,还实现了基于GPU的7,9,15三种不同约束长度的Viterbi解码,获得了良好的误码性能曲线及高吞吐率表现.     

LTE中卷积码的译码器设计与FPGA实现

基于长期演进（LTE）的Tail—biting卷积码,介绍了维特比译码算法,它是一种最优的卷积码译码算法。由于Tail—biting卷积码的循环特性,采用固定延迟译码的方法,降低了译码复杂度。通过使用全并行的结构及简单的回溯存储方法,设计了一个具有高速和低复杂度的固定延迟译码器。在FPGA上实现并验证,验证结果表明译码器的性能满足了LTE系统的要求。     

A novel product coding and recurrent alternate decoding scheme for image transmission over noisy channels

In this letter, we present a novel product channel coding and decoding scheme for image transmission over noisy channels. Two convolutional codes with at least one recursive systematic convolutional code are employed to construct the product code. Received data are decoded alternately in two directions. A constrained Viterbi algorithm is proposed to exploit the detection results of cyclic redundancy check codes so that both reduction in error patterns and fast decoding speed are achieved. Experiments with image data coded by the algorithm of set partitioning in hierarchical trees exhibit results better than those currently reported in the literature.     

Bidirectional decoding of convolutional codes for indoor cellularradio

Bidirectional suboptimal breadth-first decoding of convolutional codes is an attractive technique for slowly varying and quasi-static fading channels as it restricts the extent of decoding errors due to correct path loss to very heavy noise or interference regions. This paper compares the performance of such a decoding scheme to the Viterbi algorithm over wideband TDMA indoor radio links where equalization and space diversity are also used to combat dispersive fading and cochannel interference. On the basis of equal computational complexity and equal decoding delay, suboptimal, breadth-first, bidirectional decoding of a long constraint length convolutional code is shown to be superior to Viterbi decoding of a shorter constraint length code. Furthermore, this advantage increases as the outage criterion (in terms of bit error rate) becomes more stringent which makes bidirectional decoding particularly attractive for data applications and makes channel coding a more attractive alternative to increasing the space diversity order at the receiver