超低功耗RFID标签基带处理器

针对集成片上天线(OCA)的超高频射频识别(RFID)标签设计了一款RFID专用协议的基带处理器,以满足RFID标签嵌入纸张及微小物体的防伪功能.由于OCA与读写器天线近场耦合获取能量有限,集成OCA的无源标签对功耗要求更加苛刻.针对微小OCA标签的应用需求,采用异步电路、门控时钟、低压库、多时钟域等低功耗设计方法,设计了专用协议标签基带处理器,其CMOS低压库的设计可以使基带处理器在0.5V的电源电压下工作,综合布局布线后,其电路仿真结果表明,峰值功耗仅为0.32 μW.标签芯片在UMC 0.18 μm标准工艺下流片,测试结果显示,在读写器输出20 dBm能量的情况下,带OCA标签的读距离可达2 mm.     

射频识别芯片设计中时钟树功耗的优化与实现

UHF RFID是一款超高频射频识别标签芯片,该芯片采用无源供电方式,对于无源标签而言,工作距离是一个非常重要的指标,这个工作距离与芯片灵敏度有关,而灵敏度又要求功耗要低,因此低功耗设计成为RFID芯片研发过程中的主要突破点。在RFID芯片中的功耗主要有模拟射频前端电路,存储器,数字逻辑三部分,而在数字逻辑电路中时钟树上的功耗会占逻辑功耗不小的部分。本文着重从降低数字逻辑时钟树功耗方面阐述了一款基于ISO18000-6Type C协议的UHF RFID标签基带处理器的的优化和实现。     

基于BLF时钟的RFID低功耗数字基带设计

提出了一种符合ISO/IEC 18000-6C协议中关于时序规定的射频识别(RFID)无源标签芯片低功耗数字基带处理器的设计.基于采用模拟前端反向散射链路频率(BLF)时钟的方案,将BLF的二倍频设置为基带中的全局时钟,构建BLF和基带数据处理速率之间的联系;同时在设计中采用门控时钟和行波计数器代替传统计数器等低功耗策略.芯片经TSMC 0.18 μmCMOS混合信号工艺流片,实测结果表明,采用该设计的标签最远识别距离为7 m,数字基带动态功耗明显降低,且更加符合RFID协议的要求.     

低频低功耗无源RFID模拟前端设计与分析

介绍了一款低频低功耗无源射频识别(RFID)技术芯片模拟前端的设计.详细介绍了低频RFID模拟前端的整体结构和主要模块.通过对低功耗带隙基准的设计,产生合适的偏置电压,为其他模块提供偏置,以此来限制其他模块的功耗,达到降低整个模拟前端功耗的目的.通过对高性能解调电路的设计,提高解调精度,保证通信过程准确.芯片采用0.35 μm标准CMOS工艺设计和制作,实际测试结果显示,在要求的最远通信距离时,芯片依然可以正常工作,表明该设计满足实际要求.     

一种超低功耗无源超高频射频识别标签芯片的设计与实现

本文提出了一种符合ISO18000-6B协议的无源超高频射频识别标签芯片设计。该芯片包括了射频/模拟前端,数字基带和512比特的EEPROM存储器。采用肖特基二极管来提高整流器的功率转换效率。详细阐述了基于峰值电流源的参考电压源的设计,该电路结构简单,并且可以满足低压、低功耗的设计要求。为了降低功耗,模拟模块工作在1v以下电源电压,并采用了一些低功耗的设计方法进一步降低数字基带的功耗。整个标签芯片采用TSMC 0.18um CMOS工艺实现,芯片尺寸为800*800um2。测试结果表明芯片的总功耗为7.4uW,灵敏度达-12dBm。     

低功耗UHF频段RFID标签数字基带电路

通过对UHF频段EPC Global Class1 Generate2协议进行分析,详细论述了符合协议要求的被动式无源射频身份识别(RFID)标签的数字电路系统方案,并提出了一种新颖的、针对RFID标签的数字基带低功耗电路。在0.18 μm CMOS工艺环境下,使用Synopsys工具对电路进行前端综合和后端物理实现,同时对电路的功耗进行了简要的分析。仿真及测试结果表明,该标签数字基带电路功能符合协议要求。     

一种适用于无源超高频射频识别标签的低电压低功耗射频/模拟前端电路

提出了一种适用于无源超高频射频识别标签的低电压低功耗射频/模拟前端电路.通过引入一个使用亚阈值技术的基准源,电路实现了温度补偿,从而使得系统时钟在～40～100℃的范围内保持稳定.在模块设计中,提出了一些新的电路结构来降低系统功耗,其中包括一种零静态功耗的上电复位电路和一种新的稳压电路.该射频/模拟前端电路采用不带肖特基二极管0.18μm CMOS EEP-ROM工艺流片实现,它与数字基带、EEPROM一起实现了一个完整的标签芯片.测试结果表明,该芯片的最低电源电压要求为0.75V.在该最低电压下,射频/模拟前端电路的总电流为4.6μA.     

一种适用于无源超高频射频识别标签的低电压低功耗射频/模拟前端电路

提出了一种适用于无源超高频射频识别标签的低电压低功耗射频/模拟前端电路.通过引入一个使用亚阈值技术的基准源,电路实现了温度补偿,从而使得系统时钟在～40～100℃的范围内保持稳定.在模块设计中,提出了一些新的电路结构来降低系统功耗,其中包括一种零静态功耗的上电复位电路和一种新的稳压电路.该射频/模拟前端电路采用不带肖特基二极管0.18μm CMOS EEP-ROM工艺流片实现,它与数字基带、EEPROM一起实现了一个完整的标签芯片.测试结果表明,该芯片的最低电源电压要求为0.75V.在该最低电压下,射频/模拟前端电路的总电流为4.6μA.     

无源超高频电子标签射频模拟前端设计

基于对射频识别技术（RFID）物理基础的介绍,并阐述射频识别技术（RFID）的作用范围,介绍了无源超高频电子标签射频模拟前端设计的实现原理框图。通过对ISO 18000.6B协议相关规定的分析,合理地确定了模拟前端和射频前端各个模块的设计指标,并就这些规定的指标设计出了中心频率为915MHz的无源超高频电子标签芯片射频模拟前端。     

无源UHF RFID标签芯片模拟前端电路设计探讨

本文根据协议的相关要求,设计了无源UHF RFID标签芯片模拟前端电路,并重点对标签芯片模拟前端的关键技术进行了优化,实现了标签芯片模拟前端电路。最终,电路的仿真结果表明标签芯片的模拟前端电压较为稳定,且功耗较小,稳定的时钟频率能够帮助系统进行正确的输入信号解调,实现了协议要求的电路设计。     

Low-voltage ULSI design

An overall view on low-voltage device and circuit design is presented, beginning with a discussion of the low-voltage limit. Low-voltage device design is then described. Low-voltage CMOS and BiCMOS logic circuits are discussed. Circuit techniques for the low-voltage DRAMs and SRAMs are presented. The low-voltage analog devices and circuits are considered. The future direction of the low-voltage and low-power ULSIs is discussed by comparing the switching energy of electronic devices and brain cells     

The flipped voltage follower: a useful cell for low-voltage low-power circuit design

In this paper, a basic cell for low-power and/or low-voltage operation is identified. It is evidenced how different versions of this cell, coined as "flipped voltage follower (FVF)" have been used in the past for many applications. A detailed classification of basic topologies derived from the FVF is given. In addition, a comprehensive list of recently proposed low-voltage/low-power CMOS circuits based on the FVF is given. Although the paper has a tutorial taste, some new applications of the FVF are also presented and supported by a set of simulated and experimental results. Finally, a design example showing the application of the FVF to build systems based on translinear loops is described which shows the potential of this cell for the design of high-performance low-power/low-voltage analog and mixed-signal circuits.     

High-Precision Differential-Input Buffered and External Transconductance Amplifier for Low-Voltage Low-Power Applications

Recently, the demand for low-voltage low-power integrated circuits design has grown dramatically. For battery-operated devices both the supply voltage and the power consumption have to be lowered in order to prolong the battery life. This paper presents an attractive approach to designing a low-voltage low-power high-precision differential-input buffered and external transconductance amplifier, DBeTA, based on the bulk-driven technique. The proposed DBeTA possesses rail-to-rail voltage swing capability at a low supply voltage of ±400 mV and consumes merely 62 μW. The proposed circuit is a universal active element that offers more freedom during the design of current-, voltage-, or mixed-mode applications. The proposed circuit is particularly interesting for biomedical applications requiring low-voltage low-power operation capability where the processing signal frequency is limited to a few kilohertz. An oscillator circuit employing a minimum number of active and passive components has been described in this paper as one of many possible applications. The circuit contains only a single active element DBeTA, two capacitors, and one resistor, which is very attractive for integrated circuit implementation. PSpice simulation results using the 0.18 μm CMOS technology from TSMC are included to prove the unique results.     

用大电流驱动采用SELAX技术的高分辨率显示系统的整体可靠性

应用低压多晶硅TFT和高压多晶硅TFT组合开发成功高分辨率（〉300ppi）LCD／OEL显示系统，也就是说，将受激准分子激光结晶化（ELC）TFT用于耐高压显示电路，而将选择扩大激光结晶化（SELAX）TFT用于低功耗高性能显示电路。在这两种混合型的TFT中，扩大激光结晶化（SELAX）TFT成功地整合了显示系统大电流驱动的可靠性。     

Scalable Bang–Bang Phase-Locked-Loop-based integrated sensor interfaces

The scaling of VLSI technology results in reduced supply voltages, hence jeopardizing the voltage swing and signal-to-noise ratio achievable by analog integrated circuits. An alternative is to take advantage of the increased timing resolution of faster CMOS technologies, and to replace traditional voltage-mode processing by time-based circuits. Time-based design enables us to implement highly-digital sensor interfaces, which can benefit from scaling in terms of area reduction, compared to analog implementations. In addition, it enables low-voltage and low-power design. This invited overview paper gives a survey of one type of such time-based sensor interfaces: the Bang–Bang Phase-Locked-Loop-based Sensor-to-Digital Converter. The highly-digital implementation of the frequency-based sensor interface results in low-voltage, low-power, robust and highly-scalable designs. Several design examples are elaborated, each focusing on a different design aspect.     

On the design of low-voltage, low-power CMOS analog multipliers forRF applications

Novel low-voltage, low-power techniques in the design of portable wireless communication systems are required. Two system examples of low-power analog multipliers operating from a 1.2 V supply are presented. These proposed structures achieve the required multiplication function by using current processing. The circuits were fabricated using standard double-poly CMOS processes for a 900 MHz application. Measurement results of the prototypes are comparable to other higher voltage designs     

一种具有高电源抑制比的低功耗CMOS带隙基准电压源

文章设计了一种适用于CMOS工艺的带隙基准电压源电路，该电路采用工作在亚阈值区的电路结构，并采用高增益反馈回路，使其具有低功耗、低电压、高电源电压抑制比和较低温度系数等特点。     

基于对数域的连续小波变换处理电路

提出了一种新型的连续小波变换处理电路.电路中采用复解调技术实现小波变换,对变换系数进行了模数转换,可以与数字处理芯片接口,实现了信号的实时处理.电路完全采用对数域电流模式实现.对电路的主要模块进行了分析,仿真结果显示电路能在低电压低功率时得到宽动态范围的运用.     

Low-voltage and low-power circuit design for mixed analog/digitalsystems in portable equipment

This paper describes low-voltage and low-power (LV/LP) circuit design for both analog LSI's and digital LSI's which are used in mixed analog/digital systems in portable equipment. We review some LV/LP circuits used in digital LSI's, such as general logic gate, DSP, and DRAM, and others used in analog LSI's, such as operational amplifiers, video-signal processing circuits, A/D and D/A converters, filters, and RF circuits, along with a wide range of items used in recently developed LSI's. Since analog circuits have fundamental difficulties in reducing the operating voltage and the power consumption, in spite of recent progress in LV/LP circuit techniques, these difficulties will be a major issue for decreasing the total power consumption of some mixed analog/digital systems used in portable equipment