图像处理在先进标识加工中的应用

激光标刻作为一种先进标识加工模式在生产生活中的应用越来越广泛,激光标刻具有抗磨损、不褪色的优点。激光标刻加工,将激光束照射到加工物体的表面,用以去除或熔化材料以及改变物体表面从而达到加工目的,属于非接触性加工,没有机械力,加工材料不变形,受损小。激光标刻效果的影响因素较多,包括激光器本身的性能、激光标刻软件的质量以及加工工艺水平的高低。其中,图像的处理质量对其最终加工的效果影响较大。JPG格式图像是激光标刻加工过程中遇到的较多的处理对象,文章分别从JPG格式图像转换为PLT矢量图、JPG图像的Photoshop软件处理方法及平面JPG图像转三维图像三个方面分析激光标刻过程中的JPG图像处理方法,对激光标刻加工实践工作过程具有指导意义。     

一维扫描激光飞动标刻研究

介绍一种控制生产流水线激光标刻的软件实现.使用一维振镜来实现点阵字体的飞动标刻.通过偏转扫描振镜使其和生产线方向成一定的夹角,并且严格控制扫描振镜的运行,使振镜按照标刻的要求,在确定的时间到达确定的点阵点.通过这种方式来补偿生产线方向的生产线速度.在满足一定生产线速度的情况下,能够降低标刻设备的成本.对于要标刻的点阵字符,采用了在显示屏幕上输入相应的字体,然后直接从屏幕提取字体信息并输入标刻系统.     

基于P-V双因素的网络激光标刻性能研究

传统激光标刻技术已在实际工业生产中普遍应用,但其系统最优标刻性能控制参数存在寻找及设置较为困难、繁琐等问题。针对该问题,本文设计了一种基于嵌入式网络激光标刻模式的新型激光标刻控制模型,并在该模型下通过相关数据预处理算法分析单一标刻影响因素对激光标刻性能的影响;再通过对实验数据的数理统计分析得出二值图像的标刻性能变化规律,最终得出在该材质及类似组成工件下的激光标刻的最优参数快速选择模型和性能最优值域。研究结果表明,该模型为最优激光标刻性能控制参数的快速选择提供了可靠的方法,为进一步研究激光标刻性能影响参数提供了重要参考。     

单片机控制的激光标刻机

给出了用于工业领域的单片机控制的激光标刻机的原理和实现方法,以及单片机控制系统的硬件与接口程序.     

激光标刻技术

本文系统地论述了激光标刻技术的分类、工作原理、结构特点及其影响因素，并对我国激光标刻技术的市场和发展趋势作了预测。     

基于DSP和CPLD的激光飞动标刻研究

为了达到快速、精确标刻的目的,提出了一种应用于生产线上运动工件的激光实时飞动标刻系统。该系统采用了数字信号处理和复杂可编程逻辑器件的动态跟踪技术的方法,解决了流水生产线上诸如标刻图形变形、错位、失真等激光加工问题,降低了由静止标刻加工给加工者所带来的劳动强度。以自行开发的激光标刻软件为应用实例,对同一图案在参数设定相同的情况下进行加工。结果表明,该系统能提高激光加工的生产效率,标刻速度达到2000byte/s;所标刻图案线条清晰,轮廓分明,达到了静止标刻的效果。     

激光标刻系统技术参数分析

介绍了激光标刻的应用领域和加工原理,并详细说明目前三种常见激光标刻方式的特点。以振镜扫描式激光标刻为例,分析激光标刻系统技术参数对加工效果的影响,以及分析影响标刻质量的主要参数。     

防伪激光标刻系统的研究

本文针对二维矢量激光标刻系统，进行了防伪激光标刻的理论和实践研究，即通过一定的矢量标刻数据，产生特定的防伪信息，并随标刻数据一起标刻在产品上，同时利用数据库技术、计算机网络技术将标刻数据及防伪信息保存在数据库服务器上，并通过网络供客户鉴别，能起到非常好的防伪效果。     

激光标刻在条码技术中的应用研究

分析介绍了条码技术 ,仔细研究了双振镜扫描系统产生畸变的原因 ,提出了一种软件矫正算法 ,实现了激光标刻在条码技术中的应用。     

激光标刻铝合金2维码的手机识读特性研究

随着近年来智能手机设备的快速普及,2维码已经在商业零售、电子商务领域获得飞速发展。为了拓展2维码在工业制造领域金属零件直接零件标识方面的应用,采用激光标刻填充方式与识读环境的结合调控方法,进行了理论分析和实验验证,取得了铝合金表面激光标刻2维码的手机识读特性数据。结果表明,由于工艺参量不同,铝合金表面的激光标刻区域将呈现白色、灰色直至黑色的对比度效果,通过设置镜像识读环境条件,并反转2维码标刻,可以有效解决常规激光标刻白色2维码的无法识读问题。这一结果对开发智能手机2维码识读软件算法、提高激光标刻效率是有帮助的。     

ISP Synario在数字电子技术中的应用

介绍了ISP Synario仿真软件的功能及特点，并以一个数字电路为例，较详细地说明了仿真软件的使用方法和步骤，为数字电子技术教学提供了一种新的实验方法。     

Simulation of the impact of heavy charged particles on the characteristics of field-effect silicon-on-insulator transistors

A technique for numerical simulation of variation in the drain current in a silicon-on-insulator field-effect transistor with indirect gate caused by the impact of a heavy charged particle is discussed. The SRIM software and the Synopsys TCAD Sentaurus software suite for process and device simulation are used for simulation. The obtained results are used for formulation of the guidelines on selection of the transistor geometry are formulated based on.     

软件产品登记测试探讨

在对软件产品申请登记和备案中,就软件产品登记测试的项目、方法和所发现的几类错误进行了描述。并对实际应用中最常用的等价类划分法和边界值分析法加以介绍。     

A scenario-based reliability analysis approach for component-based software

This paper introduces a reliability model, and a reliability analysis technique for component-based software. The technique is named Scenario-Based Reliability Analysis (SBRA). Using scenarios of component interactions, we construct a probabilistic model named Component-Dependency Graph (CDG). Based on CDG, a reliability analysis algorithm is developed to analyze the reliability of the system as a function of reliabilities of its architectural constituents. An extension of the proposed model and algorithm is also developed for distributed software systems. The proposed approach has the following benefits: 1) It is used to analyze the impact of variations and uncertainties in the reliability of individual components, subsystems, and links between components on the overall reliability estimate of the software system. This is particularly useful when the system is built partially or fully from existing off-the-shelf components; 2) It is suitable for analyzing the reliability of distributed software systems because it incorporates link and delivery channel reliabilities; 3) The technique is used to identify critical components, interfaces, and subsystems; and to investigate the sensitivity of the application reliability to these elements; 4) The approach is applicable early in the development lifecycle, at the architecture level. Early detection of critical architecture elements, those that affect the overall reliability of the system the most, is useful in delegating resources in later development phases.     

Real-Time Software Video Codec with a Fast Adaptive Motion Vector Search

A PC-based real-time software MPEG-4 video codec with a fast adaptive motion vector search is presented. In a fast adaptive motion estimation (ME) technique, the search order is dynamically changed in according with the motion of objects. This technique suppresses load fluctuation in the ME and contributes to the stable real-time work of the software codec. MMX instructions are used to increase the codec speed. On a portable PC, the software video codec supports satisfactory mobile visual communication at 64 kbps and 128 kbps, for example, at QCIF 15 fps. The codec on a 450 MHz PentiumII processor can encode and decode 30 CIF frames in real-time.     

On the Consolidation of Mixed Criticalities Applications on Multicore Architectures

In this paper we propose a hybrid solution to ensure results correctness when deploying several applications with different safety requirements on a single multi-core-based system. The proposed solution is based on lightweight hardware redundancy, implemented using smart watchdogs and voter logic, combined with software redundancy. Two techniques of software redundancy are used: the first one is software temporal triple modular redundancy, used for those tasks with low criticality and no real-time requirement. The second software redundancy technique is triple module redundancy for tasks with high criticality and real-time requirements, assisted by a hardware voter. A hypervisor is used to separate each task in the system in an independent resource partition, thus ensuring that no functional interference is occurring. The proposed solution has been evaluated through hardware and software fault injection on two hardware platforms, featuring a dual-core processor and a quad-core processor respectively. Results show a high fault tolerance achieved using the proposed architecture.     

Address generators for mapping arrays in bit-reversed order

A new technique enables fast Fourier transform (FFT) software to more efficiently use memory and processing time. The technique is used to design address pair generators for mapping an array in bit-reversed order. For exemplary digital signal processing (DSP) processors, in-place bit-reversed mappings based on the new technique were found to often have better computational efficiency than an out-of-place mapping.     

统一软件开发过程与建模技术研究

本文介绍了软件建模技术与软件开发方法的发展过程,讨论了统一建模语言和统一软件开发过程的基本概念和原理,并重点讨论了软件构架、用例驱动、迭代与增量等技术的内涵.尽快掌握并适应这种新方法,并开发与之配套的软件环境与工具是当务之急,这对于软件产业和软件工程学科有重要意义和作用.     

Reliability of composite software by different forms of uncertainty

In this paper we focus on the reliability of the software & hardware system by different forms of uncertainty: in the probability, possibility, and probabilitypossibility contexts. A program as a component of the system executes an infinite loop and consists of independent subprograms. The efficient technique based on the integral and functional equations is used for reliability analysing with regard for both hardware failures and software faults. The obtained expressions for computing the system reliability and software performances are simple from computational point of view.