On the base region minority carrier concentration in narrow-base transistors

An empirical current- and voltage-dependent boundary condition for the minority carrier concentration at the base edge of the collector-base depletion layer in a one-dimensional narrow-base transistor structure is presented. The limitations for narrow-base structures of the standard, voltage-only-dependent condition are discussed. DC and small-signal ac analyses using the new boundary condition are also presented.     

Increase of inverse beta of Si transistors due to low-temperature treatments

Transistors having diffused phosphorus emitters were treated at temperatures of 750° and 1100°C, At 1100°C, the direct and inverse beta both increase approximately as the square root of time. At 750°C, the inverse beta improves much more rapidly than the direct beta, and this is attributed primarily to a reduction of the concentration gradient in the base. This will decrease the inverse base transit time and allow i.i.l. transistors to operate at higher frequencies.     

Effects of hydrogen on majority carrier transport and minority carrier lifetimes in long-wavelength infrared HgCdTe on Si

We present extended results on the use of a hydrogen plasma to passivate the effects of defects in long-wave ir HgCdTe/Si. Annealed and as-grown epilayers, in situ doped with indium, were exposed to a hydrogen plasma generated in an electron cyclotron resonance (ECR) reactor. Secondary ion mass spectrometry was used to measure the extent of hydrogen incorporation into the epilayers. Hall and photoconductive lifetime measurements were used to assess the efficacy of passivation. The passivation of defects responsible for the scattering and recombination of electrical carriers was observed for most ECR conditions over a range of dislocation densities.     

Hot carrier analysis in low-temperature poly-Si thin-film transistors using pico-second time-resolved emission microscope

We have analyzed degradation of N-channel thin-film-transistor (TFT) under dynamic stress using a pico-second time-resolved emission microscope. We have successfully detected emission at pulse fall edge for the first time. Emission intensity increased with the decrease of pulse fall time. As the degradation depended on the pulse fall time, this dependence clearly illustrates that hot electrons are the dominant cause of the degradation under dynamic stress. Based on these dependences, we proposed a model considering electron traps in the poly-Si.     

Effect of electron trapping on IGFET characteristics

At large applied voltages, electrons flowing from the source to the drain of a n-channel insulated-gate field-effect transistor (IGFET) may gain sufficient energy from the high-field region near the drain to be emitted into the gate insulator layer near the drain junction. The trapping of these hot electrons in the gate insulator results in transconductance degradation and/or threshold voltage shift. There is also evidence of surface-state generation resulting from hot-electron emission into the SiO₂ layer. The extent of the resultant transconductance degradation and/or threshold shift depends strongly on the electron trapping characteristics of the gate insulator. For devices having SiO₂/Si₃N₄ as gate insulator, electron trapping is completely dominated by the Si₃N₄ layer. In this case, channel hot-electron effect results in threshold shift alone. For devices having SiO₂ as gate insulator, the trapping characteristics depend on its positive oxide-charge concentration. In this case, channel hot-electron effect results in a combination of transconductance degradation and threshold shift.     

Analysis of transit times and minority carrier mobility in n-p-n 4H-SiC bipolar junction transistors

An analysis of the transit times and minority carrier mobility in n-p-n 4H-SiC RF bipolar junction transistors is presented. These parameters were extracted from small signal RF measurements on 4H-SiC RF transistors with three different base thicknesses: 100, 140, and 200 nm. The study shows that the room temperature minority carrier electron mobility is 215 cm/sup 2//V/spl middot/s for a base Al doping of N/sub B/=4/spl times/10/sup 18/ cm/sup -3/. The analysis reveals that the collector charging time /spl tau//sub C/ and the parasitic charging time /spl tau//sub P/ from the capacitance between metal pads and the underlying collector region have a significant effect on the transistors RF performance. The calculated RF gain is in good agreement with the measured results.     

Effect on ion implanted germanium profile on the characteristics of Si/sub 1-x/Ge/sub x//Si heterojunction bipolar transistors

An optimum profile for Ge ion implantation in SiGe/Si heterojunction bipolar transistors is determined by using a two-dimensional simulator code for advanced semiconductor devices. The simulation code is based on a two-dimensional drift-diffusion model for heterostructure degenerate semiconductors with nonparabolicity included in the energy band structure. The model allows accurate simulations of carrier transport in short base devices. The simulation results indicate that for high current gain the Ge profile maximum must be close to the base-collector junction, and that the unavoidable tail of the implanted germanium in the collector region does not deteriorate the gain.<>     

Effect of minority carrier injection on lateral current in MIS tunnel structures

In this work it is shown that the MIS structure with an ultra-thin $\text{(20}\text{A}\text{?}\text{< x}{}_{\mathrm{i}}\text{< 40}\text{A}\text{?}\text{)}$ oxide is distinguished by a unique mechanism of lateral conduction. The flow of the lateral current between the two metal electrodes formed on the surface of an ultra-thin silicon dioxide is found to take place through the silicon substrate and the two non-equilibrium MIS tunnel diodes formed by the metal electrodes, the ultra-thin oxide, and the silicon. One of these diodes is forward biased and the other reverse biased. It is shown that the main limitation to the lateral current comes from the reverse biased diode. A structure is proposed in which such a lateral current can be efficiently controlled by the injection of minority carriers from the gate of an appropriately formed, conventional MIS tunnel diode into the depletion region of the reverse biased diode, so limiting the lateral current. Various physical phenomena related to this effect are studied and discussed.The MIS lateral tunnel structure considered in this work was fabricated in order to investigate the influence of minority carrier injection on the lateral conduction in MIS tunnel devices. However, the ideas proposed in this work can be developed into useful device structures.     

On the very-high-current degradations on Si n-p-n transistors

The stressing of 0.8-μm double-poly self-aligned Si n-p-n transistors at current densities up to 12.5 mA/μm² is discussed. The emitter contact does not fail abruptly; rather, its contact resistance drifts gradually. The contact resistance increases when the current flows out of the emitter and decreases when the current is reversed. The drift in emitter resistance can be thermally accelerated and is consistent with the electromigration phenomenon. The emitter-base junction shows negligible degradation when stressed in normal-mode operation, i.e. the current flows out of the emitter. However, the junction degrades when stressed with open collector or when stressed in inverse mode. The annealing experiments show that the junction degradation results from the interface-state generation. However, the drift in contact resistance cannot be recovered by annealing. The causes of junction degradation are suggested     

Effect of off-axis implant on the characteristics of advanced self-aligned bipolar transistors

This letter discusses the effect of off-axis implant on the characteristics of advanced self-aligned bipolar transistors utilizing a sidewall-spacer technology. Experimental results are presented to show that as a result of offsetting the base profile with respect to the emitter profile due to the sidewall shadowing effect, the 7° off-axis implant causes orientation-dependent perimeter punchthrough at one of the emitter edges and orientation-dependent perimeter tunneling at the other emitter edge.     

Reverse transient characteristics of a P-N junction diode due to minority carrier storage

Analysis of the transient switching characteristics of a p-n junction diode is considered a boundary value problem; solution of this problem yields mathematical equations applicable to the design of high-speed computer components. This analytical technique is used to establish the transient current of a semiconductor diode when an external biasing potential is rapidly switched from the forward to the reverse direction. Using a one-dimensional model of finite geometry, minority-carrier storage is assumed within a region of arbitrary lifetime, bounded on one side by the junction and on the other side by an ohmic contact of arbitrary recombination velocity. Further, this region of carrier storage is assumed to contain a drift field of constant magnitude as would result from an exponential type of conductivity grading. Mathematical equations are presented which characterize this transient situation from its initiation until the junction current has decayed to some arbitrary magnitude. Applications of this analysis are illustrated in graphical form throughout a range of parameters characterizing practical semiconductor devices.     

Comments on hot carrier noise in field-effect transistors

Taking into account more rigorously such high field effects as velocity saturation and an increasing free carrier temperature, a new derivation is presented for the output noise of the field-effect transistor. It is shown that for devices with a short channel and a high saturation voltage the equivalent noise resistance can increase considerably above the low field value.     

Effect of traps on low-temperature high electron mobility transistor characteristics

The I-V characteristics of MBE-grown AlGaAs/GaAs high electron mobility transistors (HEMT's) are studied using a bias and temperature sequence between 77 and 300 K to control trap occupancy. Low-temperature threshold voltage, transconductance, and saturation current are found to be either increased or decreased significantly relative to their 300 K values depending on the gate bias condition during cool down. This behavior is shown to be caused by variations in trap occupancy in the highly doped AlGaAs layer.     

少数载流子寿命测试系统研究

少数载流子寿命是衡量半导体材料性能的关键参数之一 ,文中介绍了光电导衰退法少数载流子寿命测试系统。阐述了光电导衰退法测试原理 ,分析了测试系统构成 ,以及光脉冲下降沿时间、微弱信号放大处理、前放带宽、精密定位等关键技术 ,其主要性能指标是 :少数载流子寿命测试范围 :1× 10 - 7～ 6× 10 - 6s ;可测样品尺寸 :小于 2 0mm ;单色光光点大小 :Φ 0 .3mm ;测试数据稳定度优于 10 %。     

On the thermionic-diffusion theory of minority transport inheterostructure bipolar transistors

The theory of the minority-carrier transport in heterostructure bipolar transistors (HBT) is reconsidered with a particular emphasis on the difference between the cases of abrupt and graded emitter-base junctions and the role in the former case of the quasi-Fermi level discontinuity at the interface. Exact analytical formulas are derived for the current-voltage characteristics of a double-heterojunction HBT, valid for arbitrary levels of injection and base doping, including the degenerate case. The theory is applied to the static characterization of HBT which compares the forward and reverse dependences I_C (V_EB) and I_E(V _CB). It is shown that these characteristics coincide in the low-injection limit if both the emitter-base and the collector-base diodes have ideality factors close to unity. The ratio of base currents in the reverse and forward modes of operation can be used to determine the abrupt emitter-base conduction band discontinuity and estimate the scattering length in the base     

Effect of carrier lifetime on the forward characteristics of high-power devices

The influence of carrier lifetime on the characteristics of high-power devices has been examined from the standpoint of forward voltage drop at a given current, using existing theories of the p⁺ln⁺diode and allowing for carrier-carrier scattering effects. It is found that in the absence of recombination current in the heavily doped end regions, there exists an optimum base lifetime giving a minimum forward voltage. This minimum occurs because for increasing lifetime, the increase in junction voltage due to carrier buildup at the junction edge eventually overtakes the reduction in base voltage due to conductivity modulation. On the other hand, when the recombination currents in the end regions predominate over that in the base, their presence tends to inhibit carrier buildup, with the result that for sufficiently large values of base lifetime, the forward voltage falls to a limiting value. In certain cases, this value is less than the minimum voltage found in the absence of recombination in the end regions. In all the cases examined, the conclusion is that little is to be gained by further increase in lifetime beyond a certain value which depends on both the properties of the base and those of the end regions.     

Effect of UV-ozone oxidation on the device characteristics of InP-based heterostructure bipolar transistors

In this letter, we report the effect of UV-ozone treatments on the electrical characteristics of InGaAs/InP heterostructure bipolar transistors (HBTs). For treatments of less than 10 min, the HBT’s current gain increased with the UV-ozone exposure. This improvement is attributed to a passivation of the extrinsic base. For exposures longer than 10 min, the current gain is reduced. An increase of the base collector leakage current, leading to a degradation of the HBT’s breakdown voltage, was observed after only about 2 min of UV-ozone treatment.     

Effect of a diamond heat spreader on the characteristics of gallium nitride-based transistors

A problem, which concerns the effect of the diamond heat-spreading layer on the temperature and voltage-current characteristics of gallium nitride (GaN) high-electron-mobility transistors (HEMTs) is solved for the first time in a hydrodynamic model (which includes the continuity equation, Poisson equation, and equations for electron and lattice temperatures). The mechanism of the occurrence of peak electron and lattice temperatures (hot spots) is analyzed. It is shown that introducing a heat spreader considerably reduces the maximum temperature (by 263 K for a sapphire substrate and by 163 K for a silicon carbide substrate) and improves the voltage-current characteristics. The effectiveness of the heat spreader is evaluated depending on its thickness, gate size, and substrate material to find the optimum design.     

Study of carrier trapping in stacked dielectrics

Polysilicon/silicon-nitride/thermal-oxide/n-Si (SNOS) and polysilicon/oxide/silicon-nitride/thermal,oxide/n-Si (SONOS) capacitors were fabricated with various nitride thicknesses. It is shown that formation of an oxide layer on the nitride (NOX) reduces current conduction by more than two orders of magnitude at higher fields. Studies of the flat-band voltage shift with injected carrier fluence show opposite flat-band voltage shifts for SNOS (negative) and for SONOS (positive), under positive gate stress. NOX apparently acts as a hole injection barrier.