电源分配网络的频域去耦设计

集成电路（IC）功耗不断增加,电压噪声容限不断减小的发展趋势,成为高速数字电路电源分配系统设计面临的巨大难题。针对此问题,从电容等效模型和电容去耦原理出发,提出了一种基于目标阻抗的去耦电容量化方法,通过分析计算电容安装后引线、过孔和印制板（PCB）产生的寄生电感效应,完成了0～50 MHz的频带范围内电源分配网络的阻抗设计,并结合HyperLynx电源完整性工具对系统进行了仿真,结果表明使用该方法设计的去耦电容网络可以有效避免过度设计,提高设计效率。     

晶上系统电源分配网络建模及IR-drop研究

为预测和评估晶上系统电性能，提出了一种结合电磁和分析模拟的晶上系统电源分配网络（PDN）建模方法。该方法将PDN结构划分为单独组件，用电磁工具和公式计算提取无源电阻、电感、电容参数后，按组件位置组装成等效电路模型。通过与三维全波仿真自阻抗曲线比较对模型进行了验证，并基于模型，用ADS研究了模组位置排布、垂直互连密度、芯片功耗及去耦电容对电压降（IR-drop）的影响。结果表明：模型自阻抗曲线与三维全波仿真基本吻合；在一定范围内，合理排布模组位置、增加垂直互连密度、减少芯片功耗、使用较大去耦电容能降低IR-drop，为晶上系统设计和制造提供了参考。     

一种适用于超宽带通信的微带垂直转换结构

该文提出一种适用于超宽带电路的基于过孔的微带垂直转换结构。通过在过孔附近的电源层上蚀刻平面电磁带隙单元来抑制电源分配网络谐振,降低其在过孔处的自阻抗,以改善垂直互连结构传输性能。将互连结构分解为过孔处耦合的微带线结构和电源平面对结构,并使用网络分析方法快速估算系统传输性能。仿真和实验测试表明,在3.1-10.6 GHz的超宽带频段内过孔的插入损耗小于0.4 dB。与在电源分配网络之间添加短路过孔方法相比,该结构在传输性能相当的前提下减少了一个布线层,从而降低了设备成本。     

PCB布线中的过孔和电容效应分析和结构优化

在多层PCB布线中,过孔和电容是常见的不连续结构。信号线在不同平面间转换传输路径时,过孔与回流层之间的寄生电容与寄生电感将引起信号完整性的相关问题;而常用的传输线上的AC耦合电容等,引入了阻抗突变的结构,由此带来了反射等相关问题。通过对多层PCB上的过孔进行建模仿真,研究不同变量对过孔性能的影响趋势,以协助信号完整性问题的分析;通过对电容阻抗突变处进行不同形式的补偿,仿真和测试结果相验证,得到提高信号传输质量的解决方案。     

过孔转换信号完整性分析的区域分解有限元法

提出了一种基于区域分解的二维有限元法分析多层印制电路板电源/地平面中过孔转换结构的信号完整性.过孔电流产生的电磁场呈三维结构,其中,一部分电磁波沿过孔轴向传输,另一部分电磁波在电源/地平面间沿径向传播.采用一虚拟柱面将求解区域分割为过孔区和电源/地平面区.将过孔区建模为以周向磁场为主分量的二维轴对称问题,而将电源/地平面区建为以垂直电场为主分量的二维模型.首先求解电源/地平面区的二维边值问题获得分割边界上节点的波阻抗,然后将该波阻抗代入过孔区模型中分割边界节点的边界条件,从而计算出过孔信号传输的S参数.所提方法通过模型缩减可实现对微细过孔结构信号完整性的精确快速计算,且采用全波电磁场分析软件对算法的有效性和准确性进行了验证.     

一种有效解决较宽频带电源完整性问题的方法

光子能带隙结构能够有效解决高频（0．4GHz以上）的电源完整性问题,去耦电容能有效解决低频（0．4GHz以下）的电源完整性问题。文章介绍了一种结合光子能带隙结构和去耦电容解决电源完整性问题的方法,并利用Ansoft公司Siwave软件仿真分析。     

参考平面转换对信号传输的影响及传输优化

在多层印刷电路板(PCB)设计时,经常需要信号通过过孔跨接到其他层走线,这种走线方式会导致返回路径不连续(RPD),引发信号完整性问题,文中应用电磁场全波仿真工具SIwave构建信号跨层走线模型,从电源分配网络(PDN)阻抗的角度分析了跨层走线对信号传输的影响,同时使用添加电容的方法优化信号传输路径,并对电容的选取及其位置的确定进行了研究,为PCB设计提供参考。     

本征模在电源完整性分析中的应用

针对日益复杂的多层基板电源完整性问题,提出了一种基于本征模分析所需频段内PDN(Power Delivery Network)阻抗大于目标阻抗的仿真设计方法。基于13层的AlN基板,利用AnsysSiwave电磁仿真软件提取电源分配网络的Z阻抗曲线,观察响应上是否有谐振点。针对谐振点,利用本征模观察谐振频点的谐振分布,确认最大谐振位置。通过在最大谐振位置上加载去耦电容的方式将谐振频点移至高频,以此使电源Z阻抗满足目标阻抗需求。     

2.5D系统封装中高速I/O链路信号/电源完整性协同仿真

提出了一种2.5维（2.5D）系统封装高速输入/输出（I/O）全链路的信号/电源完整性（Signal integrity/power integrity,SI/PI）协同仿真方法。首先通过电磁全波仿真分析SiP内部“芯片I/O引脚-有源转接板-印刷电路板（即封装基板）-封装体I/O引脚”这一主要高速信号链路及相应的转接板/印刷电路板电源分配网络（Power distribution network,PDN）的结构特征和电学特性，在此基础上分别搭建对应有源转接板和印刷电路板两种组装层级的“信号链路+PDN”模型，并分别进行SI/PI协同仿真，提取出反映信号链路/PDN耦合特性的模块化集总电路模型，从而在电路仿真器中以级联模型实现快速的SI/PI协同仿真。与全链路的全波仿真结果的对比表明，模块化后的协同仿真有很好的可信度，而且仿真时间与资源开销大幅缩减，效率明显提升。同时总结了去耦电容的大小与布局密度对PDN电源完整性的影响及对信号完整性的潜在影响，提出了去耦电容布局优化的建议。     

高速PCB电源完整性研究

一块成功的高速印刷电路板(PCB),需要做到信号完整性和电源完整性,首先必须降低地弹.为了滤除地弹骚扰,推荐在电源/地平面对上,安放去耦电容。     

高速多层PCB板中过孔的建模、仿真及分析

利用Hyperlynx软件对高速PCB板中所应用到的过孔进行建模与仿真,分析了过孔对流经其上信号的影响,并给出了改进、优化过孔的方法。仿真结果表明,在要求线上信号完整性高的情况下,使用过孔方式连接的电路得到了改善和优化。     

Quantifying SMT decoupling capacitor placement in dc power-busdesign for multilayer PCBs

Noise on a dc power-bus that results from device switching, as well as other potential mechanisms, is a primary source of many signal integrity (SI) and electromagnetic interference (EMI) problems. Surface mount technology (SMT) decoupling capacitors are commonly used to mitigate this power-bus noise. A critical design issue associated with this common practice in high-speed digital designs is placement of the capacitors with respect to the integrated circuits (ICs). Local decoupling, namely, placing SMT capacitors in proximity to ICs, is investigated in this study. Multilayer PCB designs that employ entire layers or area fills for power and ground in a parallel plate structure are considered. The results demonstrate that local decoupling can provide high-frequency benefits for certain PCB geometries through mutual inductive coupling between closely spaced vias. The associated magnetic flux linkage is between the power and ground layers. Numerical modeling using an integral equation formulation with circuit extraction is used to quantify the local decoupling phenomenon. Local decoupling can effectively reduce high-frequency power-bus noise, though placing capacitors adjacent to ICs may limit routing flexibility, and tradeoffs need to be made based on design requirements. Design curves are generated as a function of power-bus layer thickness and SMT capacitor/IC spacing using the modeling approach to quantify the power-bus noise reduction for decoupling capacitors located adjacent to devices. Measurement data is provided to corroborate the modeling approach     

Electromigration reliability of open TSV structures

Through silicon vias are the components in three-dimensional integrated circuits, which are responsible for the vertical connection inside the dies. In this work we present studies about the reliability of open through silicon vias against electromigration. A two-step approach is followed. In the first step the stress development of a void free structure is analysed by means of simulation to find the locations, where voids due to stress are most probably nucleated. In the second step, voids are placed in the through silicon vias and their evolution is traced including the increase of resistance. The resistance raises more than linearly in time and shows an abrupt open circuit failure. These results are in good agreement with results of time accelerated electromigration tests.     

Modeling of irregular shaped power distribution planes usingtransmission matrix method

A major problem in power distribution networks is simultaneous switching noise (SSN), which causes several signal integrity issues. To understand the behavior of the power distribution system (PDS) and its contribution to SSN, noise prediction methods are necessary. This paper presents a method for analyzing arbitrary shaped power distribution networks both in the frequency and time domain. Using a two dimensional array of distributed RLCG circuits, the impedance of a power/ground plane pair is computed. For the efficient computation of the power distribution impedances at specific points in the network, a multi-input and multi-output transmission matrix method has been used. To verify the accuracy of this method, the simulation results have been compared with Spice which uses a circuit based approach and an analytical solution based on the cavity modes in the structure. The simulation results have also been compared with measurements for an L-shaped structure. The transmission matrix method has been applied to a split plane and an arbitrary shaped power plane to demonstrate the application of this technique to irregular geometries     

An efficient approach for power delivery network design with closed-form expressions for parasitic interconnect inductances

Investigation of a dc power delivery network, consisting of a multilayer PCB using area fills for power and return, involves the distributed behavior of the power/ground planes and the parasitics associated with the lumped components mounted on it. Full-wave methods are often employed to study the power integrity problem. While full-wave methods can be accurate, they are time and memory consuming. The cavity model of a rectangular structure has previously been employed to efficiently analyze the simultaneous switching noise (SSN) in the power distribution network. However, a large number of modes in the cavity model are needed to accurately simulate the impedance associated with the vias, leading to computational inefficiency. A fast approach is detailed herein to accelerate calculation of the summation associated with the higher-order modes. Closed-form expressions for the parasitics associated with the interconnects of the decoupling capacitors are also introduced. Combining the fast calculation of the cavity models of regularly shaped planar circuits, a segmentation method, and closed-form expressions for the parasitics, an efficient approach is proposed herein to analyze an arbitrary shaped power distribution network. While it may take many hours for a full-wave method to do a single simulation, the proposed method can generally perform the simulation with good accuracy in several minutes. Another advantage of the proposed method is that a SPICE equivalent circuit of the power distribution network can be derived. This allows both frequency and transient responses to be done with SPICE simulation.     

Partial uniplanar compact electromagnetic bandgap combined with high-impedance surface to suppress simultaneous switching noise

Proposed is a design for a partial uniplanar compact electromagnetic bandgap (UC-EBG) structure, in conjunction with a high-impedance surface (HIS), to suppress simultaneous switching noise (SSN) over the wide frequency range 0.38-15.494-GHz. Different from the conventional methods, which use an EBG plane, the proposed structure uses only two UC-EBGs at the excitation and receiving ports to suppress SSN. This technique can be applied to sensitive circuits to maintain their power integrity. The other region maintains good signal integrity when a signal return path is referenced to an EBG plane.     

Coupling of vias in electronic packaging and printed circuit board structures with finite ground plane

A full wave method is presented for modeling and analyzing multiple interactions among vertical vias in densely packaged integrated circuits and printed circuit board with ground plane of finite extent. In such structures, the TEM mode in the planar structure is excited and can propagate and cause interaction of waves among vias. Reflections will also occur at the edges of the finite ground plane. The electromagnetic analysis methodology is an extension of the previous methodology in analyzing multiple scattering among vias for infinite ground plane . The analysis is based upon the cylindrical wave mode expansion of the magnetic field Green's function, the Foldy-Lax multiple scattering formalism and utilizing the resonator modes of a circular cavity. The circular resonator modes are transformed into cylindrical waves onto the cylindrical via structures. Numerical results illustrate the physics of the underlying resonance scattering problems. We consider the cases of a) two coupled active vias of differential mode and b) two coupled vias of common mode. Results are also illustrated for ground plane resonance and the effects of shorting vias on such resonance. The effects of off-centering and the presence of idle vias are also illustrated.     

Modeling and transient simulation of planes in electronic packages

This paper presents a modeling and simulation approach for ground/power planes in high speed packages. A plane pair structure is first characterized in terms of its impedance (Z) matrix at arbitrary port locations in the frequency domain. This solution is then extended for multiple plane pairs under the assumption that skin effect is prominent at higher frequencies causing isolation between the layers. Since the solutions are in analytical form, the frequency and transient response can be computed efficiently requiring small computational time. To develop spice models, equivalent circuits are constructed using resonator models with passive elements using model order reduction methods. This paper also discusses a method for incorporating decoupling capacitors into the plane models. The simulation results show good correlation with measured data     

Partial EBG Structure with DeCap for Ultra‐wideband Suppression of Simultaneous Switching Noise in a High‐Speed System

To supply a power distribution network with stable power in a high‐speed mixed mode system, simultaneous switching noise caused at the multilayer PCB and package structures needs to be sufficiently suppressed. The uniplanar compact electromagnetic bandgap (UC‐EBG) structure is well known as a promising solution to suppress the power noise and isolate noise‐sensitive analog/RF circuits from a noisy digital circuit. However, a typical UC‐EBG structure has several severe problems, such as a limitation in the stop band's lower cutoff frequency and signal quality degradation. To make up for the defects of a conventional EBG structure, a partially located EBG structure with decoupling capacitors is proposed in this paper as a means of both suppressing the power noise propagation and minimizing the effects of the perforated reference plane on the signal quality. The proposed structure is validated and investigated through simulation and measurement in both frequency and time domains.