基于DSP和RF ASIC芯片的GFSK调制解调器

介绍了一种基于DSP和RFASIC芯片的GFSK正交调制解调器的设计和研制方案。回顾了传统的GFSK调制器的硬件实现方法,分析了GFSK正交调制器的基带构成,讨论了在SYSTEMVIEW平台下GFSK调制解调器的系统仿真,并将仿真算法用于TI VC5402 DSP,在子系统级RFASIC芯片U2793B和AD6459的硬件环境中,较好地实现了GFSK正交调制解调功能。     

Henry Samueli

With the explosion in the popularity of cable and digital subscriber line modems for high-speed Internet access, the odds are that there will be one of these broadband communications devices in many homes or offices. The odds are that the chips inside the modem will have been designed by Broadcom Corp., and be based on digital signal-processing (DSP) architectures conceived by Henry Samueli. The author presents a biography of Samueli from his school days through his work in the defense industry and his teaching career to the co-founding of, and work at, Broadcom.     

DSP implementations of sophisticated speech codecs

Hardware implementation aspects of sophisticated speech codecs are addressed. The major points discussed are approaches to implementation of the sophisticated speech codecs, requirements for DSP (digital signal-processing) implementation of the codecs, such as the type of arithmetic processing and the necessity of bit-level specifications, and codec implementation and DSP programming techniques for three specific coding algorithms: 32-kb/s ADPCM (adaptive digital pulse code modulation), 64-kb/s (7 kHz) SB (subband)-ADPCM, and 16-kb/s APC-AB (adaptive predictive coding with adaptive but allocation) codecs     

数字通信中的卷积编码及Viterbi译码器设计

讨论了基于DSP技术的信道编、译码的问题。     

Space-time trellis and space-time block coding versus adaptive Modulation and coding aided OFDM for wideband channels

The achievable performance of channel coded space-time trellis (STT) codes and space-time block (STB) codes transmitted over wideband channels is studied in the context of schemes having an effective throughput of 2 bits/symbol (BPS) and 3 BPS. At high implementational complexities, the best performance was typically provided by Alamouti's unity-rate G/sub 2/ code in both the 2-BPS and 3-BPS scenarios. However, if a low complexity implementation is sought, the 3-BPS 8PSK space-time trellis code outperforms the G/sub 2/ code. The G/sub 2/ space-time block code is also combined with symbol-by-symbol adaptive orthogonal frequency division multiplex (AOFDM) modems and turbo convolutional channel codecs for enhancing the system's performance. It was concluded that upon exploiting the diversity effect of the G/sub 2/ space-time block code, the channel-induced fading effects are mitigated, and therefore, the benefits of adaptive modulation erode. In other words, once the time- and frequency-domain fades of the wideband channel have been counteracted by the diversity-aided G/sub 2/ code, the benefits of adaptive modulation erode, and hence, it is sufficient to employ fixed-mode modems. Therefore, the low-complexity approach of mitigating the effects of fading can be viewed as employing a single-transmitter, single-receiver-based AOFDM modem. By contrast, it is sufficient to employ fixed-mode OFDM modems when the added complexity of a two-transmitter G/sub 2/ scheme is affordable.     

Combining visual MPEG tools in the context of video adaptability

This paper proposes an interworking between MPEG-2 Intraframe coding and JPEG2000 international standards. The latter codec is integrated into the base layer of spatial scalability encoders whilst retaining full compatibility with MPEG-2 decoders. The proposed solution combines existing ISO/IEC MPEG standards and is elaborated upon with respect to three application areas; bitstream format portability and adaptability, bitstream switching and combined video scalability. The paper elaborates upon the proposed coding architectures and compatibility with published MPEG standards. The proposed coding architecture is compared against counterpart video transcoders, scalable and single layer codecs. It is shown that the proposed spatial encoder is superior to all the aforementioned codecs whilst enjoying an extensible architecture capable of serving restricted end systems and hosting additional scalable layers such as SNR and temporal scalabilities.     

Recent advances in DSP systems

Some of the advances that have contributed to the realization of communication systems with programmable digital signal processors (DSPs) are described. DSP architectures are examined, covering the performance improvements resulting from advances in circuitry as well as in architecture. Architectural advances discussed are parallel processing, function generation, integrating analog circuits, and sigma-delta analog-to-digital conversion. DSP applications to high-speed modems, trellis-coded modulation, and echo cancellation are examined. The DSP implementation of a V.32 modem is described     

Applications of voice processing to telecommunications

The ways in which people communicate are changing rapidly. The options are many and diverse, ranging from voice calls over wireless networks, to video calls over the conventional wired network, ISDN video, FAX, e-mail, voice mail, beeper services, data services, audio teleconferencing, video teleconferencing, and so-called scribble phone service (transmission of arbitrary handwritten input). This revolution in communications is being fueled by several sources, including the availability of low-cost, low-power, computation in both DSP and RISC chips, larger and cheaper memory chips, improved algorithms for communications (e.g., modems, signaling) and signal processing, and finally the creation of world-wide standards for transmission, signal compression, and communication protocols. The broad goal of the communications revolution is to provide seamless and high-quality communications between people (or groups of people), anywhere, anytime, and at a reasonable price. Although there are many technologies that form the bases for the communications environment of the twenty-first century, one of the key technologies for making the vision a reality is voice processing. In this paper we attempt to show, by example, how voice processing has been applied to specific problems in telecommunications, and how it will grow to become an even more essential component of the communications systems of the twenty-first century     

Digital frequency error detectors for OQPSK satellite modems

Two algorithms for frequency error detection in OQPSK satellite modems are presented. The results of computer simulations in respect of acquisition and noise performance are given. These algorithms are suitable for DSP implementation and are applicable to mobile satellite systems in which significant Doppler shift is experienced.<>     

DSP在图像处理中的应用

本文以TITMS3 2 0C5 4XDSP为例描述了DSP作为优秀的数字信号处理平台所具备的特点 ,并在此基础上介绍了在DSP上实现数字图像处理所需的方法及特殊算法。     

Special ICs in digital switching-an overview

Traces the influence of special-purpose integrated and LSI circuits in digital switching systems. The existence of custom digital chips, codecs and filters, and high- and low-voltage analog cross-point arrays is related to the choice between alternative architectures. Recent trends toward replacing mature components such as transformers by subscriber line interface circuits (SLICs) are outlined.     

基于DSP处理器的MP3解码器的优化

音频格式MP3（第三层）是现在非常流行的一种数字音频压缩技术，适应于微小的移动设备，如MP3播放器和手机等。它们内置的解码器大多或者是基于DSP，或者是RISC处理器，虽然基于汇编语言的解码程序已经很成熟高效，但是不方便移植。文中提出的优化解码程序是基于标准C语言的，只要添加不同类型的DSP头文件，就可以移植应用。已经成功解出MP3（44．1kHz，128kbps），并且满足国际音频组要求的限制精度。     

A single-chip frequency-shift keyed modem implemented using digital signal processing

A single-chip modem that uses digital signal processing (DSP) to perform the modem functions is described. The DSP modem is a complete single-chip modem which handles all of the popular international standards for frequency-shift keyed modems. These specifications include the Bell 103 and 202 specifications for North America, and the CCITT V.21 and V.23 specifications in Europe. The authors describe modem system aspects, the architecture and philosophy underlying the design of this modem, and some of the special features that are incorporated into the modem through the use of digital signal processing.     

基于TMS320DM6446的电源模块设计与实现

针对以达芬奇(Da Vinci)系列DSP中的TMS320DM6446处理器为核心的DSP系统,设计并实现了一个电源模块,采用了两片高效同步的电源管理芯片:TPS75003和TPS62040,以满足系统对于内核电压、外围I/O电压,以及外围设备的供电电压的要求;同时,通过三块电压监控芯片TPS3808对电源管理芯片产生的电压进行实时监控,以实现内核电压与外围I/O电压的顺序上电及复位.     

基于DM6446的电源模块设计与实现

针对达芬奇（DaVinic）系列的TMS320DM6446对供电电源的要求,采用两片高效同步的电源管理芯片：TPS75003和TPS62040,为DSP器件平台提供内核电压和外围I/0电压,以及外围设备的供电电压。并通过三块电压监控器件TPS3808实时监控由电源管理芯片产生的电压,从而实现DSP的内核电压与外围I/O电压的顺序上电及复位。     

DSP在嵌入式阀门控制器中的应用

DSP是高集成、高性能指令控制应用芯片,在阀门控制器中根据控制需求采用TMS320F2812作为嵌入式处理器核心单元。文中从应用角度出发设计分析了处理机电路特点,其中电路设计综合了DSP芯片特点和可靠性要求,并最终设计实现了理想的性能。     

从Matlab仿真到DSP实现信号处理算法

当用Matlab完成数字信号处理算法仿真后,如何在DSP芯片上实时实现,是电气信息类大学生需要掌握的一项重要的工程实践能力。在仿真过程中,有算法移植、DSP工程建立和算法实现这三个关键环节。本文介绍了当信号处理算法完成离线仿真后到DSP实时实现的具体步骤,并针对此过程中的常见问题,给出相应的解决方案。     

DSP中FPGA实现的新思路

本文论述了FPGA在DSP应用上的优缺点,比较了FPGA芯片和DSP芯片之间的差别,介绍了解决隔阂的方案-XtremeDSP轮件包和平台级的Virtex Ⅱ芯片,最后,对Xtreme和Vitrex Ⅱ芯片的特点进行了详细说明。     

DSP的发展概况和应用前景

本文介绍了DSP的发展概况、特点和应用前景,详述了目前国内广泛使用的两个DSP芯片系列,最后总结了DSP和通信技术的密切关系。     

Digital signal processing in communications satellite payloads

Satellite on-board digital signal processing (DSP) offers the potential for significantly improved performance in certain satellite communications system scenarios in terms of system capacity and link quality. On-board DSP functions include digital beamforming, frequency multiplexing and demultiplexing, interference suppression, signal level control and, in a regenerative system, modems. The authors review the status of DSP in communications satellite payloads, focusing on the system advantages, some basic algorithms, and application specific IC implementation issues. As a specific illustrative example an advanced land mobile system is described which features digital beamforming and associated digital signal processing to achieve significant gains in power efficiency (and hence capacity), frequency reuse and flexibility to response to changing traffic scenarios