Computer-aided design of VLSI circuits

With the rapid evolution of integrated circuit (IC) technology to larger and more complex circuits, new approaches are needed for the design and verification of these very-large-scale integrated (VLSI) circuits. A large number of design methods are currently in use. However, the evolution of these computer aids has occurred in an ad hoc manner. In most cases, computer programs have been written to solve specific problems as they have exist and no truly integrated computer-aided desisn (CAD) systems exist for the design of IC's. A structured approach both to circuit desisn and to circuit verification, as well as the development of integrated design systems, is necessary to produce cost-effective error-free VLSI circuits. This paper presents a review of the CAD techniques which have been used in the design of IC's, as well as a number of design methods to which the application of computer aids has proven most successful. The successful application of design-aids to VLSI circuits requites an evolution from these techniques and design methods.     

Computer-aided design for integrated circuits: trying to bridge the gap

CAD performance in the field of simulation, testing, and layout is compared to the increase of digital integrated systems complexity. This complexity already exceeds the fundamental limits of existing software, especially in the testing area. On the other hand, fully manual layout of VLSI leads to unreasonably long design times and extremely high risks. This will favor design automation methods in layout. Testability and layout will most likely impose some sacrifice of VLSI overcapacity to a more structured system architecture. This architecture will lead to testable dedicated VLSI system design through the use of automated design software to keep development costs low.     

A general-purpose framework for CAD algorithms

The demands imposed by large circuits on computer-aided design (CAD) systems are discussed, showing how each can be met. In particular, it is shown how a CAD system can handle many tools, accommodation different design environments, provide a flexible interface, provide user-specified constraints, and be platform independent. A complete system, called the Electric VLSI Design System which exhibits all of these features is described     

SSN研究及其在VLSI设计流程中的应用

本文详述了同步开关噪声(SSN)影响VLSI电路可靠性的一个主要因素:芯片-封装界面的寄生电感.根据在芯片中插入电源/地线引脚,减小芯片-封装界面的寄生电感的思想,提出一种简便有效的基于SSN性能的输出驱动器优化布局方法并将之集成到VLSI设计流程中.用0.6微米CMOS工艺进行了验证.结果表明 :该优化设计可有效降低SSN对VLSI电路可靠性的影响.     

Study of the methods of calibration of the process OPC VT-5 models with a variable threshold

One of the most widely used approaches to simulation of complex lithographic systems is considered. The approach makes it possible to take into account the effect of the features of the manufacturing process on the transfer of very large-scale integration (VLSI) topology to a silicon wafer. The approach is based on the present-day aids for simulation and computer-aided design (CAD) of VLSI circuits and provides a means for reducing errors (that arise from the imperfection of the manufacturing process) in transferring the design onto the silicon wafer. A family of empirical VT-5 mathematical models involving a variable threshold is analyzed. The models are used in the CAD Calibre, Mentor Graphics Ltd. The results of calibration and verification of the process model for a polysilicon layer produced by the technology of Department of Microtechnology (DMT), Scientific Research Institute of System Analysis, Russian Academy of Sciences, in compliance with the 0.25 μm design standards are reported. The results of verification of the developed model over the contours of complex topological structures are reported. The verification was conducted with the use of the SEMCal module of the CAD Calibre.     

Technology transfer between VLSI design and software engineering: CAD tools and design methodologies

Recent research on the explicit transfer of technology used in computer-aided design (CAD) tools and design methodologies is reported. First, several examples are given of applications of these technologies to software engineering. Then, three research projects are described which focused on applying software engineering principles to the VLSI design process. They are: a methodology, language, and assessment tool for multilevel mixed-mode VLSI designs; a research project that explored the potential for transfer of software design methodologies for managing VLSI design complexity; and a specification technique for "modules" in a VLSI design that localizes the impact of changes to the design. Next, a CAD tool and design methodology are described which consider the design of software and hardware together, and apply common techniques to both. Finally, some observations are made on the appropriateness of technology transfer between VLSI design and software engineering.     

Computer-aided design in VLSI device development

Computer-aided design (CAD) has been used extensively in the development of VLSI MOS technology at Hewlett-Packard Laboratory. The CAD system for MOS device design is described. The development of the p-channel transistor with submicrometer channel length, trench isolation in CMOS, and side-wall-masked isolation (SWAMI) for VLSI technology are then presented, followed by a discussion of the techniques used in the simulation of parasitic capacitances in multilayer interconnects for circuit performance evaluations.     

Advanced digital receiver principles and technologies for PCS

The synergy between digital radio communications and VLSI signal processing is revolutionizing the design of wireless terminals. Driving this synergy are certain fundamental paradigms in modern communication theory, digital signal processing, and VLSI design. The authors discuss the modern centers-of-gravity model, which they believe is emerging as the basis for the successful design and implementation of advanced digital communication systems. Central to this model are design principles that enable engineers to systematically derive digital receiver structures and explore algorithm and architecture trade-offs using sophisticated tools. Digital signal processing technology is critical in the implementation of these digital receiver structures efficiently. Finally, CAD tools for digital communications system design and design space exploration are shown to be of crucial importance in the efficient execution of these designs     

The design and implementation of a low-power clock-poweredmicroprocessor

We describe the design and implementation of a 16-bit clock-powered microprocessor that dissipates only 2.9 mW at 15.8 MHz based on laboratory measurements. Clock-powered logic (CPL) has been developed as a new approach for designing and building low-power VLSI systems that exploit the benefits of supply-voltage-scaled static CMOS and energy-recovery CMOS techniques. In CPL, the clock signals are a source of ac power for the other large on-chip capacitive loads. Clock amplitude and waveform shape combine to reduce power. By exploiting energy recovery and an energy-conserving clock driver, it is possible to build ultra-low-power CMOS processors with this approach. We compare the CPL approach with a conventional, fully dissipative approach for a processor with a similar ISA and VLSI architecture which was designed using the same set of VLSI CAD tools. The simulation results indicate that the CPL microprocessor would dissipate 40% less power than the conventional design     

Wave-pipelining: a tutorial and research survey

Wave-pipelining is a method of high-performance circuit design which implements pipelining in logic without the use of intermediate latches or registers. The combination of high-performance integrated circuit (IC) technologies, pipelined architectures, and sophisticated computer-aided design (CAD) tools has converted wave-pipelining from a theoretical oddity into a realistic, although challenging, VLSI design method. This paper presents a tutorial of the principles of wave-pipelining and a survey of wave-pipelined VLSI chips and CAD tools for the synthesis and analysis of wave-pipelined circuits     

可用于微机上的VLSI设计软件-Alliance

本篇文章介绍了一种超大规模集成电路设计软件-Auiance VLSI CAD System通常设计超大规模集成电路必须有昂贵的软件诸如Cadence，Synopsys，Mentor Graphics，而且要在高性能的工作站上才能完成。然而Alliance不仅能成功的运用于微机上而且可以从互连网上免费下载因此Alliance这套软件给高等院校的学生学习集成电路的设计提供了许多低廉、有效的工具。我们将告诉读者如何在微机上安装Alliance，如何用Alliance来设计超大规模集成电路。     

硬件描述语言VHDL及其应用

ＶＨＤＬ是一种超高速ＶＬＳＩ硬件描述语言，能对集成电路的功能和结构进行描述，用ＣＡＤ软件将其编译和转换，并自动形成线路，概要地介绍了ＶＨＤＬ的设计组织和数据类型，并对ＶＨＤＬ的特点及其在ＶＬＳＩ设计中的应用要点做了一些探讨。     

并行算法在VLSICAD中的应用

本文简介并算法在ＶＬＳＩＣＡＤ中的应用，介绍了这一领域的研究现状，所采用的关键技术以及进一步的研究发展方向。     

CAD latches onto new techniques for analog ICs

Design techniques for low-power, nondigital nonmicrowave circuits are presented. The major objectives in improving analog CAD are described. The current status of CAD for analog circuits is discussed, and interesting trends are examined. An approach to CAD-compatible analog design is discussed. These designs also apply to mixed analog/digital VLSI design environments, particularly to circuits used in signal processing     

微波电路原理图编辑工具及网表提取程序的实现方法

介绍了基于用于ＶＬＳＩＣＡＤ的熊猫系统，针对微波电路的特点进行修改和扩充，形成微波电路原理图编辑工具的方法。     

国外军用超大规模集成电路的应用与发展趋势

论述了国外超大规模集成电路的发展趋势及在武器装备中的作用.介绍了美、欧、日、韩今后发展超大规模集成电路的对策.分析了国外超大规模集成电路民技军用的背景,随着集成电路技术的发展,民用市场上会有更多质优价廉的民用集成电路产品适合军事装备的需要,民技军用是国外军用集成电路今后的发展趋势.     

High-level synthesis: current status and future prospects

High-level synthesis is becoming increasingly important in the area of VLSI CAD. During the last decade, much research has been carried out in this area and some results have been achieved. This paper presents a survey on the state-of-the-art of current high-level synthesis research and applications. Besides basic knowledge, a comprehensive overview has been conducted among the various theories, methods, algorithms, and applications of the existing systems. Their advantages, limitations, and feasibilities are also described. Finally, some points on current status and future directions of high-level synthesis are addressed.     

The role of VLSI in multimedia

The opportunity to develop multimedia applications based on compressed video is the result of progress in three areas: standards, networking, and VLSI. Current video coding standards and their underlying algorithms use a variety of techniques to isolate and remove redundancies in the image sequence. Some of these techniques place severe demands on the underlying VLSI technology. Manufacturers of VLSI codecs have chosen a number of different architectural approaches. The advantages and disadvantages of each are discussed in the context of various applications with examples taken from existing or soon to be announced products. The AT&T AVP4000 chip set is described in some detail. Major design challenges included CAD tools for simulation and verification, packaging and the control of power dissipation