Fabrication of NbN/AlN/NbN junctions with Al embedding circuits on Si membrane for 1.5 THz SIS mixers

A process has been developed to fabricate NbN tunnel junctions and 1.5 THz SIS mixers with Al electrodes and Al/SiO₂/Al microstrip tuning circuits on thin Si membranes patterned on silicon on insulator wafers (SIMOX). High Josephson current density (J_c up to 2×10⁴ A/cm²) NbN/AlN/NbN and NbN/MgO/NbN SIS junctions have been fabricated with a reasonably good V_m quality factor and energy gap values close to 5 meV at 4.2 K on (100) oriented 3 inches SIMOX wafers covered by a thin (∼8 nm) MgO buffer layer. The sputtering conditions critically influence the dielectric quality of both AlN and MgO tunnel barriers as well as the surface losses of NbN electrodes. 0.6-μm Si/SiO₂ membranes are obtained after processing of a whole wafer and etching the individual chips in EDP. Such a technology is applied to the development of a waveguide/membrane SIS mixer for use around 1.5 THz.     

Overdamped NbCxN1−x Josephson junctions with sputter-deposited TiNx layers or MgO/TiNx bilayers as barriers

Overdamped NbC_xN_1−x Josephson junctions have been fabricated using either sputter-deposited TiN_x layers or MgO/TiN_x bilayers as barriers. NbC_xN_1−x/TiN_x/NbC_xN_1−x junctions with different TiN_x thicknesses and resistivities show no hysteresis and yield low I_cR_N values. To improve the I_cR_N values of NbC_xN_1−x/TiN_x/NbC_xN_1−x junctions, we have replaced the TiN_x layers with MgO/TiN_x bilayers and fabricated NbC_xN_1−x/MgO/TiN_x/NbC_xN_1−x SINS Josephson junctions. The I_cR_N values estimated from the current–voltage (I–V) characteristics of the SINS junctions vary between 30 and 375 μV at 4.2 K. By adequately adjusting the thicknesses of the MgO and TiN_x layers, we have obtained overdamped SINS junctions with I_cR_N values as high as 160 μV, much higher than that of a typical as-fabricated SNS junction. Our experimental results show that the optimum thickness of the TiN_x barrier should be about 50 nm to ensure the overdamped I–V characteristics.     

The influence of junction depth on short channel effects in vertical sidewall MOSFETs

This work addresses a fundamental problem of vertical MOSFETs, that is, inherently deep junctions that exacerbate short channel effects (SCEs). Due to the unconventional asymmetric junction depths in vertical MOSFETs, it is necessary to look separately at the electrostatic influence of each junction. In order to suppress short channel effects better, we explore the formation of a shallow drain junction. This is realized by a self-aligned oxide region, or junction stop (JS) which is formed at the pillar top and acts as a diffusion barrier for shallow junction formation. The benefits of using a JS structure in vertical MOSFETs are demonstrated by simulations which show clearly the effect of asymmetric junctions on SCEs and bulk punch-through. A critical point is identified, where control of SCEs by junction depth is lost and this leads to appropriate junction design in JS vertical sidewall MOSFETs. For a 70 nm channel length the JS structure improves charge sharing by 54 mV and DIBL by 46 mV. For body dopings of 5.0 × 10¹⁷ cm^?3 and 6.0 × 10¹⁷ cm^?3 the JS gives improvements in I_off of 58.7% and 37.8%, respectively, for a given I_on. The inclusion of a retrograde channel gives a further increase in I_on of 586 μA/μm for a body doping of 4.0 × 10¹⁸ cm^?3.     

Large Shapiro steps and wide junction behaviour in HTS Josephson junctions at nitrogen temperatures

We have fabricated bicrystal high-T_c superconductor (HTS) Josephson junctions which, under microwave radiation, exhibited first current steps (1. Shapiro steps) with an amplitude of 1 mA at 80 K. This was possible because of a considerable increase of the critical current I_c of the junctions by increasing the HTS film thickness up to 700 nm. However, above a certain I_c threshold, the junction behaviour deviated from the simple resistively shunted junction (RSJ) model. We show that the junctions can be described by the wide junction model. Both the static (dependence of I_c on magnetic field) and the dynamic characteristics (response to microwave radiation) of our junctions can be well fitted in the frame of the wide junction model. We present data of junctions with relative widths w/λ_j=5 and 7 (w-physical width of the junction, λ_j-Josephson penetration depth), i.e. with w/λ_j lying in the intermediate interval where the behavior of the junctions is most sensitive to changes in w/λ_j. This allowed us to fit experimental data with relatively good accuracy. We discuss the consequences of wide junction behavior on the maximal first Shapiro step and the impact on metrological applications of HTS Josephson junctions.     

Superconductor/semiconductor step junctions: the basic element for hybrid three terminal devices

We present experimental data on superconductor/semiconductor hybrid systems which are based on the two-dimensional electron gas at the surface of p-type InAs. A short distance (≈200 nm) between the Nb contacts is obtained using step geometry. The best junctions show a high product of critical current times normal resistance of about 1 mV at T=4.2 K.     

Electromigration study of SNS ramp edge Josephson junctions

We report on the effects of electromigration of basal plane oxygen vacancies on SNS ramp edge Josephson junctions where the N-layer is YBa₂Cu_2.79Co_0.21O_7−δ, a doped version of the YBCO electrodes. Through the application of a 4–10 mA (∼2–5 MA/cm²) current bias at room temperature, the basal plane oxygen order and content in the N and S layers were improved. This is demonstrated by an increase in I_cR_n from <5 μV, to as much as 205 μV. The implications of these results on SNS junction fabrication, and the nature of tunneling in such devices are discussed.     

Determination of contact parameters of Ni/n-GaP Schottky contacts

The electrical analysis of Ni/n-GaP structure has been investigated by means of current–voltage (I–V), capacitance–voltage (C–V) and capacitance–frequency (C–f) measurements in the temperature range of 120–320 K in dark conditions. The forward bias I–V characteristics have been analyzed on the basis of standard thermionic emission (TE) theory and the characteristic parameters of the Schottky contacts (SCs) such as Schottky barrier height (SBH), ideality factor (n) and series resistance (R_s) have been determined from the I–V measurements. The experimental values of SBH and n for the device ranged from 1.01 eV and 1.27 (at 320 K) to 0.38 eV and 5.93 (at 120 K) for Ni/n-GaP diode, respectively. The interface states in the semiconductor bandgap and their relaxation time have been determined from the C–f characteristics. The interface state density N_ss has ranged from 2.08 × 10¹⁵ (eV^?1 m^?2) at 120 K to 2.7 × 10¹⁵ (eV^?1 m^?2) at 320 K. C_ss has increased with increasing temperature. The relaxation time has ranged from 4.7 × 10^?7 s at 120 K to 5.15 × 10^?7 s at 320 K.     

Electric-pulse-controlled Schottky-like/Ohmic contact for Ag/Nb-doped SrTiO3 junctions

Applying conductive silver paint to the surface of a 0.1 wt% Nb-doped SrTiO3 (STON) substrate resulted in an Ag/STON junction device. By applying electric current pulses to the junction, multiple resistance states ranging from high resistance (R≈75 kΩ) to low resistance (R≈2 kΩ) were observed. By alternating the electric pulses, the Ag/STON junctions oscillated between the two resistance states, which has potential applications in memory devices. Current–voltage (I–V) measurements were performed to study the interface between the Ag and STON substrate. The interface characteristics were dependent on the resistance state and could be easily controlled by the electric pulse. When the high-resistance state transitioned to the low-resistance state, a change from a Schottky-like to Ohmic contact was detected. These electric-pulse-induced variations in the I–V relationship may be interesting for applications such as multi-channel I–V transformers.     

The effects of surface states and series resistance on the performance of Au/SnO2/n-Si and Al/SnO2/p-Si (MIS) Schottky barrier diodes

We have fabricated two types of Schottky barrier(SBDs),Au/SnO₂/n-Si (MIS1) and Al/SnO₂/p-Si (MIS2), to investigate the surface (N_ss) and series resistance (R_s) effect on main electrical parameters such as zero-bias barrier height (Φ_Bo) and ideality factor (n) for these SBDs. The forward and reverse bias current–voltage (I–V) characteristics of them were measured at 200 and 295 K, and experimental results were compared with each other. At temperatures of 200 and 295 K, Φ_Bo, n, N_ss and R_s for MIS1 Schottky diodes (SDs) ranged from 0.393 to 0.585 eV, 5.70 to 4.75, 5.42×10¹³ to 4.27×10¹³ eV^?1 cm^?2 and 514 to 388 Ω, respectively, whereas for MIS2 they ranged from 0.377 to 0.556 eV, 3.58 to 2.1, 1.25×10¹⁴ to 3.30×10¹⁴ eV^?1 cm^?2 and 312 to 290 Ω, respectively. The values of n for two types of SBDs are rather than unity and this behavior has been attributed to the particular distribution of N_ss and interfacial insulator layer at the metal/semiconductor interface. In addition, the temperature dependence energy density distribution profiles of N_ss for both MIS1 and MIS2 SBDs were obtained from the forward bias I–V characteristics by taking into account the bias dependence of effective barrier height (Φ_e) and R_s. Experimental results show that both N_ss and R_s values should be taken into account in the forward bias I–V characteristics. It has been concluded that the p-type SBD (MIS2) shows a lower barrier height (BH), lower R_s, n and N_ss compared to n-type SBD (MIS1), which results in higher current at both 200 and 295 K.     

Experimental study on the influence of junction temperature on the relationship between IGBT switching energy loss and device current

Accurate determination of power losses in semiconductor devices is important for optimal design and reliable operation of a power converter. The switching loss is an important component of the total device loss in an insulated-gate bipolar transistor (IGBT) in a voltage source inverter. The objective here is to study experimentally the influence of junction temperature on the turn-on switching energy loss E_on and turn-off switching energy loss E_off. More specifically E_on and E_off are both related to device current I_c; the influence of junction temperature on the relationship between E_on and I_c and that between E_off and I_c is studied. As the operating environmental conditions and load conditions of power converter vary widely, a wide range of junction temperatures between − 35 °C and + 125 °C is considered here. The experimental data enable precise determination of the switching loss in each device in a high-power converter at any practical operating condition. This leads to precise estimation of total device loss and optimal thermal design of the converter. This further helps off-line and/or on-line estimation of device junction temperatures required for study of thermal cycles and reliability.     

Biaxially aligned YBCO film tapes fabricated by all pulsed laser deposition

Biaxially aligned yttria-stabilized zirconia (YSZ) films on Ni-based alloy substrates were realized with high deposition rate of 0.5 μm min⁻¹ by the inclined substrate deposition (ISD) technique without ion beam assistance. The microstructure of YSZ was examined to study the growth mechanism of biaxial alignment by ISD. Columnar structures toward the plasma plume suggested a self-shadowing effect in the ISD process. To raise I_c values, YBCO thickness was increased up to 5 μm. Thick YBCO films with high J_c values were realized on the ISD-grown YSZ. Long YBCO tapes with biaxial alignment were successfully fabricated using continuous pulsed laser deposition and a high I_c value of 37.0 A (77.3 K, 0 T) at a 75 cm voltage tap spacing was achieved.     

Evaluation of lateral barrier height of inhomogeneous photolithography-fabricated Au/n-GaAs Schottky barrier diodes from 80 K to 320 K

In order to evaluate current conduction mechanism in the Au/n-GaAs Schottky barrier diode (SBD) some electrical parameters such as the zero-bias barrier height (BH) Φ_bo(I–V) and ideality factor (n) were obtained from the forward bias current–voltage (I–V) characteristics in wide temperature range of 80–320 K by steps of 10 K. By using the thermionic emission (TE) theory, the Φ_bo(I–V) and n were found to depend strongly on temperature, and the n decreases with increasing temperature while the Φ_bo(I–V) increases. The values of Φ_bo and n ranged from 0.600 eV and 1.51(80 K) to 0.816 eV and 1.087 (320 K), respectively. Such behavior of Φ_bo and n is attributed to Schottky barrier inhomogeneities by assuming a Gaussian distribution (GD) of BHs at Au/n-GaAs interface. In the calculations, the electrical parameters of the experimental forward bias I–V characteristics of the Au/n-GaAs SBD with the homogeneity in the 80–320 K range have been explained by means of the TE, considering GD of BH with linear bias dependence.     

Region-dependent behavior of I–V characteristics in n-ZnO:Al/p-Si contacts

The discrepancy of rectifying characteristics in n-ZnO:Al/p-Si heterojunctions from diode to diode was demonstrated by region dependent dark I–V characteristics, where the junction is laterally cut to sequentially decrease the area. Further investigation shows that the junction (2.1×2.1 cm²) with the barrier height Φ=0.693 eV consists of one part (2.1×1.4 cm²) with Φ=0.695 eV and the other part (2.1×0.7 cm²) with Φ=0.686 eV. It is found that reverse currents saturate with different values of 3.6×10^?3, 2.5×10^?3 and 1.58×10^?3 A for the light I–V curves of the three junctions with the same areas. To explain this peculiarity, the probable reason is discussed in terms of carrier transportation through the spatially fluctuating barrier.     

Characterization of AZO/p-Si heterojunction prepared by DC magnetron sputtering

Al-doped ZnO (AZO) film was deposited by direct-current (DC) magnetron sputtering on p-Si (1 0 0) wafer to fabricate Al-doped n-ZnO/p-Si heterojunctions. The microstructural, optical and electrical properties of the AZO film were characterized by XRD, SEM; UV–vis spectrophotometer; four-point probe and Hall effect measurement, respectively. Results show that the AZO film is of good quality. The electrical junction properties were investigated by I–V measurement, which reveals that the heterojunction shows rectifying behavior under a dark condition. The ideality factor and the saturation current of this diode are 20.1 and 1.19×10⁻⁴ A, respectively. The value of I_F/I_R (I_F and I_R stand for forward and reverse current, respectively) at 5 V is found to be as high as 19.7. It shows fairly good rectifying behavior, indicating formation of a diode between AZO and p-Si. High photocurrent is obtained under a reverse bias when the crystalline quality of AZO film is good enough to transmit light into p-Si.     

Influence of film growth conditions on the transport properties of YBa2Cu3O7−δ step-edge junctions

In order to investigate the influence of film growth conditions on the transport properties of step-edge junctions, YBa₂Cu₃O_7−δ films were deposited on high-quality substrate steps by DC-sputtering at two different substrate temperatures and by off-axis laser ablation. RSJ-like junction properties and a low (1σ)-spread of the critical current density J_c (4.2 K) of 17% along one step were obtained for laserablated junctions. The transport properties of the differently prepared junctions correlated with the microstructure of the step region. This, in turn, might result from the large differences in surface diffusion during film growth.     

Noise and mixing properties of high-Tc Josephson junctions at W-band frequencies

We report on the noise and Josephson mixing properties of high-T_c superconductor (HTS) Josephson junctions. Direct radiation measurements and heterodyne mixing experiments in the frequency range 45–141 GHz have been performed by using YBa₂Cu₃O_7−x (YBCO) step-edge junctions (SEJ) on LaAlO₃ and MgO and bicrystal junctions (BCJ) on MgO substrates. Junctions with current voltage characteristics (CVC) close to predictions of the resistivity shunted junction (RSJ) model were mounted into a high sensitive radiometer system. From linewidth measurements we calculated an effective noise temperature of our junctions. In heterodyne mixing experiments we obtained conversion efficiencies around −14 dB in the 11 GHz intermediate frequency (IF) band under the radiation of two monochromatic signals. In the fundamental mixing regime we observed response at IF at working temperatures up to 72 K. The measured receiver and mixer noise temperature of the Josephson mixer at 94 GHz local oscillator (LO) frequency, an IF of 1.4 GHz and at a working temperature of 10 K was 4700 and 3400 K, respectively.     

Characteristics of RF reactive sputter-deposited Pt/SiO2/n-InGaN MOS Schottky diodes

All RF sputtering-deposited Pt/SiO₂/n-type indium gallium nitride (n-InGaN) metal–oxide–semiconductor (MOS) diodes were investigated before and after annealing at 400 °C. By scanning electron microscopy (SEM), the thickness of Pt, SiO_2, n-InGaN layer was measured to be ~250, 70, and 800 nm, respectively. AFM results also show that the grains become a little bigger after annealing, the surface topography of the as-deposited film was smoother with the rms roughness of 1.67 nm and had the slight increase of 1.92 nm for annealed sample. Electrical properties of MOS diodes have been determined by using the current–voltage (I–V) and capacitance–voltage (C–V) measurements. The results showed that Schottky barrier height (SBH) increased slightly to 0.69 eV (I–V) and 0.82 eV (C–V) after annealing at 400 °C for 15 min in N₂ ambient, compared to that of 0.67 eV (I–V) and 0.79 eV (C–V) for the as-deposited sample. There was the considerable improvement in the leakage current, dropped from 6.5×10⁻⁷ A for the as-deposited to 1.4×10⁻⁷ A for the 400 °C-annealed one. The annealed MOS Schottky diode had shown the higher SBH, lower leakage current, smaller ideality factor (n), and denser microstructure. In addition to the SBH, n, and series resistance (R_s) determined by Cheungs׳ and Norde methods, other parameters for MOS diodes tested at room temperature were also calculated by C–V measurement.     

Low noise submillimeter SIS receiver with niobium nitride quasiparticle tunnel junctions

We have developed and tested a submillimeter waveguide SIS mixer with NbN-MgO-NbN quasiparticle tunnel junctions. The two junction array is integrated in a full NbN printed circuit. The NbN film critical temperature is 15 K and the junction gap voltage is 5 mV. The size of the junctions is 1.4 × 1.4 µm and Josephson critical current density is about 1.5 KA/cm² resulting in junction R_NωC product about 40. The inductive tuning circuit in NbN is integrated with each junction in two junction array. A single non contacting backshort was tuned at each frequency in the mixer block. At 306 GHz the minimum DSB receiver noise temperature is as low as 230 K. The sources of the receiver noise and of the limits of the NbN SIS submillimeter mixer improvement are discussed.     

Capacitance–conductance–current–voltage characteristics of atomic layer deposited Au/Ti/Al2O3/n-GaAs MIS structures

We have studied the admittance and current–voltage characteristics of the Au/Ti/Al₂O₃/n-GaAs structure. The Al₂O₃ layer of about 5 nm was formed on the n-GaAs by atomic layer deposition. The barrier height (BH) and ideality factor values of 1.18 eV and 2.45 were obtained from the forward-bias ln I vs V plot at 300 K. The BH value of 1.18 eV is larger than the values reported for conventional Ti/n-GaAs or Au/Ti/n-GaAs diodes. The barrier modification is very important in metal semiconductor devices. The use of an increased barrier diode as the gate can provide an adequate barrier height for FET operation while the decreased barrier diodes also show promise as small signal zero-bias rectifiers and microwave. The experimental capacitance and conductance characteristics were corrected by taking into account the device series resistance R_s. It has been seen that the non-correction characteristics cause a serious error in the extraction of the interfacial properties. Furthermore, the device behaved more capacitive at the reverse bias voltage range rather than the forward bias voltage range because the phase angle in the reverse bias has remained unchanged as 90° independent of the measurement frequency.