低银无铅焊膏板级封装工艺和焊点可靠性试验

针对低Ag无铅焊膏的市场需求,研究开发了一种适用于99.0Sn0.3Ag0.7Cu低Ag无铅焊膏用松香型无卤素助焊剂(WTO—LF3000),配制了相应的无铅焊膏(WTO—LF3000—SAC0307),并对其板级封装工艺适应性及焊点可靠性进行了考察,用测试后样品的电气可靠性作为接头可靠性评价条件。结果表明:所开发的低Ag无铅焊膏熔点和润湿性符合产品实际要求。配制的焊膏印刷质量良好,焊点切片观察其孔隙率<25%,满足行业标准IPC—A—610D之要求。样品分别经跌落、震动和温度循环试验后,无焊点脱落等现象,电气功能正常。     

电子元件焊点检测技术

焊点在电子产品中具有重要的作用,焊点质量的好坏紧密关系到产品的使用性能和可靠性,而电子元件焊点检测则是保证电子产品出厂质量的关键环节,电子元件焊点检测技术是保障电子产品质量与可靠性的关键技术。针对电子元件焊点检测技术,本文探讨了传统检测方法的缺点和局限陛,介绍了现代检测技术——自动光学检测和自动x射线检测技术,深入分析了自动光学检测和自动x射线检测中的关键技术——图像处理,详细阐述了用于检测的图像预处理和缺陷检测技术。     

Enhanced solder joint bonding strength of electronic packaging with electrowetting effect

This paper reports a novel method to enhance solder ball or solder ring bonding strength by using electrowetting-on-dielectric (EWOD) effect. With a low melting point, the metal Sn has been widely used in electronic packaging technology. Since Sn will be molten into liquid when the temperature is increased above the melting point, the method for treating liquid can be herein employed. Contact angle of the molten Pb-free balls or ring structure on silicon substrate have been experimentally changed by applying electric field across the thin dielectric film between the molten solder and the conductive silicon substrate. The contact area between the solder and the substrate is enlarged due to the decrease of the contact angle. Our testing results on the EWOD enhanced packaging structures of solder balls, flip-chip and solder ring hermetic package generally show about 50% enhancement in bonding shear strength. The significantly enhanced solder link bonding strength is hopeful for improving packaging reliability and is promising to be used in high performance silicon based electronic or microelectromechanic SiP (system in package) technologies.     

Investigation on flip chip solder joint fatigue with cure-dependent underfill properties

A cure-dependent viscoelastic constitutive relation is applied to describe the curing process of epoxy underfill in flip chip on board (FCOB). The chemical shrinkage of the epoxy underfill during the curing process is applied via incremental initial strains. Thus, the stress and strain build-up, caused by the simultaneous increase in stiffness and shrinkage during the curing process, are simulated. Accelerated fatigue experiments with thermal cycles from -55/spl deg/C to 80/spl deg/C are carried out for a specially designed flip chip configuration. Based on the obtained curing induced initial stress and strain fields, thermo-mechanical predictions are presented for the test carriers. The solder bumps are modeled with temperature dependent visco-plastic properties. A combination of a Coffin-Manson based fatigue relation and a creep fatigue model is used as fatigue failure criterion. The results show that the finite element method (FEM)-based fatigue life predictions match better with the experimental results, if the curing induced initial stress state is taken into account. The effect of cure-induced hydrostatic stress is qualitatively investigated by using a modified energy partitioning damage model with a correction factor in the creep damage formulation to take into account the effect of the hydrostatic stress.     

Damage predictions in a chip resistor solder joint on flexible circuit board

Flexible circuit boards are being widely used in the electronic packages. Solders are often used to assemble chip resistors and other components on them. In practice, solder alloys work in high homologous temperatures and experience cyclic temperature loadings. As a result, damage may accumulate in solder materials quickly and this will eventually lead to the failure of the solder joints. In this work, computer modelling technique has been used to predict such damage accumulations in chip resistor solder joints under a range of thermal cycling conditions. It has been documented that the higher and the lower dwell temperatures of a thermal cycle dominate the damages in solder joints. Both the ramp time and the cycle duration have strong influence on the damage accumulation. In general, faster ramp time and longer cycle duration cause more damages. The types of materials used to produce flexible circuit board have also significant impact on the damage accumulation. Polyimide (PI), Polyethylene Naphthalate (PEN) and Liquid Crystal Polymer (LCP) based flexible circuit boards have been compared for their effect on damage in solder joints and the results show that the highest damage could be found in the chip resistor solder joint on the PI-based flexible circuit boards and least damage could be found for the LCP based flexible circuit boards. The results also show that the thicknesses of the constituent layers of different materials in flexible circuit boards are linearly proportional to the damage accumulation in solder joints.     

Interfacial reaction study on a solder joint with Sn-4Ag-0.5Cu solder ball and Sn-7Zn-Al (30 ppm) solder paste in a lead-free wafer level chip scale package

The interfacial reactions of solder joints between the Sn-4Ag-0.5Cu solder ball and the Sn-7Zn-Al (30 ppm) presoldered paste were investigated in a wafer level chip scale package (WLCSP). After appropriate surface mount technology (SMT) reflow process on the printed circuit board (PCB) with organic solderability preservative (Cu/OSP) and Cu/Ni/Au surface finish, samples were subjected to 150°C high-temperature storage (HTS), 1,000 h aging. Sequentially, the cross-sectional analysis is scrutinized using a scanning electron microscope (SEM)/energy-dispersive spectrometer (EDS) and energy probe microanalysis (EPMA) to observe the metallurgical evolution in the interface and solder buck itself. It was found that Zn-enriched intermetallic compounds (IMCs) without Sn were formed and migrated from the presolder paste region into the solder after reflow and 150°C HTS test.     

Solder joint reliability of TFBGA assemblies with fresh and reworked solder balls

In this article, the solder joint reliability of thin and fine-pitch BGA (TFBGA) with fresh and reworked solder balls is investigated. Both package and board level reliability tests are conducted to compare the solder joint performance of test vehicle with fresh and reworked solder balls. For package level reliability test, ball shear test is performed to evaluate the joint strength of fresh and reworked solder balls. The results show that solder balls with rework process exhibit higher shear strength than the ones without any rework process. The results also exhibit that the different intermetallic compound (IMC) formation at solder joints of fresh and reworked solder balls is the key to degradation of shear strength. For board level reliability tests, temperature cycling and bending cyclic tests are both applied to investigate the fatigue life of solder joint with fresh and reworked solder balls. It is observed that package with reworked solder ball has better fatigue life than the one with fresh solder ball after temperature cyclic test. As for bending cyclic test, in addition to test on as-assembled packages, reworked and fresh samples are subjected to heat treatment at 150 °C for 100 h prior to the bending cyclic test. The purpose is to let Au–Ni–Sn IMC resettle at solder joints of fresh solder ball and examine the influence of Au–Ni–Sn IMC on the fatigue life of solder joints (Au embrittlement effect). The final results confirm that reworked solder balls have better reliability performance than fresh one since Au embrittlement dose exist at fresh solder ball.     

Defects pattern recognition for flip-chip solder joint quality inspection with laser ultrasound and Interferometer

A defects pattern recognition system has been developed for the flip-chip solder joint quality inspection by using laser ultrasound and interferometric techniques. This system extracts error ratio and dominant frequency as features from ultrasound waveforms. It also performs a cluster analysis of those feature vectors by applying probabilistic neural network classification algorithm. The system can automatically classify chips into different clusters and can, therefore, find differences between good and bad chips, as well as classifying the type of defect.     

Towards a methodology for user experience assessment of serious games with children with cochlear implants

Information technology is transforming different areas, such as rehabilitation, in such a way that serious games are finding a use as an alternative in hearing therapies for children with cochlear implants, creating a motivating experience in children. As a result, the design of products oriented to children depends on the skills they have to interact, because if they have a better user experience they may have a better learning experience. Most existing methods of assessment are aimed at adults, although some have been adapted for children with special needs, including children with cochlear implants. This article presents a methodology for User Experience Assessment (UXA), that provides support for following the necessary guidelines and choosing techniques adapted to the characteristics of the child with cochlear implant. The methodology has been applied in a case study with 23 children with cochlear implants in the Institute for Blind and Deaf Children in Colombia, where different methods have been used and adapted to assess the user experience.     

Thermal cycling aging effects on microstructural and mechanicalproperties of a single PBGA solder joint specimen

This paper reports on an experimental study on how thermal cycling aging exposure changes the solder joint microstructure, intermetallic layer thickness and the residual shear strength and fatigue life in a single plastic ball grid array (PBGA) solder joint specimen. The single BGA solder joint specimen was specially designed to evaluate the microstructure and mechanical properties of three different batches of solder joint after subjected to 0, 500, 1000, and 2000 cycles of thermal cycling aging (-40°C to 125°C). It is important to relate the effects of thermal cycling aging on the changes of the microstructural and intermetallic layer thickness to the residual shear strength and fatigue life of solder joints subjected to thermal cycling aging exposure. The results of this study shows that the microstructural and intermetallic development due to thermal cycling aging has a major impact on the residual mechanical and fatigue strength of the solder joint. It was noted that the solder joint shear strength and residual fatigue life degrades with exposure to thermal cycling aging     

柔性凸点热-结构耦合应力应变有限元分析

建立了芯片尺寸封装焊点的柔性凸点三维有限元分析(FEA)模型,对该模型进行了热-结构耦合有限元分析,研究了热-结构耦合条件下柔性凸点温度场和应力应变的分布规律,对比了有无柔性层结构的凸点内应力应变的大小,分析了柔性层厚度、上下焊盘直径对柔性凸点应力应变的影响。结果表明:柔性层结构有效降低了凸点内的应力应变;随着柔性层厚度的增加,凸点内最大应力应变减小;随上焊盘和下焊盘直径的增加,凸点内最大应力应变的变化无明显规律。     

Microstructure and reliability of hybrid interconnects by Au stud bump with Sn-0.7Cu solder for flip chip power device packaging

With miniaturization of the interconnect solder bumps, high current density causes serious reliability issues (stress, electromigration etc.) in electronic packages. Through Au stud bumping on the chips and following reflow of solder to produce hybrid interconnects, the eletromigration resistance may be improved by the intermetallics formed inside them due to their barrier effects on the atoms migration. Here, microstructures and reliabilities of Au stud with serial amounts of Sn-0.7Cu solder paste were studied through controlling size of stencil printing aperture. After reflow, AuSn, AuSn₂ and AuSn₄ formed from the surface of Au stud bump to the solder. A layer of (Cu,Au)₆Sn₅ with thickness of 3 μm existed at the interface near the Cu substrate with a scallop shape similar to Cu₆Sn₅. The fraction of intermetallics to the mixed joints varied with the solder amount. Shear strength decreased slightly when comparing with the sole solder joint due to large amounts of brittle intermetallics. Thermal aging resulted in many Kirkendall voids generated at the interfaces of Au stud and the solder, which further decreased the shear strength. The effect of solder amount on microstructural evolution and fracture modes was discussed. The hybrid interconnects showed a good electromigration resistance.     

Comparative studies on solder joint reliability of CTBGA assemblies with various adhesives using the array-based package shear test

This paper discusses the influences of various adhesives on board-level shear strength of ChipArray® Thin Core Ball Grid Array (CTBGA) assemblies through an innovative reliability evaluation approach, i.e. array-based package (ABP) shear test. It is found that the adhesives do enhance the shear strength for all the test categories as compared with the assemblies without adhesives (w/o A), but the degree of improvements between different strategies vary quiet a lot. The specific shear strength is affected by a number of factors, in which dispending patterns and material properties of the adhesives used influences it obviously. In general, the adhesives with high storage modulus and large dispensing volume are preferred, for example, stiff full or partial capillary flow underfills. In order to further understand the failure mechanism of the CTBGA during the ABP shear test, failure analysis on tested devices are also conducted using side view optical microscopy, scanning electron microscope (SEM) and energy dispersive X-ray (EDX), the results indicate that the predominant failure mode changes from PCB pad lift/cratering to fracture at package side intermetallic compound (IMC)/solder interface with increasing dispensing volume and storage modulus, which basically improves the solder joint reliability of CTBGA assemblies.     

Board level solder joint reliability analysis of a fine pitch Cu post type wafer level package (WLP)

Wafer level packaging (WLP) has many advantages, such as ease of fabrication and reduced fabrication cost. However, solder joint reliability of traditional WLPs is the weakest point of the technology. In this paper, a 0.4 mm pitch Cu post type WLP has been developed for mobile computing application. The Cu post type WLP has 440 I/Os and 12 × 12 mm die size. The initial design WLP has been fabricated and subjected to a thermal cycling (TC) testing. The failure life of the original WLP under TC was 296 cycles. This paper also presents a nonlinear finite element analysis of the board level solder joint reliability and methods for enhancement of the WLP. A viscoplastic constitutive relation is adopted for the solder joints to account for its time and temperature dependence in TC. The fatigue life of the solder joint is estimated by the modified Coffin–Manson equation. The two coefficients in the modified Coffin–Manson equation are also determined. A series of parametric studies are performed by changing the passivation (PI) thickness, redistribution layer (RDL) thickness, polymer height (Cu post height accordingly varies), die thickness, PCB thickness, and PCB CTE. The results obtained from the modeling are useful to formulate design guidelines for board level reliability enhancement of the WLP.     

The experimental study for the solder joint reliability of high I/O FCBGAs with thermal loaded bend test

In this study, the reliability of flip-chip ball-grid array package (FCBGA) is explored by a cyclic four-point bend test executed at different controlled temperature. The test vehicle is put in a heated chamber and the resulting daisy chain resistance and strains variations are monitored to check its failure. The strain gauges are mounted near the component corners to get the strains of the test boards when under bending. A data logger records the daisy chain resistance simultaneously during the test. The component failure is detected with a self-written program by judging when the failure resistance of the daisy chain is larger than 20% of its initial resistance. The test results at various temperatures showed that the component life cycle is reduced with the increase of the temperature during the cyclic bend test when under a fixed maximum deflection setting. If tested at room temperature by varying the maximum deflections, the component life cycle is also reduced with the increase of the maximum deflection in the cyclic bend test. Through the fitted curve of all these test data, it is then possible to get relating equations among the variables of temperature, deflection, and life cycle. An extra test is conducted to verify these deduced equations with an error of only 6% approximately. Furthermore, the optic microscope is utilized to observe the failure mode of the FCBGA component after the test. It is found that all the failures are the delamination at the interface of solder balls and substrate. Also, from the results of tested curves, it can be used to predict the component life cycle at elevated temperatures based on the results tested at room temperature.     

The creep and strain rate sensitivity of a high Pb content solder with comparisons to 60Sn/40Pb solder

Creep plays an important role in the mechanical behavior of solder alloys. This paper presents creep and strain rate sensitivity data for a Pb rich solder (92.5Pb, 2.5Ag, 5Sn-Indalloy 151) and compares it to the behavior of near eutectic 60Sn/40Pb solder. The high Pb alloy is used for exposures to higher temperatures than can be withstood by eutectic Sn/Pb solders. The Pb rich solder tested here is less strain rate sensitive than 60Sn/40Pb. There are also differences in the creep behavior.     

Finite element analysis of the effect of process-induced voids on the fatigue lifetime of a lead-free solder joint under thermal cycling

Process-induced voids remain one of the key concerns in thermo-mechanical reliability of solder alloys. Previous studies reported that the void effect on fatigue failure reliability of solder joints depends on the void configuration and some other specific characteristics of the electronic package. This paper investigates the void effect on the solder material layers used in power modules subjected to thermal passive cycles. The Anand's visco-plastic model of the solder alloy is identified based on experimental data obtained with a micro-tester. The constitutive model is then used in a finite element analysis to study the behaviour of Innolot Pb-free solder joint used in an electronic assembly. An algorithm called Monte Carlo Representative Volume Element Generator is used to generate, based on the statistical probability law for the diameters, the 2D disk distribution of the voids (thereafter extruded in the form of cylinders) within the solder layer. The dissipated plastic energy is considered as a damage variable indicator representing the void effect on the fatigue lifetime of the solder. Results suggest that the fatigue reliability of solder joints depends not only on the size, location and ratio of the voids but also on their statistical distribution. The critical sites for damage are located at the corners of the joint, as well as at the border of voids. Fatigue lifetime of the solder joint decreases as the volume fraction of voids increases. Moreover, voids near the critical sites facilitate initiation of damage significantly. On the contrary, the solder joint behaviour is almost not affected by voids located far from the critical sites.     

Performance assessment of feature detection algorithms: a methodology and case study on corner detectors

We describe a generic methodology for evaluating the labeling performance of feature detectors. We describe a method for generating a test set and apply the methodology to the performance assessment of the three well-known corner detectors of L. Kitchen and A. Rosenfeld (1982), of K. Paler et al. (1984), and of C. Harris and M. Stephens (1988). The labeling deficiencies of each of these detectors is related to their discrimination ability between corners and various of the features which comprise the class of noncorners.     

SiC power devices packaging with a short-circuit failure mode capability

The failure mode of press-pack-type packages dedicated to SiC devices is experimentally analyzed in order to investigate their use for HVDC applications. Single SiC Schottky diode samples have been submitted to short-circuit conditions and continuous current flow test. The samples have been then characterized with optical and scanning electronic microscopy. Results from the experiments reveal that the press-pack structure offers a short-circuit failure mode with SiC devices, as it does for Si devices. The metallurgy involved is, however, quite different. Cu, Ni, Ag or Al foils are found to be suitable interface material between the package and the die to achieve a stable a short-circuit failure mode, providing the die is properly attached to a substrate.     

Metallurgical reaction of the Sn-3.5Ag solder and Sn-37Pb solder with Ni/Cu under-bump metallization in a flip-chip package

Several international legislations recently banned the use of Pb because of environmental concerns. The eutectic Sn-Ag solder is one of the promising candidates to replace the conventional Sn-Pb solder primarily because of its excellent mechanical properties. In this study, interfacial reaction of the eutectic Sn-Ag and Sn-Pb solders with Ni/Cu under-bump metallization (UBM) was investigated with a joint assembly of solder/Ni/Cu/Ti/Si₃N₄/Si multilayer structures. After reflows, only one (Ni,Cu)₃Sn₄ intermetallic compound (IMC) with faceted and particlelike grain feature was found between the solder and Ni. The thickness and grain size of the IMC increased with reflow times. Another (Cu,Ni)₆Sn₅ IMC with a rod-type grain formed on (Ni,Cu)₃Sn₄ in the interface between the Sn-Pb solder and the Ni/Cu UBM after more than three reflow times. The thickness of the (Ni,Cu)₃Sn₄ layer formed in the Sn-Pb system remained almost identical despite the numbers of reflow; however, the amounts of (Cu,Ni)₆Sn₅ IMC increased with reflow times. Correlations between the IMC morphologies, Cu diffusion behavior, and IMC transformation in these two solder systems will be investigated with respect to the microstructural evolution between the solders and the Ni/Cu UBM. The morphologies and grain-size distributions of the (Ni,Cu)₃Sn₄ IMC formed in the initial stage of reflow are crucial for the subsequent phase transformation of the other IMC.