基于全通型分数时延滤波器的数字阵列宽带波束形成

对于宽带数字阵列雷达,由于孔径效应和孔径渡越时间影响,传统的窄带波束形成方法会导致天线波束指向不准和主瓣展宽,为此需要使用时延补偿单元取代传统窄带相控阵中的移相单元。为实现宽带数字阵列各阵元传输时延的精确补偿,可以引入分数时延滤波器。采用最小二乘法设计全通型分数时延滤波器,与群延迟最大平坦法相比较,该法灵活性更高,通过MATLAB仿真进一步验证了所设计滤波器的有效性和正确性。     

宽带波束形成中小数时延滤波器设计

以电子战中的宽带波束形成器设计为背景,阐述了数字延迟线与小数时延滤波器相结合的时域波束形成方案,并引入广泛应用于多速率系统中的Farrow结构可变时延滤波器。针对宽带Farrow结构滤波器中乘法器资源消耗量较大的问题,采用对称结构的子滤波器系数求解方法,最后通过多次仿真验证了设计的合理性并给出相关设计参数的一般取值,为后续工程上的实现奠定了理论基础。     

用于宽带接收的近似完全重构滤波器组的改进设计

本文提出了一种可用于宽带接收信号近似完全重构的余弦调制滤波器组。首先将滤波器组的设计转化为原型滤波器的设计,利用代价函数保证其通带平稳和阻带衰减,针对已有算法中幅度失真较大的问题,文中利用代价函数保证过渡带具有平方根余弦滚降特性,并且为了避免加强目标函数约束所带来的误差,对通带截止频率进行调整使得原型滤波器的3dB通带截止频率等于理想滤波器的通带截止频率。文中还推导了以滤波器系数为变量,代价函数的闭合解表达式,并针对滤波器设计复杂度高的问题,采用了基于迭代求解原型滤波器的方法。实验仿真表明,该方法得到的调制滤波器组较已有设计方法具有更好的性能。      

70MHz时延均衡器CAD

卫星地面站设备之一——70MHz 中频滤波器,除满足幅频特性技术指标外,因中频滤波器本身具有较大时延特性,必需外加时延均衡器来均衡,以满足规定技术指标。本文介绍的是预先采用简易、直观的时延曲线样板法设计,初步得到时延均衡器参数作为初值,并将初值进一步用最优化理论——最小二乘法,由微型计算机选择时延均衡器最佳参数。最后,计算出均衡器元件值、各节时延曲线时间,按照时延曲线时间作为样板进行调测。例举带宽为17.5MHz 中频滤波器时延均衡器设计,列出本程序框图,采用 BASIC 语言和 TP803微型计算机,上机通过。一、时延曲线样板法设计(一)70MHz 中频滤波器时延曲线的要求先将中频滤波器在微波扫频仪上调测,满足了幅频特性技术指标外,在通带上、下两边频处具有较大时延峰,即具有高低两个时延峰。一般低频端时延峰稍大于高频端时延峰,要求通频带内时延曲线对70MHz     

基于遗传算法的FIR可变分数延迟滤波器设计

分数延迟滤波器广泛用于语音处理,回声消除,多速率信号处理等方面.文中设计的FIR可变分数延迟滤波器用于解决全数字接收机的时钟同步问题.首先用传统的加权最小平方误差方法设计出滤波器参数,然后通过遗传算法对参数进行优化并通过matlab仿真验证算法的有效性,仿真结果表明所设计的滤波器有很好的幅度特性和相位延迟特性.     

一种程控滤波器的设计

该系统以单片机为控制核心,结合双二阶环路滤波器的基本原理,使其同时具备低通、高通、带通、带阻滤波器的功能,利用DAC等效为可变电阻,实现了滤波器参数的程控。该系统可通过键盘设置滤波器的种类、截止频率和Q值,低通、高通滤波器截止频率以及带通、带阻滤波器中心．频率可预置范围为100Hz～50kHz,Q值范围为0．5～5。系统采用矩阵键盘和LCD液晶显示,人机交互界面友好。     

基于分数时延的宽带雷达长时间积累方法研究

宽带雷达有利于实现目标识别和分类,能够提高雷达的目标检测能力,可以精确测量目标的位置和运动参数,有效对抗各种有源和无源干扰,具有更好的低截获性能等优势。长时间积累可以延长雷达的作用距离,提高对低可探测性目标的检测能力。在积累过程中运动目标的回波会跨距离单元走动,从而影响相参积累的性能。根据目标的径向速度计算出不同脉冲间的包络走动距离对回波进行补偿,若目标回波真实延迟是采样周期的分数倍,则会产生补偿误差。为实现包络走动距离的精确补偿,通过对分数时延滤波器设计方法及长时间积累原理的分析,引入基于分数时延滤波器的时延方法,提出针对目标长时间积累的实现结构,并仿真证明该方法的有效性。     

一种程控滤波器的设计

该系统以单片机为控制核心,结合双二阶环路滤波器的基本原理,使其同时具备低通、高通、带通、带阻滤波器的功能,利用DAC等效为可变电阻,实现了滤波器参数的程控.该系统可通过键盘设置滤波器的种类、截止频率和Q值,低通、高通滤波器截止频率以及带通、带阻滤波器中心频率可预置范围为100 Hz～50 kHz,Q值范围为0.5～5.系统采用矩阵键盘和LCD液晶显示,人机交互界面友好.     

级联法实现宽带LC带通滤波器设计

利用高通、低通滤波器级联可以实现宽带带通滤波器,利用此方法设计了一个工作频段在100～400MHz的LC宽带带通滤波器。将所设计的截止频率为100MHz的高通滤波器HPF以及截止频率为400MHz的低通滤波器LPF级联实现滤波器的宽带化设计。通过分别对HPF和LPF设置带外陷波点使该带通滤波器具有较好的矩形系数、带外抑制效果。ADS仿真结果验证了理论设计的可行性,并通过优化使滤波器带宽达到4倍频程,带内平坦,输入、输出端口匹配良好,滤波器矩形系数达到1.2。     

通用电调谐双二阶电流模式滤波器

提出了一种利用可变电流增益双输出CCⅡ(DOCCⅡ)构成的状态完全可调谐的双二阶电流模式滤波器。滤波器的参数可以通过DOCCⅡ的可变电流增益因子独立调谐。基于一般双二阶滤波器的设计原则,给出了一种通用电调谐电流模式滤波器的设计方法,并推出了低通、高通、带通、带阻和全通二阶传输函数,给出了相应PSPICE仿真的频响结果。     

A simple and efficient design of variable fractional delay FIR filters

In this paper, a simple and efficient approach for designing one-dimensional variable fractional delay finite impulse response digital filters is proposed. Two matrix equations, based respectively on the weighted least-squares function of the optimum fixed fractional delay filter and the filter coefficient polynomial fitting, are formulated in tandem to form the design algorithm, which only has the computation complexity comparable with that of designing fixed finite impulse response digital filters. A design example is also given to justify the effectiveness and advantages of the proposed design method.     

Variable cut-off digital ladder filters

This paper presents a now class of transformations whose implementation to doubly terminated LC ladder filters results in variable cut-off frequency digital filters. It is shown that using this transformation and the concept of generalized delay, from a given prototype ladder structure, we can construct low-pass, high-pass, band-pass and band-stop filters with variable cut-off frequency and bandwidth. Thu resulting variable filters are canonical in the sense that a minimum number of multipliers in the prototype filter need to be adjusted. Two examples are worked out to illustrate the application of this method.     

Variable Fractional Delay Filter Design Using a Symmetric Window

In this paper a numerically efficient method for designing a nearly optimal variable fractional delay (VFD) filter based on a simple and well-known window method is presented. In the proposed method a single window extracted from the optimal filter with fixed fractional delay (FD) is divided into even and odd part. Subsequently, the odd part is discarded and symmetric even part of the extracted window is used to design a family of nearly optimal filters with varying FD. In addition to window extraction, the proposed approach requires filter gain correction which is dependent on the desired FD. Optimum values of the gain correction factor as well as the extracted window can be computed beforehand, which allows us to design a nearly optimal FD filter with arbitrary FD at low numerical costs during runtime. On the basis of the proposed filter design method, the universal structure of VFD filter allowing for change of filter type and length has been proposed. In the paper, three FD filter optimality criteria are considered, which are maximal flatness, Chebyshev (minimax), and least squares.     

Digital integrator design using Simpson rule and fractional delay filter

The IIR digital integrator is designed by using the Simpson integration rule and fractional delay filter. To improve the design accuracy of a conventional Simpson IIR integrator at high frequency, the sampling interval is reduced from T to 0.5T. As a result, a fractional delay filter needed to be designed in the proposed Simpson integrator. However, this problem can be solved easily by applying well-documented design techniques of the FIR and all-pass fractional delay filters. Several design examples are illustrated to demonstrate the effectiveness of the proposed method.     

Design of 1-D Stable Variable Fractional Delay IIR Filters

In this brief, a two-stage approach for the design of 1-D stable variable fractional delay infinite-impulse response (IIR) digital filters is proposed. In the first stage, a set of fixed delay stable IIR filters are designed by minimizing a quadratic objective function, which is defined by integrating error criterion with IIR filter stability constraint condition. Then, the final design is determined by fitting each of the fixed delay filter coefficients as a 1-D polynomial. Two design examples are given to show the effectiveness of the proposed design method     

Design of adjustable fractional order differentiator using expansion of ideal frequency response

In this paper, the design and implementation structures of adjustable fractional order differentiator (AFOD) are presented. First, the series expansion of ideal frequency response is used to transform the design of AFOD into the designs of log differentiators with various orders. Then, conventional FIR filter design method is applied to design log differentiators. The proposed method is flexible because the AFOD can be designed by considering the trade-off among the storage requirement of filter coefficients, implementation complexity and delay of filter. Finally, several numerical examples are shown to illustrate the effectiveness of the proposed design approach.     

A Fractionally Delaying Complex Hilbert Transform Filter

In this paper, we present a novel complex discrete-time filter. This is a fractionally delaying (FD) Hilbert transform filter (HTF) further called the FD HTF. The filter is based on a pair of rotated variable fractional delay (VFD) filters. It is capable of performing the Hilbertian as well as VFD filtering of the incoming discrete-time signal at the same time. Thus, one can substitute a cascade of the HTF and the VFD filters with an aggregated filter proposed here. The technique is simple to implement. The advantages lie in lower total delay introduced by the compound filter and in a modular structure. The rotated VFD filters in the pair differ only in the value of one parameter - the VFD. The proposed FD HTF can be applied to adaptive quadrature sub-sample estimation of delay.     

A Complex Variable Fractional-Delay FIR Filter Structure

This brief introduces a structure for complex variable fractional delay (FD) finite-length impulse response (FIR) filters. The structure is derived from a real variable FD FIR filter and is constituted by a set of fixed real linear-phase FIR filters and two multiply-accumulate chains containing variable multipliers. In this way the implementation complexity and delay may be reduced in comparison with the cascade approach which hitherto has been used for the same purpose. A design example is included to demonstrate the benefits of the new structure.     

一种Farrow结构数字延时滤波器的设计

普通数字延时滤波器虽然结构简单,但系数计算过程复杂,在延时参数快速变化时,系数更新速度无法满足实时性要求,在工程应用上受限制。采用Farrow结构数字延时滤波器能够更加灵活高效地进行分数延时滤波,延时参数改变时,无需重新计算滤波器系数,更容易在现场可编程门阵列(FPGA)上实现。介绍了一种Farrow结构数字延时滤波器,提出采用基于对称结构的滤波器系数求解方法,并经过加权优化,获得最终Farrow滤波器的系数。系数计算过程中,通过对设计所得Farrow滤波器延时精度和误差的分析,调整加权因子的取值和滤波器阶数,进而提高延时精度。计算机仿真结果证明了加权对称系数求解Farrow滤波器系数方法的有效性和实用性。     

Design of arbitrary-phase variable digital filters using SVD-based vector-array decomposition

This paper proposes a straightforward method for designing variable digital filters with arbitrary variable magnitude as well as arbitrary fixed-phase or variable fractional delay (VFD) responses. The basic idea is to avoid the complicated direct design of one-dimensional (1-D) variable digital filters by decomposing the original variable filter design problem into easier subproblems that only require constant 1-D filter designs and multidimensional polynomial approximations. Through constant 1-D filter designs and multidimensional polynomial fits, we can easily obtain a variable digital filter satisfying the given variable design specifications. To decompose the original variable filter design into constant 1-D filter designs and multidimensional polynomial fits, a new multidimensional complex array decomposition called vector array decomposition (VAD) is proposed, which is based on two new theorems using the singular value decomposition (SVD). Once the VAD is obtained, the subproblems can be easily solved. Furthermore, we show that the VAD can also be generalized to the weighted least squares (WLS) case (WLS-VAD) for the WLS variable filter design. Three design examples are given to illustrate that the WLS-VAD and VAD-based techniques are considerably efficient for designing variable digital filters with arbitrary variable magnitude and arbitrary fixed-phase or VFD responses.