Process development of ITO source/drain electrode for the top-gate indium-gallium-zinc oxide transparent thin-film transistor

Indium-tin oxide (ITO) has been widely used as electrodes for LCDs and OLEDs. The applications are expanding to the transparent thin-film transistors (TTFT_S) for the versatile circuits or transparent displays. This paper is related with optimization of ITO source and drain electrode for TTFTs on glass substrates. For example, un-etched ITO remnants, which frequently found in the wet etching process, often originate from unsuitable ITO formation processes. In order to improve them, an ion beam deposition method is introduced, which uses for forming a seed layer before the main ITO deposition. We confirm that ITO films with seed layers are effective to obtain clean and smooth glass surfaces without un-etched ITO remnants, resulting in a good long-run electrical stability of the top-gate indium-gallium-zinc oxide-TTFT.     

Effects of low-temperature ozone annealing on operation characteristics of amorphous In-Ga-Zn-O thin-film transistors

Effects of low-temperature annealing were examined for amorphous In-Ga-Zn-O (a-IGZO) thin-film transistors (TFTs). In a previous study, we reported that O₂ annealing is effective to improve performances of a-IGZO TFTs when annealed at ≥ 300 °C, but causes large negative threshold voltage shift when annealed at ≤ 200 °C. Here, we examined effects of ozone (O₃) annealing on physical properties and TFT characteristics of a-IGZO in comparison with conventional O₂ annealing. We found little differences in chemical composition, band gap and photoemission spectra between the O₂ and the O₃ annealed films. On the other hand, free electron density was suppressed well by the O₃ annealing even at low temperatures ≤ 200 °C. Moreover, even at 150 °C, the TFTs characteristics were improved to the subthreshold voltage swing of 217 mV/decade, the saturation mobility of ~ 11.4 cm²(Vs)^− 1 and the threshold voltage of 0.1 V by the O₃ annealing. It was also found that the effects of the O₃ annealing is more effective for thicker channel TFTs, which would be due to stronger oxidation power and the larger diffusion constant of oxygen atoms produced from O₃ molecules than those of O₂. These results substantiate that the O₃ annealing is more effective to improve TFT characteristics in particular for low-temperature processes at ≤ 200 °C.     

Wet etching rates of InGaZnO for the fabrication of transparent thin-film transistors on plastic substrates

The wet etch process for amorphous indium gallium zinc oxide (a-IGZO or a-InGaZnO) by using various etchants is reported. The etch rates of a-IGZO, compared to another indium-based oxides including indium gallium oxide (IGO), indium zinc oxide (IZO), and indium tin oxide (ITO), are measured by using acetic acid, citric acid, hydrochloric acid, perchloric acid, and aqua ammonia as etchants, respectively. In our experimental results, the etch rate of the transparent oxide semiconductor (TOS) films by using acid solutions ranked accordingly from high to low are IZO, IGZO, IGO and ITO. Comparatively, the etch rate of the TOS films by using alkaline ammonia solution ranked from high to low are IGZO, IZO, IGO and ITO, in that order.Using the proposed wet etching process with high etch selectivity, bottom-gate-type thin-film transistors (TFTs) based on a-IGZO channels and Y₂O₃ gate-insulators were fabricated by radio-frequency sputtering on plastic substrates. The wet etch processed TFT with 30 µm gate length and 120 µm gate width exhibits a saturation mobility of 46.25 cm² V^− 1 s^− 1, a threshold voltage of 1.3 V, a drain current on-off ratio > 10⁶ , and subthreshold gate voltage swing of 0.29 V decade^− 1. The performance of the TFTs ensures the applicability of the wet etching process for IGZO to electronic devices on organic polymer substrates.     

Nonvolatile memory characteristics of solution-processed oxide thin-film transistors using Ag nanoparticles

We developed a nonvolatile memory device based on a solution-processed oxide thin-film transistor (TFT) with Ag nanoparticles (NPs) as the charge trapping layer. We fabricated the device using a soluble MgInZnO active channel on a SiO₂ gate dielectric, Ag NPs as a charge trapping site at the gate insulator-channel interface, and Al for source and drain electrodes.The transfer characteristics of the device showed a high level of clockwise hysteresis that can be used to demonstrate its memory function, due to electron trapping in the Ag NPs charge trapping layer. A large memory window (?V_th) was observed with a forward and backward gate voltage sweep, and this memory window was increased in size by increasing the gate voltage sweep. These results show the potential application of memory on displays and disposable electronics.     

Degradation characteristics and light-induced effects of polymer thin-film transistors

Polymer thin-film transistors based on poly(2-methoxy-5-(2'-ethyl-hexyloxy)-1,4-phenylene vinylene) have been fabricated by spin-coating process and characterized. The electrical characteristics of the devices stored in dry air show obvious degradation with a smaller mobility due to oxygen effect, and lower threshold voltage. The devices present good optical response in low-light condition and optically induced memory effects, demonstrating their use as promising smart light-detection devices. Moreover, solution preparation, deposition and device measurements have been all performed in the air for the purpose of large-area applications.     

Surface-induced time-dependent instability of ZnO based thin-film transistors

We report on the surface-induced time-dependent instability of ZnO based thin-film transistors (ZnO-TFTs) with interdigitated source/drain (S/D) electrodes. As time elapsed, a considerable shift of threshold voltage (V_T) was observed (by ~ − 16 V) from our TFT. Contact angle of de-ionized water on ZnO surface also changed from 30° to 110°, revealing time-dependent surface state change. According to X-ray photoemission spectroscopy (XPS) measurements, the Zn 2p_3/2 core-level peak and the valence band maximum (VBM) of aged ZnO surface shifted to the higher binding energy by 0.3 eV, which implies a downward energy band bending of the ZnO back channel-surface. We conclude that without passivation layer any bottom gate ZnO-TFT meets the surface-induced electrical instabilities due to the time-dependent conductance of ZnO surface.     

Fabrication of oxide-gate thin-film transistors using PECVD/PLD multichamber system

We developed a new multichamber system which combines a pulsed-laser deposition (PLD) and a plasma-enhanced chemical vapor deposition (PECVD) with shadow masks installed to define the film deposition area on a substrate. In order to verify thecapability of this PLD/PECVD multichamber system, hydrogenated amorphous silicon (a-Si:H) thin film transistors (TFTs) using MgO and Al2O₃ gate dielectrics have been fabricated on glass/indium-tin-oxide (ITO) substrates. The MgO and Al2O₃ films fabricated on fused silica substrates by PLD exhibited transparency higher than 90% and a low leakage current (1 nA/cm² at 1 MV/cm). After depositions of the MgO or Al2O₃ film on the glass/ITO, thesample was transferred to the PECVD chamber for a-Si:H deposition without exposing them to the air. TFTs thus fabricated exhibited such high characteristics as the threshold voltage (VTH) as low as 0.35 V and gate bias dependence of source±drain current exceeding five orders of magnitude. Theresults indicate a high quality a-Si:H/oxide interface and that heterojunction devices can be produced by using the PLD/PECVD multichamber system.     

Analysis of carrier modulation in channel of ferroelectric-gate transistors having polar semiconductor

We have been fabricated and characterized a ferroelectric-gate thin-film transistors (TFTs) using ZnO as a channel polar semiconductor and YMnO₃ as a ferroelectric gate. A typical n-channel transistor property showing clear drain current saturation in I_D-V_D (drain current - drain voltage) characteristics was recognized. When the 3 V of the gate voltage is applied under the 4 V of drain voltage, the large drain current of about 1.1 mA is obtained. These controlled-polarization-type ferroelectric-gate TFTs using ZnO-channel TFTs operate in the accumulation-depletion mode and the ON/OFF state of the ferroelectric-gate TFTs strongly depends on the polarization switching of P_SFe. In this paper, therefore, the polarization switching of P_SFe in the TFT is carefully examined and the relationship between the polarization switching and the carrier accumulation (depletion) state is discussed using impedance spectroscopy and Capacitance-Voltage (C-V) measurements at applied the gate voltage.     

Multicomponent oxide thin-film transistors fabricated by a double-layer inkjet printing process

In this work we report on the fabrication and characterization of multicomponent metal oxide thin-film transistors with a double-layer inkjet printing process. Both the active area and source-drain electrodes of the devices are printed with inks based on metal salt precursors to form Ga₂O₃-In₂O₃-ZnO and In₂O₃-SnO respectively. Electrical characterization has shown that the devices' performance, apart from the active area composition, can also be affected by the printing drop spacing. In general, devices printed with Ga:In:Zn 2:4:1 composition present the highest field effect mobility (~ 1.75-3 cm² V⁻¹ s⁻¹). More stable devices with improved switching, but with a compromise over field effect mobility (~ 0.5-0.9 cm² V⁻¹ s⁻¹) were obtained for the 2:4:2 composition.     

High mobility bottom gate nanocrystalline-Si thin-film transistors

We developed high mobility bottom gate nanocrystalline (nc)-Si thin-film transistors (TFTs). nc-Si film was deposited using inductively coupled plasma chemical vapor deposition method on SiN_x gate insulator. Because of good film crystallinity and low ion damage, we could get high performance TFT characteristics. Our TFT showed field effect mobility of 9.4 cm² V^− 1 s^− 1 for electrons. These results showed that bottom gate nc-Si TFT could be used in applications such as next generation high definition television and organic light-emitting diode display.     

Formation of polycrystalline thin-film transistors with stacked poly-SiGe/poly-Si channel layer for low-voltage applications

A thin-film transistor (TFT) with polycrystalline SiGe/Si stacked channel layer has been proposed for low-voltage applications. For the stacked poly-SiGe/poly-Si channel layer, the resultant 1-μm TFT device can achieve an on/off current ratio above 7 orders and a relatively large on-state current at a low operating voltage, and also cause better transfer characteristics than both the conventional poly-Si and poly-SiGe channel layers. As compared to the poly-Si channel layer, the poly-SiGe channel layer may cause a larger on-state current at a small gate bias of 3 V, due to smaller difference between conduction band and intrinsic level. However, even at a small drain bias of 3 V, the poly-SiGe channel layer leads to an off-state leakage current of about 2 order larger than the poly-Si channel layer, since a smaller energy bandgap may cause more carrier field emission via trap states. As a result, when a poly-SiGe/poly-Si stacked channel layer is employed, the leakage current may be suppressed to a low level as that for the poly-Si channel layer, and the resultant on-state current at a low gate bias voltage can be close to a relatively high level as that for the poly-SiGe channel layer.     

C60 thin-film transistors with high field-effect mobility,fabricated by molecular beam deposition

We report performance of C₆₀ thin-film field-effect transistors and characterizations of C₆₀ thin-films on SiO₂ substrates fabricated by molecular beam deposition. Devices, fabricated and characterized under high vacuum without exposing to air, routinely showed current on/off ratios >10⁸ and field-effect mobility in the range of 0.5–0.3 cm²/V s. The obtained mobility is comparable to the highest value among n-type organic thin-film transistors and close to that derived from the photocurrent measurements on C₆₀ thin-films.The grain size of C₆₀ thin-film, condensed in an fcc solid, increases with the substrate temperature, while themobility did not exhibit a clear relation with substrate temperature.

© 2003 Elsevier Ltd. All rights reserved.     

Characteristics of gravure printed InGaZnO thin films as an active channel layer in thin film transistors

Characteristics of oxide semiconductor thin film transistor prepared by gravure printing technique were studied. This device had inverted staggered structure of glass substrate/MoW/SiNx/ printed active layer. The active layer was printed with precursor of indium gallium zinc oxide solution and then annealed at 550 °C for 2 h. Influences of printing parameters (i.e. speed and force) were studied. As the gravure printing force was increased, the thickness of printed film was decreased and the refractive index of printed active layer was increased. The best printed result in our study was obtained with printing speed of 0.4 m/s, printing force of 400 N and the thickness of printed active layer was 45 nm. According to AFM image, surface of printed active layer was quite smooth and the root-mean square roughness was approximately 0.5 nm. Gravure printed active layer had a field-effect mobility of 0.81 cm²/Vs and an on-off current ratio was 1.36 × 10⁶.     

Analysis of effective channel length variation for thin-film transistors with edge waviness in source/drain electrodes

We analyzed the effective channel length variation of hydrogenated amorphous silicon thin-film transistors (TFTs) that have wavy edge source/drain (S/D) electrodes. Edge waviness is frequently observed when narrow electrodes are fabricated by using printing methods. We used hydrogenated amorphous silicon (a-Si:H) TFTs and photolithographically patterned wavy edge S/D electrodes for accurate analysis. From a transmission line method (TLM), we successfully related the channel current variation to the variation of current transfer length (L_{T_wavy}) of the wavy edge S/D electrodes originated from current spreading and geometrical edge waviness effects which can be separately extracted.     

Operation model with carrier-density dependent mobility for amorphous In-Ga-Zn-O thin-film transistors

An operation model for an amorphous In-Ga-Zn-O (a-IGZO) based thin film transistor (TFT) is studied. The model is not based on the exponential tail states employed in hydrogenated amorphous Si (a-Si:H) TFT, but on a power function of the carrier density which is observed in the TFT and Hall mobilities of a-IGZO. A 2D numerical simulator employing this model reproduced current-voltage characteristics under on operation of coplanar homojunction a-IGZO TFTs. Although the mathematical expression of the mobility is similar to the field effect mobility of a-Si:H TFT, the present model explains the temperature dependence of the on characteristics of a-IGZO TFT.     

Hot-wire thin-film transistors on PET at 100 °C

Bottom-gate amorphous silicon thin-film transistors were fabricated using active layers deposited by r.f. and hot-wire (HW) chemical vapor deposition on polyethylene terephthalate (PET) and polyimide (PI) substrates. The maximum processing temperature was 100 °C for PET and 250 °C for PI. For transistors deposited at 100 °C by r.f. on PET and at 175 °C by HW on PI the transistor characteristics are comparable, although still inferior, to those of standard amorphous silicon transistors fabricated on glass substrates at 250 °C. HW transistors fabricated at 100 °C showed poor device characteristics. For devices fabricated at 100 °C, an extended anneal at this temperature was required to improve the transistor characteristics, independently of the film deposition technique used.     

An amorphous oxide semiconductor thin-film transistor route to oxide electronics

Amorphous oxide semiconductor (AOS) thin-film transistors (TFTs) invented only one decade ago are now being commercialized for active-matrix liquid crystal display (AMLCD) backplane applications. They also appear to be well positioned for other flat-panel display applications such as active-matrix organic light-emitting diode (AMOLED) applications, electrophoretic displays, and transparent displays. The objectives of this contribution are to overview AOS materials design; assess indium gallium zinc oxide (IGZO) TFTs for AMLCD and AMOLED applications; identify several technical topics meriting future scrutiny before they can be confidently relied upon as providing a solid scientific foundation for underpinning AOS TFT technology; and briefly speculate on the future of AOS TFTs for display and non-display applications.     

Facile fabrication of all-SWNT field-effect transistors

Field-effect transistors (FETs) have been fabricated using as-grown single-walled carbon nanotubes (SWNTs) for the channel as well as both source and drain electrodes. The underlying Si substrate was employed as the back-gate electrode. Fabrication consisted of patterned catalyst deposition by surface modification followed by dip-coating and synthesis of SWNTs by alcohol chemical vapor deposition (CVD). The electrodes and channel were grown simultaneously in one CVD process. The resulting FETs exhibited excellent performance, with an I _ON/I _OFF ratio of 10⁶ and a maximum ON-state current (I _ON) exceeding 13 μA. The large I _ON is attributed to SWNT bundles connecting the SWNT channel with the SWNT electrodes. Bundling creates a large contact area, which results in a small contact resistance despite the presence of Schottky barriers at metallic-semiconducting interfaces. The approach described here demonstrates a significant step toward the realization of metal-free electronics.