纳秒脉冲半导体激光驱动器的研究

为了获得高功率、高重复频率的纳秒级光脉冲,介绍了一种基于Marx bank脉冲发生原理的纳秒脉冲激光驱动器的设计,以及设计过程中雪崩晶体管的选取.该驱动器采用一级小雪崩管对触发脉冲进行陡化,由小雪崩管产生的脉冲对Marx bank电路进行触发,以获得大电流窄脉冲,用于驱动半导体激光器.设计所得驱动器的峰值电流为12.5A、半峰全宽为1.51ns、重复频率为100kHz,实现了大幅度纳秒脉冲半导体激光驱动器的设计要求.结果表明,对触发脉冲的陡化,可以降低后一级Marx bank电路的雪崩电压,同时使得脉宽更窄,这将更加有利于驱动半导体激光器.     

Precision measurement technique of integrated MOS capacitor mismatching using a simple on-chip circuit

A precision measurement technique of the capacitor mismatchings of integrated circuits has been required, that is insensitive to parasitic capacitors on the chip, stray capacitors in measurement circuits, and external noises. A new ac measurement technique is developed here that uses an on-chip source-follower circuit and a simple algorithm. The source-follower circuit lowers the output impedance and thereby excludes the effects of external noises and stray capacitors in measurement circuits. In the present technique, capacitively divided ac voltage after the bandpass filter is measured in two steps by exchanging the terminals of the serial capacitors using external switches. Capacitor mismatching, defined by the relative capacitance toleranceDelta C/C, is derived as the ratio of the difference between the two measured voltages to their average. This derivation significantly reduces errors arising from parasitic capacitors on the chip, the nonlinearity of the source-follower circuit, and the pulse wave that can give the gate bias voltage of the source-follower transistor. The measurement error is estimated to be, in the worst case, 0.1 percent ofDelta C/C.     

一种UWB雷达脉冲信号发生器的设计

介绍了UWB雷达的人体生命探测系统的工作原理,比较了几种窄脉冲产生方法的优缺点,详细分析了雪崩三极管原理,利用雪崩三极管的雪崩特性实现了超宽带雷达窄脉冲的产生。通过研究分析典型的脉冲产生电路,给出了产生人体生命探测系统的脉冲信号发生器的电路,最后由实验仿真结果可得,电路可生成脉宽为皮秒级的双极性脉冲,脉冲的峰-峰值达2...     

RF linearity characteristics of SiGe HBTs

Two-tone intermodulation in ultrahigh vacuum/chemical vapor deposition SiGe heterojunction bipolar transistors (HBTs) were analyzed using a Volterra-series-based approach that completely distinguishes individual nonlinearities. Avalanche multiplication and collector-base (CB) capacitance were shown to be the dominant nonlinearities in a single-stage common emitter amplifier. At a given I_c an optimum V_ce exists for a maximum third-order intercept point (IIP3). The IIP3 is limited by the avalanche multiplication nonlinearity at low I_c, and limited by the C_CB nonlinearity at high I_c. The decrease of the avalanche multiplication rate at high I_c is beneficial to linearity in SiGe HBTs. The IIP3 is sensitive to the biasing condition because of strong dependence of the avalanche multiplication current and CB capacitance on I_c and V_ce. The load dependence of linearity was attributed to the feedback through the CB capacitance and the avalanche multiplication in the CB junction. Implications on the optimization of the transistor biasing condition and transistor structure for improved linearity are also discussed     

RF small signal avalanche for bipolar transistor circuit design: Characterization, modeling and repercussions

In the face of increasing demands for high frequency and high output power of modern bipolar transistor circuits, electronic circuit designers are exploring regimes of transistor operation that meet both requirements and enter RF regimes, where impact ionization is significant. The present paper addresses AC/RF avalanche characterization techniques. Repercussions of avalanche breakdown on some important transistor properties like unilateral power gain and the stability factor are introduced and demonstrated by measurements on modern industrial devices. On the basis of theoretical considerations and compact model simulations it is shown when avalanche can be expected to have significant impact on AC performance of bipolar transistors.     

高性能微处理器中一种改进的高扇入多米诺电路设计与实现

设计实现了一种改进的高扇入多米诺电路结构.该电路的nMOS下拉网络分为多个块,有效降低了动态节点的电容,同时每一块只需要一个小尺寸的保持管.由于省去了标准多米诺逻辑中的尾管,有效地提升了该电路的性能.在0.13μm工艺下对该结构实现的一个64位或门进行模拟,延迟为63.9ps,功耗为32.4μw,面积为115μm2.与组合多米诺逻辑相比,延迟和功耗分别降低了55%和38%.     

VBIC95: an improved bipolar transistor model

A new compact bipolar transistor model for circuit simulators that has already received widespread support in the industry, is considered. The model, VBIC95, was constructed to be the industry standard replacement for the aging SPICE Gummel-Poon model (SGP). Users of the 20-year-old SGP model have found it to be inadequate in representing, many of the physical effects important in modern bipolar transistors used in analog and mixed-signal microcircuits. VBIC95 advantages include: 1. Improved static temperature modeling; 2. Correct implementation of the Early effect; 3. An improved forward-biased junction capacitance option; 4. Inclusion of overlap capacitance; 5. Null high-current modeling (updated with NPN V_sat equations); 6. Improved high-level diffusion capacitance modeling; 7. Inclusion of substrate transistor with R_c and variable Beta; 8. Approximate accounting for distributed effects in the input circuit; 9. Consistent treatment of excess phase in transient and small signal analyses; 10. Models weak avalanche effect; 11. All equations differentiable to a high order; 12. Distributed input impedance models AC emitter crowding; and 13. No special test structures required thus minimizing problems with extracting the new model parameters from old data     

1kV/800kHz亚纳秒脉冲发生器设计

提出了以雪崩管作为主开关利用Marx线路来产生高重频高压窄脉冲的方法。分析了雪崩管电路特性,提出了Marx线路下高重频运行时器件的设计要求及印制电路板( PCB)布线设计建议。研制了一台高重频高压亚纳秒脉冲源发生器装置,该装置结构紧凑,在50Ω负载系统下,能输出幅度为1 kV、重复频率为800 kHz、脉宽为500 ps的脉冲。在常温风冷下,该设备可长时间稳定运行。     

Circuits to reduce distortion in the diode-bridge track-and-hold

Circuits for reducing distortion in the diode-bridge track-and-hold are described. Adding circuits with current and voltage feedback can reduce distortion caused by the droop and nonlinear junction capacitance of a transistor. A high-speed complementary bipolar process technology is incorporated in the circuit design for its flexibility. SPICE II simulation demonstrates that the circuits reduce distortion in the diode-bridge track-and-hold by 10 to 20 dB     

开关电容V/Q变换器及其在接地阻抗模拟中的应用

文中提出一个V/Q变换的广义跨导概念,并应用在开关电容阻抗模拟中。使用V/Q变换器,可以用电压传递函数实现所希望的阻抗函数。由此概念出发,分别导出了前差FD,后差BD和双线性S/Z变换的三种接地开关电容频变负阻SC-FDNR电路。如果所选用的电压传递函数电路对杂散电容不灵敏,那么实现的模拟阻抗电路对杂散电容也是不灵敏的。作为文中的一个例子,用FD-FDNR电路组成一个谐振回路,实验表明其频响特性与理论分析相一致。     

Study of Transistor Switching Circuit Stability in the Avalanche Region

In the common-emitter transistor switching application, there are occasions in which the collector supply voltage exceeds the transistor sustain voltage. Consequently, the load line could intersect the negative resistance characteristic of the device in the I /sub C/ -V /sub CE/ plane, resulting in a possible unstable or latch-up condition. The purpose of this paper is to study analytically the avalanche region characteristics and their implications for transistor switching applications. The first part is concerned with the derivation of the direct current-voltage relation that, when viewed from the output terminal, represents a negative resistance. The characteristic of this negative resistance depends on the base-emitter circuit condition. The ac terminal behavior is treated in the second part where consideration of the frequency dependence of alpha leads to an equivalent circuit consisting of an inductance in series with a negative resistance. Both elements are nonlinear as well as frequency-dependent. With an external load connected to this nonlinear circuit, a technique of nonlinear analysis is employed to investigate the circuit stability. From this analysis, latch-up and oscillation phenomena in the transistor switching circuit can be predicted. Since the second breakdown involves additional mechanisms besides avalanche multiplication, it is not discussed in this paper.     

Analysis and design of class E amplifier with shunt capacitance composed of nonlinear and linear capacitances

The Class E amplifier requires exact shunt capacitance to achieve optimum operation. Most Class E amplifiers are usually constructed by adding an external capacitor to the output capacitance of the power transistor in order to obtain the total required shunt capacitance. The output capacitance of the power transistor is nonlinear and the external capacitance is linear. Therefore, neither design equations for linear shunt capacitance nor the design equations for nonlinear shunt capacitance can be used in most designs, especially when the two are comparable. This paper presents an analysis and a design procedure for the Class E amplifier with a shunt capacitance composed of both a transistor nonlinear output capacitance and a linear external capacitance for the duty cycle D=0.5. Because the design equations do not have analytical forms, this paper provides a table and figures, which show results of numerical analysis. The Class E amplifier can be designed using these table and figures. A design example is given to illustrate the design procedure. Simulation results of the example circuit with PSpice and experimental results are presented to verify the theoretical results.     

SiGe工艺中HBT结构ESD保护电路设计

为有效控制生产成本,减少工艺步骤,提出了在SiGe工艺中,用SiGe异质结双极型晶体管(HBT)代替传统二极管来实现静电放电(ESD)保护的方案。通过设计不同的HBT器件的版图结构,以及采取不同的端口连接方式,对HBT单体结构防护ESD的能力强弱和其寄生电容大小之间的关系进行了比较分析,并从中找出最优化的ESD解决方案。应用于实际电路中的验证结果表明,此方案在ESD防护能力达到人体模型(HBM)2 kV的基础上,I/O(IN/OUT输入输出)端口的寄生电容值可以做到200 fF以下,且此电容值还可通过HBT串联模式进一步降低。     

Highly sensitive capacitance measurement for sensors

Very small capacitance changes from a capacitive transducer can be measured using a custom-designed signal-processing chip. The chip features a switched-capacitor integrator with chopper stabilisation to remove the effects of offset, 1/f noise and switch charge injection; the circuit is insensitive to stray capacitance. The achievement of high resolution and low drift is demonstrated.<>     

用于微电容检测的C/V电路设计与研究

结合电荷放大原理,通过设计高性能的运算放大器,较好地完成了杂散电容的屏蔽,实现了高可靠性的微电容检测。采用CSMC0.5μmCMOS工艺,用Cadence Spectre对其进行仿真验证,能精确检测出aF量级的微电容。结合考虑不可避免的工艺误差,对差分标称电容的失配进行分析与校准。结果表明:失配仅带来固定的失调,不会对C/V电路的灵敏度造成显著的影响。     

Design considerations for wide-band p-i-n/HBT monolithictransimpedance optical receivers

A comprehensive circuit and device model was developed for the design of wideband transimpedance optical receivers using heterojunction bipolar transistors (HBTs). This model is used to determine the device and circuit design that gives the highest combination of bandwidth, sensitivity, and stability. For optoelectronic integration, it is convenient to use the collector-base junction of the HBT device structure to fabricate the p-i-n detector. A resulting transistor transit-time effect is shown to cause shunt peaking in the closed-loop response or, at worst, instability. It is shown that the photodiode stray capacitance is not a major source of sensitivity degradation in flip-chip transimpedance receivers. Optimum device structures are determined for InP- and GaAs-based HBT receivers with fine-line as well as relaxed geometries     

基于雪崩晶体管的脉冲半导体激光电源的设计

介绍了一种基于时间延迟和雪崩晶体管的纳秒级窄脉冲半导体激光器电源,该电源主要由脉冲发生电路、雪崩电路组成。实践证明,该电源可以作为一种简单的纳秒脉冲产生装置,产生脉宽〈30ns、峰值为1A的电流脉冲,用于驱动普通半导体激光器。     

Microwave Varactor Tuned Transistor Oscillator Design

An analysis is made of the common base microwave transistor oscillator circuit which uses a varactor in series with the colIector to tune over octave bandwidths. Equations are derived giving the required feedback capacitances and resonating elements required for octave tuning. Normally, the collector-emitter capacitance C/sub ce/ is made approximately equal to the transistor collector capacitance C/sub c/. The emitter-base capacitance C/sub eb/ is important only at very high frequencies. It is shown that a high-Q varactor must be used and that only a limited amount of collector-base capacitance C/sub cb/ may be added if the circuit is to be resonated over an octave. The output power for such a circuit is normally about 1/5 the maximum power available from the transistor. Experimental oscillators were made from 0.5 to 1 GHz and 1 to 2 GHz which substantially verified the analysis. Using the TIXS13 transistor, an output power of 200 mW was obtained from 430 to 860 MHz tuning from -2 to -115 volts. In the 1 to 2 GHz range a TIXS13 transistor oscillator was tuned from 1.09-1.96 GHz with about 40 mW power tuning from -2 to -115 volts. By use of a lower case capacitance varactor, the 1 to 2 GHz oscillator could be made to tune over the full octave.     

Si-controlled avalanche logic

It is proposed that a new integrated-circuit logic system, based on the controlled avalanche mechanism in Si, be developed to meet high speed data processing needs in the multigigabit rate range. A brief discussion of the "controlled avalanche" mechanism is given, and past experimental results with "controlled avalanche transit-time triodes" are cited. The role of avalanche multiplication in increasing the speed over a transistor of the same dimensions is explained. A short drift length "controlled avalanche transistor" (CAT) could be developed to increase the speed of Si logic beyond the present limited capability. To fully exploit the avalanche mechanism, new circuit configurations are proposed which are comprised of CAT's and avalanche diodes to function as NOR, NAND, and INVERT gates. Moreover, a latching action can be obtained in the CAT by means of the return hole mechanism and the device becomes an avalanche memory triode (AMT). Such AMT's are natural devices for shift-register circuits and random-access memory applications. The controlled avalanche logic family of devices, therefore, contains all necessary building blocks for a fast data handling system. It is estimated that a data rate of the order of gigabits per second with a P. t product of the order 10^-12J is possible. Experimental results on discrete devices are presented to demonstrate the switching, memory, and transfer capabilities of the device.     

盖革模式雪崩光电二极管的场效应管淬灭电路设计

雪崩光电二极管(Avalanche Photondiode,APD)是一种常用于激光探测领域的光敏元件.本文针对盖革模式雪崩光电二极管(Geiger Mode-Avalanche Photondiode,Gm-APD)工作时发生的雪崩效应,设计了一种场效应管淬灭电路(Field Effect Transistor Qu...