Statistical Model for the Circuit Bandwidth Dependence of Low-Frequency Noise in Deep-Submicrometer MOSFETs

This paper covers measurement, analytical analysis, and Monte Carlo simulation of the frequency and bandwidth dependence of MOSFET low-frequency (LF) noise behavior. The model is based on microscopic device physics parameters, which cause statistical variation in the LF noise behavior of individual devices. Analytical equations for the statistical parameters are provided. The analytical model is compared to experimental data and Monte Carlo simulation results     

The Effect of Single-Halo Doping on the Low-Frequency Noise Performance of Deep Submicrometer MOSFETs

In this letter, the low-frequency noise performance of single-halo (SH) devices is reported, and the physical mechanisms are identified. Experimental results show that, at constant gate overdrive voltages, SH devices show reduced low-frequency noise levels compared to the conventional devices. However, under constant current bias conditions, the noise reduction is less substantial. Low-frequency noise dependence on channel length is also investigated for SH devices based on the electrical measurements and analytical calculations     

Low-Frequency Noise Characteristics in Strained-Si nMOSFETs

The low-frequency (LF) (1/f) noise mechanism of strained-Si nMOSFETs grown on relaxed Si_1-xGe_x virtual substrates (VSs) has been investigated. It is found that the Si-cap thickness plays an important role in characterizing the 1/f noise mechanism. Ge out-diffusion effect and slight strain relaxation in Si-cap layer are responsible for the degradation of 1/f noise in strained-Si device with 10- and 20-nm-thick Si-cap, respectively. In addition, by choosing proper Si-cap thickness, experimental result shows that as Si-cap undergoes stronger tensile strain for higher Ge concentration VS, the correlated mobility fluctuation term in the modified carrier-number fluctuation model is more dominated for the 1/f noise     

Low-Frequency Noise Characteristics in Ion-Implanted GaN-Based HEMTs

Low-frequency noise characteristics in ion-implanted GaN/AlGaN/GaN and AlGaN/GaN HEMTs were investigated. The normalized spectral noise density was about 6 dB lower in GaN/AlGaN/GaN HEMTs than in AlGaN/GaN HEMTs. The normalized spectral noise density dependence on the gate length Lg indicates that the main origin of low-frequency noise is at the region under the gate in both devices. The Hooge parameters alphaH for both devices are on the order of 10^-1-10^{- 2}. The ion implantation process introduces a lot of defects in the source/drain regions, but the values of alphaH are comparable with those for conventional GaN-based HEMT devices. The values of alphaH are also lower in GaN/AlGaN/GaN HEMTs than in AlGaN/GaN HEMTs, which is due to the decrease of surface potential fluctuations in GaN/AlGaN/GaN HEMTs.     

射频MOSFET噪声模型研究

对0.13μm MOSFET噪声建模和参数提取技术进行了研究,在精确地提取了小信号模型参数之后,利用噪声相关矩阵技术从测量的散射参数和射频噪声参数直接提取了栅极感应噪声电流■、沟道噪声电流■和它们的相关系数,并用PRC模型中的参数来表示。将参数提取结果带入ADS中进行仿真,在2～8GHz频段上仿真结果与测量数据吻合良好。     

Compact Noise Models for MOSFETs

A physical understanding of both intrinsic and extrinsic noise mechanisms in a MOSFET is developed. Intrinsic noise mechanisms fundamental to device operation include channel thermal noise, induced gate noise, and induced substrate noise. While the effect of channel thermal noise is observable at zero drain-to-source voltage, the induced gate and substrate noise do not manifest themselves under these conditions. However, the attendant fluctuations in the channel charge are observable by the passage of electric current through the device. Extrinsic noise mechanisms manifested due to structural evolution of the MOSFET include the distributed gate resistance noise, distributed substrate resistance noise, bulk charge effects, substrate current supershot noise, gate current noise, excess channel noise, and$hbox1/f$noise. Where available, compact noise models covering these noise mechanisms are explained. Also, where possible, methods of suppression of these mechanisms are highlighted. A survey of current public domain MOS models is presented, and a lack of comprehensive coverage of noise models is noted. Open areas of MOSFET noise research in the sub-hundred-nanometer regime are also highlighted. With suitable adaptation, noise concepts elucidated in the context of MOS transistors have a much wider applicability to the operation of HEMTs, JFETs, MESFETs, and other field-effect devices.     

Time-Domain Modeling of Low-Frequency Noise in Deep-Submicrometer MOSFET

$1/f$ noise and random telegraph signal (RTS) noise are increasingly dominant sources of low-frequency noise as the MOSFET enters the nanoscale regime. In this study, $1/f$ noise and RTS noise in the n-channel MOSFET are modelled in the time domain for efficient implementation in transient circuit simulation. A technique based on sum-of-sinusoids models $1/f$ noise while a Monte Carlo based technique is used to generate RTS noise. Low-frequency noise generated using these models exhibits the correct form of noise characteristics as predicted by theory, with noise parameters from standard 0.35-$mu$m and 35-nm CMOS technology. Implementation of the time-domain model in SPICE shows the utility of the noisy MOSFET model in simulating the effect of low-frequency noise on the operation of deep-submicrometer analog integrated circuits.      

Intermittent Phenomena in Switched Systems With High Coupling Strengths

In this paper, one kind of intermittency generated by a discontinuous system is studied. Although this system, which is composed of two switched subsystems coupled with a high strength, is nonsmooth, the mechanism of this kind of intermittency can be analyzed with several explicit relations between the intermittency characteristics and the system control parameters. In particular, estimates of "steady-state" values of the system (in the laminar phases) and a critical value for this intermittency can be derived, which are helpful in relevant control systems design. Moreover, some power laws for the observed intermittency are obtained and discussed     

Synthesis of Low-Frequency Noise for Use in Biological Experiments

A simple technique is described for the generation of white noise having sufficient power below 10 Hz to be useful in biological experiments.     

Numerical Simulation of Low-Frequency Noise in Polysilicon Thin-Film Transistors

Numerical simulations of low-frequency noise are carried out in two technologies of N-channel polysilicon thin-film transistors (TFTs) biased from weak to strong inversion and operating in the linear mode. Noise is simulated by generation/recombination processes. The contribution of grain boundaries on the noise level is higher in the strong inversion region. The microscopic noise parameter that is deduced from numerical simulations is lower than the macroscopic one defined according to the Hooge empirical relationship and deduced from noise measurements. The higher macroscopic value is attributed to the drain-current crowding induced by nonconducting spots in the devices due to structural defects. The ratio of these two noise parameters can be considered as an indicator to qualify TFT technology.     

Compact Channel Noise Models for Deep-Submicron MOSFETs

In this paper, compact channel noise models valid in all regions of operation for deep-submicron MOSFETs have been developed and experimentally verified. The physics-based expressions for thermal noise and flicker noise and corner frequency constitute compact channel noise models. The carrier heating, channel-length modulation, and mobility degradation due to the lateral electric field have been incorporated in the models. The effect of the mobility and carrier number fluctuations on the flicker noise, as well as the dependence of the mobility limited by Coulomb scattering on the inversion carrier density, have been considered in the flicker noise model. The measurement results validate the proposed models.      

PD SOI MOSFET低频噪声研究进展

随着器件尺寸的不断减小,PD SOI器件的低频噪声特性对电路稳定性的影响越来越大.研究了PD SOI器件低频过冲噪声现象,分析了此类器件在发生浮体效应、栅致浮体效应以及前背栅耦合效应时低频过冲噪声的产生机理及影响因素.最后指出,可以通过添加体接触或将PD SOI器件改进为双栅结构,达到有效抑制低频过冲噪声的目的.     

一种改进的深亚微米MOSFET噪声模型

提出一种基于小信号的噪声模型,在精确提取0.13 μm MOSFET的小信号参数后,结合Pospieszalsik和pucel模型,运用噪声相关矩阵转换技术提取出所有噪声参数。利用ADS建立噪声模型,在2～20 GHz频率范围内,仿真结果与测量结果吻合良好,验证了模型的准确性。     

SiGe/Si HBT低频噪声特性研究

对Si/Si1-xGexHBT的低频噪声进行了模拟。频率、基极电流、集电极电流、发射极几何尺寸(面积、条长)、Ge组份x、温度等诸多因素都对低频噪声有影响。模拟结果表明,Si/SiGeHBT具有优异的低频噪声特性。     

Noise model of gate-leakage current in ultrathin oxide MOSFETs

A physics-based analytical model of the gate-leakage current noise in ultrathin gate oxide MOSFETs is presented. The noise model is based on an inelastic trap-assisted tunneling transport. We employ the barrier height fluctuation model and the Lorentzian-modulated shot noise of the gate-leakage current stemming from the two-dimensional electron gas channel to explain the excess noise behavior. The excess noise can be interpreted as the sum of 1/f/sup /spl gamma// noise and the Lorentzian-modulated shot noise. Trap-related processes are the most likely cause of excess current noise because slow traps in the oxide can result in low-frequency dissipation in the conductance of oxides and fast traps can produce the Lorentzian-modulated shot noise associated with generation-recombination process at higher frequencies. In order to verify the proposed noise model, the simulation results are compared with experimental data, and excellent agreement is observed.     

GaAs MESFET器件低频噪声机理的实验研究

本文介绍了GaAs MESFET器件低频噪声测量系统,以及该器件低频噪声的特点。在分析器件中低频噪声可能来源的基础上,首次采用高能电子辐照技术并结合变温噪声测量、变频C-V等方法,对器件低频噪声产生机理进行了实验研究。     

Noise associated with interdigitated gate structures in RFsubmicron MOSFETs

CMOS technologies have gained considerable attention and have raised expectations for employment in RF transceivers. The shrinkage of the MOSFET device dimensions along with the relatively wide gate electrode devices needed to accommodate RF applications lead to reconsideration of the noise properties of submicron MOSFETs. In this paper, we present the noise properties associated with interconnect resistors of an interdigitated structure and the resulting noise source (strong function of the number of fingers) is evaluated against the other noise sources present in the device such as channel thermal noise, induced gate noise, and resistive gate voltage noise. Short channel effects have been taken into account for the evaluation of these noise sources and two-port analysis performed in order to calculate minimum noise figure and optimum input resistance for noise matching     

半导体激光器低频噪声测试及参数提取

半导体激光器低频电噪声的大小受器件潜在缺陷的影响,与器件可靠性具有相关性。介绍了半导体激光器噪声测试及参数提取的原理,设计了基于超低噪声前置放大器和低频频谱分析仪的低频电噪声测试系统,可测量半导体激光器的低频电噪声并提取相关噪声参数,进而通过低频电噪声的研究对半导体激光器进行可靠性评价,具有灵敏度高、非破坏性等优点。     

多晶硅发射极晶体管的低频噪声特性

本文报导在2～2kHz的频率范围内测得的多晶硅发射极晶体管的低频噪声频谱,并论述低频噪声的产生机理。多晶硅发射极晶体管具有较常规晶体管优异的低频噪声特性而可望成为一种合适的低频低噪声器件。     

Low-Frequency Noise Partition of Asymmetric MOS Transistors Operating in Linear Regime

The low-frequency noise in asymmetric MOS transistors with graded channel doping from the source to the drain can be partitioned by assuming a series connection of two or more transistors along the device's channel length. The partition explains the noise overshoot at gate biases around the threshold voltage of the composite device. Expressions for the input-referred gate noise voltage are obtained and verified.