A model for low frequency excess noise in Si-JFETs at low bias

Spectral analyses of the fluctuating drain-source voltages in n- and p-channel Si-JFETs at low bias conditions revealed generation-recombination (G-R) noise over a temperature range of 150–300 K in both types of devices. The corner frequencies f_C and the low frequency plateau values of the Lorentzian spectra were used to study the nature of the noise. In the n-channel device, f_C was strongly temperature dependent; an activation energy, E_C − E_T, of approximately 0.36 eV was obtained from the Arrhenius plot. For the p-channel device, a much higher corner frequency of 20–30 kHz was measured. Based on the experimental results we are led to consider a model for low frequency noise in JFETs that accounts for fluctuations in the channel thickness, and the correlated fluctuations in the number and the mobility of carriers. The relative significance of the three noise mechanisms was found to depend strongly on temperature, doping concentrations, device dimensions, and the energy level of the recombination centers.     

Die abhängigkeit der trägerbeweglichkeit in silizium von der konzentration der freien ladungsträger—II

The decrease of the sum of the free charge carrier mobilities (μ_n + μ_p) in a semiconductor as treated in the preceding paper by Dannhäuser is pursued to even higher carrier concentrations. Through observation of the infrared recombination radiation one can obtain the charge carrier concentration in the weakly doped middle region of a psn structure with abrupt junctions and in particular the boundary values of these concentrations. From these the Boltzmann voltage at the ps and the sn junction are obtained as well as the Dember voltage. By subtracting these terms from the overall voltage U_F across the specimen one obtains the voltage U_mOhm across the s part of the psn structure from which follows—since the current density i_F is measured as well—the sum of the free charge carrier mobilities (μ_n + μ_p). The results of the measurements link up well with those of Dannhäuser and also confirm the theory of Fletcher.     

Avalanche breakdown in silicon diffused junctions

In silicon erfc or gaussian diffused junctions, as well as in linearly graded and step junctions, avalanche breakdown voltage is given approximately by V_B = (5.8 × 10⁴) X_T^0.84 where X_T is total depletion-layer thickness in cm and V_B is breakdown voltage in volts. This expression holds to ±9 per cent for plane junctions in the range 15 V to 1 kV, as indicated in Fig. 6, and should be useful to the practical device designer. The quantity X_T for a diffused junction of the erfc type can be obtained from Fig. 3, which extends the range of previously published curves and is somewhat easier to read as well. This chart and Fig. 4, which gives peak field , can be used to estimate quantitatively the departure of such a diffused junction from pure step or pure graded behavior. The generalized V_B-X_T relationship is based in part on the results of Sze and Gibbons. When their expressions for V_B in step and linearly graded junctions are recast in terms of X_T (instead of doping N_B and gradient a, respectively) these reduce to power-law expressions differing only in numerical coefficient ( 10 per cent difference). The expression's upper range, 300–1000 V, is based upon the recent diffused-junction data of van Overstraeten and de Man, and the lower range, 15–300 V, is also consistent with the experimental data of Miller on step junctions and Carlson on diffused junctions. Carlson's observations were made in about 1959 on large numbers of commercial diodes and have not previously been generally available. These sets of experimental data are compared with the calculated results of the workers mentioned above, plus the diffused-junction results of Kennedy and O'Brien.     

A simple analytical model of counter doping in a uniformly and heavily doped channel region of MOSFETS

We analyze counter doping into a heavily and uniformly doped channel MOSFET region, which enabled us to suppress short channel effects with a proper threshold voltage V_th. We derive a model for the relation between the counter doping conditions and V_th and verify its validity with numerical and experimental data. We show that V_th is determined by the centroid, R_p, and dose, Φ_D, of the counter doping and that V_th is independent of the straggle ΔR_p. We show that R_p is almost invariable while (ΔR_p² + 2Dt) is smaller than R_p0², where R_p0 is the initial R_p which is the projected range of ion implantation, D is the diffusion coefficient of the counter doped impurities, and t is the annealing time. Using this technology we can expect superb short channel immunity with a reduced threshold voltage suitable for deep submicron gate length devices, which is shown from numerical analysis.     

A common-gate CMOS inverter with n-channel amorphous silicon thin-film transistor formed on a crystalline PMOSFET

A common-gate complementary metal-oxide-semiconductor (CMOS) inverter consisting of an n-channel amorphous silicon (a-Si:H) thin-film transistor on top of 1.2 μm high Al gate of the crystalline silicon p-channel metal-oxide-semiconductor (PMOS) transistor has been achieved successfully. The success of this inverter demonstrates the feasibility of depositing 3500 Å thick amorphous silicon material on a surface with roughness in the order of 1.2 μm. It is found that growing an undoped amorphous silicon layer before the deposition of SiN_x insulator is necessary to avoid the permanent destruction of the underlying PMOS due to the stress imposed by the SiN_x. The vertical integration of crystalline silicon and amorphous silicon devices to form three-dimensional circuits is a promising technique for future applications in high density memory cell and neural network image sensors.     

Sensing behavior and mechanism of titanium dioxide-based MOS hydrogen sensor

A Pd/TiO₂/Si MOS sensor (Pdtisin sensor) is proposed for the detection of hydrogen gas. The sensor is fabricated on a p-type 1 1 1 silicon wafer having resistivity of 3–6 Ω cm. The thickness of TiO₂ in this structure is about 600 nm. The capacitance–voltage (C–V) and conductance–voltage (G–V) characteristics of the device is observed on the exposure of hydrogen gas at room temperature. The mechanism of hydrogen sensing of titanium dioxide-based MOS sensor (MOS capacitor) has been investigated by evaluating the change in flat-band voltage (V_FB) and fixed surface state density of the device in presence of hydrogen gas. The device exhibits very large parallel shift in C–V as well in G–V characteristics. The possible mechanism on Pd/TiO₂ and TiO₂/Si surface in presence of hydrogen gas has been proposed. The response and recovery time of the device is also measured at room temperature.     

Drain current thermal noise modeling for deep submicron n- and p-channel MOSFETs

The drain current thermal noise has been measured and modeled for the short-channel devices fabricated with a standard 0.18 μm CMOS technology. We have derived a physics-based drain current thermal noise model for short-channel MOSFETs, which takes into account the velocity saturation effect and the carrier heating effect in gradual channel region. As a result, it is found that the well-known Q_inv/L²––formula, previously derived for long-channel, remains valid for even short-channel. The model excellently explained the carefully measured drain thermal noise for the entire V_GS and V_DS bias regions, not only in the n-channel, but also in the p-channel MOSFETs. Large excess noise, which was reported earlier in some other groups, was not observed in both the n-channel and the p-channel devices.     

Drift velocity and ionization coefficient for holes in single-valley semiconductors

An analytical theory has been developed for drift velocity (V_d) and ionization coefficient (_h) of holes in silicon. Based on Boltzmann transport equation, expressions for drift velocity (V_d) and ionization coefficient (_h) are derived. The theoretical approach is based on calculation of the collision operator for ionization probability, approximated by a delta function. It is observed that the values of drift velocity (V_d) and ionization coefficient (_h) are in good agreement with experimental results for ionization length (l_io = 70 Å) and ionization energy (ε_i = 2.5 eV). This confirms the validity of the developed theoretical model for drift velocity and ionization coefficient of holes.     

Extracting the series resistance and effective channel length of short-channel MOSFETs at liquid nitrogen temperature

We present a simple method to extract the effective channel length and the gate voltage dependent series resistance of p-channel MOSFETs. The method is used at room and at liquid nitrogen temperatures on devices with mask channel lengths in the range of 0.6–2.0 μm. The good agreement found at 77 and 300 K between the experimental drain current-voltage characteristics of the devices and those computed from the extracted parameter verifies the validity of the method.     

Electric field effect on weak localization in a semiconductor quantum wire

The influence of an electric field on weak localization in a semiconductor quantum wire is studied by a recently proposed generalized quantum Langevin equation approach to the conductivity problem. A new physical picture is presented. In our model the electronic motion is essentially one-dimensional, and the phase coherence length ℓ_φ is much larger than the elastic mean free path ℓ₂ of electrons. We find that when the electric field E exceeds a critical value E_c = KV_F/eℓ_φ, where V_F is the Fermi velocity, it will introduce a new cut-off length with implications for the experimental results on semiconductor quantum wires. Our theory is in good agreement with the experiments of Hiramoto and co-workers.     

Investigation of the generation characteristics of metal-insulator-semiconductor structures

A method for determining the surface and volume generation-recombination parameters of MIS structures based on nonequilibrium C(V) and dC/dV(V) measurements using the linear voltage sweep technique is proposed. A theory is developed enabling simple treatment of experimental data and taking into account the dependence of the surface generation velocity, S_g, on the minority carrier concentration p_s. It is shown that the linearity of Zerbst plots can be obtained by using the trustworthy S_R(p_s) relation. Some experimental data concerning the generation properties of the Si---SiO₂ interface are presented. In particular, the experimental S_R(p_s) curves are shown to be in qualitative agreement with the theoretical predictions.     

Low-frequency noise analysis of Si/SiGe channel pMOSFETs

Low-frequency noise characteristics of 0.1 μm Si_1−xGe_x channel pMOSFETs were studied by numerical simulations in the framework of the carrier number fluctuation model as well as the correlated fluctuation in the mobility model. Simulation results predict that Si_1−xGe_x channel pMOSFETs could offer improved low-frequency noise performance as compared to the conventional bulk Si devices. This improvement in Si_1−xGe_x channel pMOSFETs could be attributed to less effective oxide trap density for noise generation due to the increasing separation of quasi-Fermi level and valence band edge at Si–SiO₂ interface by Ge-induced band offset.     

High-speed Si-based metal-semiconductor-metal photodetectors with an additional composition-graded i-a-Si1−xGex:H layer

The response-speed of Si-based metal-semiconductor-metal (MSM) photodetectors was improved by depositing a composition-graded intrinsic hydrogenated amorphous silicon–germanium (i-a-Si_1−xGe_x:H) layer on crystalline silicon (c-Si). In contrast to the non-composition-graded one (using intrinsic hydrogenated amorphous silicon (i-a-Si:H) layer), the full width at half maximum (FWHM) and fall time of the photodetector transient response were improved from 145.2, 404.6 to 107.6, 223.4 ps respectively. The experimental results showed that the device responsivity and quantum efficiency were increased from 0.329 (A/W) and 0.492 to 0.414 and 0.619 respectively by the employed composition-graded technique. We propose that this enhancement is due to a smoother barrier that is formed at the c-Si and i-a-Si_1−xGe_x:H interface. A lower deposition temperature of i-a-Si_1−xGe_x:H layer could be used to further reduce the fall time of the device transient response from 315.6 (250 °C) to 97.6 (180 °C) ps. To improve the contact properties between Cr electrode and i-a-Si_1−xGe_x:H layer, an annealing technique in hydrogen ambient was employed. The device knee voltage, which is the applied voltage at which the device current start to enter the saturation region in its current (log-scale) versus applied voltage characteristics, could be reduced to around 3.5 V after annealing.     

Improved UHF power transistors in MOSFET IC-technology for portable radio applications

A power device for ultra high frequency use has been designed and fabricated in a standard 1.3 μm CMOS technology. A cell-based design is described for a compact and efficient power transistor layout. Devices with three different channel lengths (L = 1.1, 1.5 and 1.9 μm) were compared in the study. Breakdown voltage of > 18 V was achieved by adjusting the channel doping profile. On-resistance measures indicated R_ON 1–2 Ω for a 1 W estimated power output device. ƒ_T of up to 3.6 GHz and ƒ_max up to 10.5 GHz were extracted from small-signal s-parameter measurements. During class A measurements at 900 MHz, power gain of 7.8 dB for L = 1.5 μm devices and 9.5 dB power gain for L = 1.1 μm devices at V_d = 6 V were measured. Some devices were even able to deliver 11 dB power gain at moderate power levels (20 dBm). Maximum efficiency was around 40% and saturated output power was estimated to 24–25 dBm (250–300 mW) for the largest studied device (W/L = 2800/1.1).     

New technique for measuring the threshold voltage in MOS devices

The present paper describes an experimental method that can be used to measure the threshold voltage in MOS devices in the form of transistors or capacitors. The proposed method is based on the detection of the non-steady-state/steady-state transition of the surface potential at the oxide–semiconductor interface of a MOS device, when it is swept from depletion to inversion regions. This detection is carried out as follows: a set of current versus gate signal frequency measurements, for different voltage amplitudes, is performed. The frequency values corresponding to the maximum measured current (optimum frequency) f_m, are read. Several gate voltage versus optimum frequencies (f_m–V_G) curves are plotted for gate voltage values ranging from 0.2 to 3 V with a 0.1 V step increment. The (f_m–V_G) curves are found to undergo an abrupt change of slope at a specific gate voltage value. The value of threshold voltage is extracted from the critical points of the former curves. Experiments have been carried out on different devices. The measured values of threshold voltage are found to be in good agreement to those obtained by the conventional I_D–V_GS and simulation methods as well as that supplied by the device manufacturer.     

Electrical characteristics of B-implanted p-channelMNOS transistors

Boron ions (¹¹B⁺ of 3·7 to 7·4 × 10¹¹/cm² were implanted at 60–120 keV into the channel region of p-channel MNOS double layer insulated gate field effect transistors through 920–940 Å of SiO₂ and various thicknesses (300–1800 Å) of Si₃N₄ deposited on SiO₂. Subsequent annealing was performed in a nitrogen atmosphere at 1000°C for 30 min. Acceleration energy, implant dose and Si₃N₄ thickness dependences of the shift of the threshold voltage showed good agreement with the calculated results based on Ishiwara and Furukawa's theory for distribution of implanted atoms in the double layered substrate, using the projected ranges and standard deviations larger than LSS predictions by the factor of 1·2 for SiO₂ and 1·3 for Si₃N₄, respectively. The results on the gain terms and the breakdown voltages were qualitatively the same as those of ¹¹B⁺-implanted p-channel MOS transistors.     

Low-temperature degradation studies of AlGaAs/GaAs modulation-doped field effect transistors

The degradation of AlGaAs/GaAs modulation-doped field effect transistors (MODFETs) was studied at the low temperature of 77 K. The MODFETs were stress tested at 77 K under both short- and long-term bias stress conditions. The measured MODFET parameters include threshold voltage V_t, transconductance g_m and the gate voltage V_u at which g_m shows a maximum. Shifts of V_t, g_m and V_u were studied as a function of stress voltage and stress time. The measured shifts are found to depend on (V_g − V_d) which indicates the influence of hot electrons coming from the high mobility channel. The MODFETs were also tested for temperature cycling between 300 and 77 K up to 20 cycles. Some changes of device properties at 77 K were observed.     

Effect of the Ge-molefraction on the subthreshold slope and leakage current of vertical Si/Si1−xGex MOSFETs

The effect of the Ge-concentration on the subthreshold behaviour of vertical Si/Si_1−xGe_x pMOSFETs and of complementary Si_1−xGe_x/Si nMOSFETs is investigated by using an analytical model, which includes thermionic emission across the hetero-barrier. It is shown that inclusion of Si_1−xGe_x and strained Si in the source region of the pMOSFET and nMOSFET respectively, suppresses the subthreshold slope roll-up substantially and lowers the leakage current of even the smallest devices with channel lengths down to 50 nm.     

Effect of junction depth on the performance of a diffused np silicon solar cell

A detailed numerical analysis of the influence of the junction depth on the performance of a diffused n⁺p silicon solar cell is presented. The analysis includes the effects of Fermi-Dirac statistics, band gap narrowing, a finite surface recombination velocity and the built-in field due to the impurity profile. The recombination mechanism plays a dominant role in the performance of the solar cell. The ideality factor, “a”, varies from 1.006 for 0.1 μm junction depth, to 1.0135 for 2 μm junction depth. The saturation current density, J_o increases with the junction depth showing that the recombination increases in the heavily doped diffused layer of the device. The variation of the light generated current, J_L, the open-circuit voltage, V_oc, efficiency, η and the ideality factor, “a” are reported and analysed.     

Electronic properties of n-SnO2/a-SiC:H/Au thin-film structures

Electronic properties of n-SnO₂/i-Si_1−xC_x:H/Au MIM-type devices (with x = 0.5–0.75) have been investigated by means of current-voltage measurements in dark conditions and under illumination. Richardson-Schottky emission is demonstrated to be the main injection mechanism. The large current increase observed under illumination is related to a barrier-lowering effect due to the accumulation of photogenerated holes at the n-SnO₂/i-SiC:H interface, and a simple model is presented which is able to explain the experimental data. At high voltages, current injection is dominated by a bulk emission process, which cancels any photoeffect.