支持RISC-V向量指令的汇编器设计与实现

Vector computing can effectively improve the computing efficiency of computers and reduce unnecessary hardware overhead. With the improvement of CPU computing capability, the expansion of register number, and other hardware development trends, vector computing has becoming one of the widely used technologies to improve the CPU performance. The RISC-V architecture, which is highly focused on, also needs vector technology to improve the architecture performance. The open source RISC-V assembler only support standard instructions, and does not support vector instructions until now. In order to support RISC-V vector instructions, this paper details the design and implementation of RISC-V assembler supporting vector instructions.     

面向处理器的系统级模拟、仿真及调试技术——基于软硬件协同设计的新方法

基于软硬件协同设计技术提出了基于系统的模拟仿真和调试方法（SSED）,其基本思想是：在模拟和仿真时建立真实的运行环境;利用可重定目标编译器和汇编器生成将C应用程序转换成汇编语言、执行代码及模拟和仿真的输入向量;利用时间模型进行汇编级调试;对运行结果进行分析。利用该方法设计Jbcore16的过程说明,该方法可进一步加速处理器的逻辑验证,方便对处理器设计的调试。     

面向专用指令集处理器设计的软硬件协同验证

为提高专用指令集处理器设计中的验证效率和覆盖率,将专用指令集处理器的寄存器传输级设计验证与汇编器、指令集模拟器等软件开发工具的测试相结合,提出一种软硬件协同验证方法。该方法按照覆盖率要求由软件自动产生测试程序和数据,将利用汇编器产生的机器指令输入到指令集模拟器和硬件仿真工具分别进行软硬件仿真,通过软硬件仿真结果自动比对得出联合验证结果。实践证明,该方法能够有效提高验证效率和覆盖率,缩短验证周期。     

无线通信中数据同步接收与传送的实现

对实现无线通信中数据的同步接收、处理和传送进行了较为详细的阐述和分析,以PIC16C622单片机为例,讨论了用它的指令集编制江编程序,包括硬件中断、同步接收与传送,以及微机－单片机串口通信等问题。     

PIT: A macro-implemented implementation language

An implementation technique called PIT, for pseudo instructional technique, is described which utilizes the macro capabilities of most macro assemblers. A low level machine architecture is described via a set of macros that include some ‘high level’ features. Since the macros manipulate computer words, and refer to actual registers, their implementation in a system is relatively efficient, but since they do not reflect any one particular hardware design, they can be implemented by almost any macro assembler. Tests are built into the macros so that a PIT program will run without change on any machine that has defined these macros This technique should provide an alternative to using higher level languages as implementation languages if the object code produced by those compilers is deemed too slow (or too large) for the application that is being programmed.     

利用汇编程序实现I/O端口技术的研究

本文介绍如何在Delphi中通过嵌入汇编程序时如何传递参数;编写了I/O端口操作函数,并在此基础上研究了在数据采集的应用中如何根据具体硬件配置,用数据采集方法编写各种数据采集的汇编程序。     

基于宏指令集的专用汇编器的研究与实现

针对将复杂算法转化为硬件电路难度很大的问题,设计一种专用汇编器,可将由宏指令组成的汇编语言自动转化为二进制代码表示的机器语言,并根据宏指令集计算机理论的系统结构,将二进制代码组织成VHDL语言描述的状态机输出,便于进一步的硬件优化设计。性能测试结果证明,该汇编器支持从汇编语言到硬件电路设计语言的自动转化,可较大地提高用硬件电路实现复杂算法的研发效率。     

Assemblers for micro-computers

An assembler which provides facilities for programming in assembly language for the Intel 8080A micro-computer is described. This assembler is a single pass self-assembler and it requires a storage of 2K bytes. The assembler has been designed to be operated from a keyboard to develop programs in assembly language. It allows subroutine calls and nesting of subroutines to any depth. It flashes syntax errors, if any, while an instruction is being keyed in. The most important feature of the assembler is that it does not require costly peripherals such as floppy discs, cassette tapes, etc. It operates through a keyboard with letters (A-Z), Arabic numerals (0–9) and some special characters to accommodate mnemonics used in label, opcode and operand fields of programs in the assembly language. A display facility will be greatly helpful. In this paper, design and implementation details of assembler are presented. The authors have the view that assemblers for other micro-computers can be designed and implemented on similar lines. Though implementation may slightly differ from one micro-computer to another, the design details will mostly remain the same.     

Synthesizing safe control-command systems out of reusable components

This paper presents a safe design method for control-command embedded systems. It investigates the problem of building control-command systems out of Commercial off the shelf (COTS) components. The design method proposed uses in synergy the formal verification (FV) and the Discrete Controller Synthesis (DCS) techniques. COTS are formally specified using temporal logic and/or executable observers. New functions are built by assembling COTS together. As the COTS assembly operation is seldom error-free, behavioral incompatibilities may persist between COTS. For these reasons, COTS assemblies need to be formally verified and if errors are found, an automatic correction is attempted using DCS. The control-command code generated by DCS needs hardware specific post-processing: a structural decomposition, followed by a controllability assessment, followed by a dedicated formal verification step, ensuring that no spurious behavior is added by DCS. The resulting system is ready for hardware (e.g. FPGA) implementation.     

Experience acquiring and retargeting a portable Ada compiler

A technique for implementing Ada with reasonable effort on a piece of non-standard hardware is described. The target machine is a single processing element in an experimental multiprocessor based on NS32000. A portable Ada front-end compiler was used for retargeting, and the process of acquiring and evaluating the front end is described. Based on this experience, comments on the validation, quality and efficiency of Ada compilers are given, along with a detailed overview of the resultant system. The Ada system was built from scratch on the bare hardware. It has three main components: a code generator, a run-time system and an Ada kernel. The code generator is table driven and generates symbolic NS32000 assembler. This code is then assembled and linked by commercially available components. The run-time system and the kernel are implemented in assembly language and Concurrent Euclid and handle tasking, exceptions and scheduling. The result is a complete Ada implementation.     

Multigrid Methods on Semi-Structured Grids

In this work, efficient block-wise multigrid solvers on semi-structured triangular grids are presented for two-dimensional problems. They take advantage of the flexibility of triangular grids as well as the efficiency of block-structured grids, yielding very promising solvers on nowadays hardware. Semi-structured grids offer many advantages for the stencil-wise implementation of geometric multigrid, as well as for an efficient implementation of finite element methods without assembling the global matrix. The semi-structured character of the grids enables us to develop the multigrid algorithm on a block-wise manner, by choosing different components on the structured patches of the mesh. In order to select appropriate components for the different grid geometries of the blocks, a?local Fourier analysis is presented as a very useful tool. Finally, the practical utility of this approach is demonstrated with some numerical experiments.     

Windows2000/XP下进行端口操作的通用模块的实现

在Windows9X下应用程序对硬件设备端口的访问可以直接用汇编语言的读写端口来实现,但是Windows2000/XP操作系统为了保证系统的的安全性、稳定性和可移植行,对应用程序访问硬件资源加以限制,这就要求设计设备驱动程序以实现PC机的软件对指定设备的访问。本文针对仅仅进行简单的端口读写操作的应用程序,提出了一个通用的程序模块。     

汇编程序辅助开发系统的研制与实现

主要介绍了研制成功的汇编程序辅助开发系统的功能、系统结构和主要技术,并对该系统进行了评价和改进建议。该系统运行在Windows环境下,为汇编程序开发提供了一个比较高效的开发工具。     

基于FPGA的32位整数微处理器的设计与实现

CPU“软核”可以根据实际应用需要进行剪裁，因而CPU软核设计是soC设计实现的重要部分．在FPGA内部设计和调试完全嵌入式的整数微处理器软核，不仅涉及到通常CPU必需的算术逻辑累加器、寄存器堆、指令缓冲、跳转计数、指令集及指令编译等方面的设计实现，还要针对FPGA内部的结构特点对设计进行分析优化，例如流水线结构的选择、关键路径延迟的折衷平衡以及整体调试等．在Virtex1000FG680-4FPGA上设计实现的32位RISC整数微处理器，运行时钟频率可达30MHz，实现150条指令，占用FPGA逻辑资源7％．     

RSA在DSP下的快速加密实现

RSA是最早提出的公钥密码体制，其原理简单，安全性好，但由于其密钥较长才能保证一定的安全性，因而计算量大，如果用软件加密其速度太慢，用硬件实现可以大大提高RSA的速度。DSP芯片系列提供了一种专用的乘法器，其完成一次乘法的时间只要一个周期，这使实现RSA的速度加快。介绍了一种适合DSP TMS320C54X芯片，用汇编语言实现的一种快速的RSA，并实现了良好的加速算法。     

一种快速构造汇编器的方法及其应用

本文给出一种快速构造汇编器的方法.这种方法的特点是：借助lex和yacc分别生成汇编器的词法和语法分析器;指令在汇编器中以一种内部表示的形式存在;指令的编码信息存放在数据表格中,编码一条指令时使用一个通用的过程查询这些表格以决定指令的编码格式,然后调用相应的编码函数产生指令的机器代码.通过这种方法构造的汇编器是易修改的.本文最后叙述这一方法在实现一款VLIW DSP汇编器时的应用.     

基于用户描述的可配置汇编器

针对传统固定指令集处理器的汇编器开发周期长、无法及时适应可配置处理器指令集需求变化的问题,提出一种基于用户描述的可配置汇编器的设计和实现方法,高度抽象汇编器中依赖指令集的部分,通过对指令集高层次描述,快速将指令集的变化映射到汇编器源代码上。实验结果表明,该方法可降低汇编器50％左右的开发工作。     

单片机汇编器的设计与实现

单片机开发系统主要由单片机交叉汇编程序和仿真程序两个模块组成，其中单片机交叉汇编程序是由单片机汇编器来实现。本文主要介绍了汇编器设计方法及实现过程，通过运用传统的两遍扫描的算法．并对不同的模块进行了划分和优化。我们可以通过简单的模块改动就能使其应用于不同类型的单片机中。     

基于DSP的电线加塑恒张力模糊变结构控制系统的设计

针对电线加塑生产过程中张力系统中存在的加塑不均匀、铜芯易被拉断或堆挤等问题,提出利用数字信号处理器(DSP)对张力进行控制的方案。硬件设计以美国TI公司生产的TMS320LF2407A DSP芯片为主控单元,软件设计是利用DSP集成开发环境CCS 2.2,采用C语言和汇编语言混合编译的方法进行控制程序的开发,在控制策略上采用模糊变结构控制。     

Learning Part Generation and Assembly for Sketching Man‐Made Objects

Modeling 3D objects on existing software usually requires a heavy amount of interactions, especially for users who lack basic knowledge of 3D geometry. Sketch‐based modeling is a solution to ease the modelling procedure and thus has been researched for decades. However, modelling a man‐made shape with complex structures remains challenging. Existing methods adopt advanced deep learning techniques to map holistic sketches to 3D shapes. They are still bottlenecked to deal with complicated topologies. In this paper, we decouple the task of sketch2shape into a part generation module and a part assembling module, where deep learning methods are leveraged for the implementation of both modules. By changing the focus from holistic shapes to individual parts, it eases the learning process of the shape generator and guarantees high‐quality outputs. With the learned automated part assembler, users only need a little manual tuning to obtain a desired layout. Extensive experiments and user studies demonstrate the usefulness of our proposed system.