Impact of Al composition on RF noise figure of AlGaAs/GaAsheterojunction bipolar transistors

The influence of Al content on the RF noise characteristics of Al _xGa_1-xAs/GaAs heterojunction bipolar transistors (HBT's) is presented. It is shown that the minimum noise figure (F_min) at 2 GHz is reduced by increasing the Al mole fraction (x). This observed improvement in noise figure is directly correlated to the differences in dc current gain. The lowest measured F_min(2 GHz) of HBT's with emitter dimensions 2×(3.5×30) μm², were 1.3, 1.61, and 2.1 dB for x=0.35, 0.30, and 0.25 devices, respectively at I_c=3 mA. The measured results were found to agree well with calculated values over a wide range of collector currents     

Noise performance of low power 0.25 micron gate ion implantedD-mode GaAs MESFET for wireless applications

We report on the noise performance of low power 0.25 μm gate ion implanted D-mode GaAs MESFETs suitable for wireless personal communication applications. The 0.25 μm×200 μm D-mode MESFET has a f_t of 18 GHz and f_max of 33 GHz at a power level of 1 mW (power density of 5 mW/mm). The noise characteristics at 4 GHz for the D-mode MESFET are F_min=0.65 dB and G_assoc =13 dB at 1 mW. These results demonstrate that the GaAs D-mode MESFET is also an excellent choice for low power personal communication applications     

SiGe pMODFETs on silicon-on-sapphire substrates with 116 GHzfmax

The dc and microwave results of Si_0.2Ge_0.8/Si_0.7Ge_0.3 pMODFETs grown on silicon-on-sapphire (SOS) substrates by ultrahigh vacuum chemical vapor deposition are reported. Devices with L_g=0.1 μm displayed high transconductance (377 mS/mm), low output conductance (25 mS/mm), and high gate-to-drain breakdown voltage (4 V). The dc current-voltage (I-V) characteristics were also nearly identical to those of control devices grown on bulk Si substrates. Microwave characterization of 0.1×50 μm² devices yielded unity current gain (f_T) and unilateral power gain (f _max) cutoff frequencies as high as 50 GHz and 116 GHz, respectively. Noise parameter characterization of 0.1×90 μm² devices revealed minimum noise figure (F_min) of 0.6 dB at 3 GHz and 2.5 dB at 20 GHz     

Minority-carrier transport parameters in heavily doped p-typesilicon at 296 and 77 K

Minority-carrier electron lifetime, mobility and diffusion length in heavily doped p-type Si were measured at 296 and 77 K. It was found that a 296 K μ_n (pSi)≈μ_n (nSi) for N _AA≲5×10¹⁸ cm^-3, while μ_n (pSi)/μ_n (nSi)≈1 to 2.7 for higher dopings. The results also show that for N_AA≲3×10¹⁹ cm^-3, D (pSi) at 77 K is smaller than that at 296 K, while for higher dopings D_n (pSi) is larger at 77 K than at 296 K. μ_n (pSi) at 77 K increases with the increasing doping above N_AA>3×10¹⁸ cm^-3, in contrast to the opposite dependence for μ_n (nSi) in n⁺ Si     

Low noiseIn0.32(AlGa)0.68As/In0.43Ga0.57As metamorphic HEMT on GaAs substrate with 850 mW/mm output powerdensity

A double-pulse-doped InAlGaAs/In_0.43Ga_0.57As metamorphic high electron mobility transistor (MHEMT) on a GaAs substrate is demonstrated with state-of-the-art noise and power performance, This 0.15 μm T-gate MHEMT exhibits high on- and off-state breakdown (V_ds>6 V and V_dg>13 V, respectively) which allows biasing at V_ds>5 V. The 0.6 mm device shows >27 dBm output power (850 mW/mm) at 35 GHz-the highest reported power density of any MHEMT. Additionally, a smaller gate periphery 2×50 μm (0.1 mm) 43% MHEMT exhibits a F_min=1.18 dB and 10.7 dB associated gain at 25 GHz, and also is the first noise measurement of a -40% In MHEMT. A double recess process with selective etch chemistries provides for high yields     

Circuit performance of CMOS technologies with silicon dioxide andreoxidized nitrided oxide gate dielectrics

The circuit performance of CMOS technologies with silicon dioxide (SiO₂) and reoxidized nitrided oxide (RONO) gate dielectrics over the normal regime of digital circuit operation, i.e. V_GS⩽5 V and B_DS⩽5 V, is discussed. The simulation of a simple CMOS inverter has shown that the SiO₂ inverter consistently outperforms the RONO inverter over temperatures ranging from 300 to 100 K. This can be attributed mainly to the significantly lower μ_p (hole mobility) of RONO p-channel devices. At 300 K, μ_p(RONO) is 14-8% smaller than μ_p(SiO₂) over the entire range of gate biases, while μ_n(RONO) (electron mobility of n-channel RONO devices) is also smaller than μ_n(SiO₂) and reaches only 96% of μ_n(SiO₂) at V_GS=5 V. At 100 K, μ_n(RONO)/μ_n (SiO₂) at V_GS=5 V is increased to 1.10, however, μ_p(RONO)/μ_p(SiO₂) at V_GS=5 V is degraded to 0.59. The dependence of circuit performance on the supply voltage has also been evaluated for the RONO and SiO₂ inverters     

A noise model for high electron mobility transistors

A model to explain the noise properties for AlGaAs/GaAs HEMT's, AlGaAs/InGaAs/GaAs pseudomorphic HEMT's (P-HEMT's) and GaAs/AlGaAs inverted HEMT's (I-HEMT's) is presented. The model Is based on a self-consistent solution of Schrodinger and Poisson's equations. The influence of the drain-source current, frequency and device parameters on the minimum noise figure F_min and minimum noise temperature T_min, for different HEMT structures are presented. The study shows that P-HEMT's have a better noise performance than the normal and inverted HEMT's. The present model predicts that a long gate P-HEMT device will exhibit a better noise performance than a conventional HEMT. There is a range of doped epilayer thickness where minimum noise figure is a minimum for pseudomorphic HEMT's which is not observed in conventional and inverted HEMT's. The calculated noise properties are compared with experimental data and the results show excellent agreement for all devices     

Optimization of gate-to-drain separation in submicron gate-lengthmodulation doped FET's for maximum power gain performance

This paper analyzes the effects of the separation between the gate and the drain electrodes on the high-frequency performance limitations of heterostructure MODFET's. Based on the effective gate-length and carrier velocity saturation concepts first the key small-signal equivalent network model parameters of the MODFET are calculated. The concept of open-circuit voltage gain, defined as the transconductance to output conductance ratio (g_m/g_o), has been exploited to determine the output conductance with a knowledge of the static electric field and potential at the edge of the gate on the drain side. By treating the c_oμ_n product as a function of the gate voltage, the drain current-voltage and transconductance characteristics have been effectively modeled for practical devices. By combining the effects of the intrinsic and parasitic equivalent network parameters this paper has determined the dependence of the g_m/g_o ratio, the gate capacitance to the feedback capacitance ratio, the unity current gain frequency (f_r) and the maximum frequency of oscillations (f _max) on the gate-to-drain separation (L_gd). MODFET's based on InAlAs/InGaAs heterostructures lattice-matched to InP substrate with gate-length values of 0.25 μm, 0.15 μm and 0.1 μm are considered for analyses. The optimum values of L_gd calculated are 600 Å, 420 Å, and 340 Å for the corresponding maximum f_max-values of 250, 370, and 480 GHz, respectively     

Analytical behavior of the noise resistance and the noiseconductance for a network with parallel and series feedback

An analysis is presented of the changes of the noise parameters of a two-port network when noisy series and parallel feedback immittances are applied. Exact formulas for the noise parameters R_n, g _n, and ρ_n are given as functions of the feedback for a given network. It is proved that R_n always reaches a minimum when a reactive series feedback is considered. The same results are demonstrated for g_n since a duality principle is pointed out. The results are valid for a wide range of linear microwave two-port networks, either passive or active, and they are used to confirm the data from previously published work     

0.3 dB minimum noise figure at 2.5 GHz of 0.13 μm Si/Si0.58Ge0.42 n-MODFETs

RF and microwave noise performances of strained Si/Si_0.58 Ge_0.42 n-MODFETs are presented for the first time. The 0.13 μm gate devices have de-embedded f_T=49 GHz, f_max =70 GHz and a record intrinsic g_m=700 mS/mm. A de-embedded minimum noise figure NF_min=0.3 dB with a 41 Ω noise resistance R_n and a 19 dB associated gain G_ass are obtained at 2.5 GHz, while NF_min=2.0 dB with G_ass=10 dB at 18 GHz. The noise parameters measured up to 18 GHz and from 10 to 180 mA/mm with high gain and low power dissipation show the potential of SiGe MODFETs for mobile communications     

Extremely low-noise performance of GaAs MESFETs with wide-headT-shaped gate

Fully ion-implanted low-noise GaAs MESFETs with a 0.11-μm Au/WSiN T-shaped gate have been successfully developed for applications in monolithic microwave and millimeter-wave integrated circuits (MMICs). In order to reduce the gate resistance, a wide Au gate head made of a first-level interconnect is employed. As the wide gate head results in parasitic capacitance, the relation between the gate head length (L_h) and the device performance is examined. The gate resistance is also precisely calculated using the cold FET technique and Mahon and Anhold's method. A current gain cutoff frequency (f_T) and a maximum stable gain (MSG) decrease monotonously as L_h increases on account of parasitic capacitance. However, the device with L_h of 1.0 μm, which has lower gate resistance than 1.0 Ω, exhibits a noise figure of 0.78 dB with an associated gain of 8.7 dB at an operating frequency of 26 GHz. The measured noise figure is comparable to that of GaAs-based HEMT's     

Test structure design for the evaluation of carrier-carrierscattering effect on hole and electron mobilities

In this paper we present a new three-terminal test structure that enables one to simply evaluate the reduction in the hole and electron mobilities due to the carrier-carrier scattering effect. The use of a three-terminal device is necessary to remove the limitations of other measurement methods and to separately obtain μ_n and μ _p. An investigation of the role of the geometrical parameters of the test structure highlights its suitability and flexibility for the mobility extraction procedure. Numerical simulation is used to carefully design the test structure and to verify the accuracy of the measurement method. Experimental results obtained from n-type silicon regions are presented and compared to major analytical models     

Self-aligned SiGe NPN transistors with 285 GHz f/sub MAX/ and 207 GHz f/sub T/ in a manufacturable technology

This paper reports on SiGe NPN HBTs with unity gain cutoff frequency (f_T) of 207 GHz and an f_MAX extrapolated from Mason's unilateral gain of 285 GHz. f_MAX extrapolated from maximum available gain is 194 GHz. Transistors sized 0.12×2.5 μm² have these characteristics at a linear current of 1.0 mA/μm (8.3 mA/μm²). Smaller transistors (0.12×0.5 μm²) have an f_T of 180 GHz at 800 μA current. The devices have a pinched base sheet resistance of 2.5 kΩ/sq. and an open-base breakdown voltage BV_CEO of 1.7 V. The improved performance is a result of a new self-aligned device structure that minimizes parasitic resistance and capacitance without affecting f_T at small lateral dimensions     

Analytical Determination of MOSFET's High-Frequency Noise Parameters From NF50 Measurements and Its Application in RFIC Design

An analytical method, along with closed-form solutions, to determine high-frequency (HF) noise parameters of the MOSFET from its noise figure (NF) measurements with an arbitrary source impedance is presented and experimentally verified. This method allows for the determination of the minimum noise figure, NF_min, equivalent noise resistance, R_n, and optimum source admittance Y_opt , of MOSFET directly from a single high-frequency 50-Omega noise figure measurement and a model characterization based on the transistor's measured scattering parameters. The proposed method can accurately predict the noise parameters of deep-submicron MOSFETs, and hence is useful in the design of low-noise radio-frequency integrated circuits (RFICs). Application of the proposed method in the design of CMOS RF low-noise amplifiers (LNAs) is also discussed     

The effects of geometrical scaling on the frequency response andnoise performance of SiGe HBTs

We examine the geometrical scaling issues in SiGe HBT technology. Width Scaling, length scaling, and stripe-number scaling are quantified from a radio frequency (RF) design perspective at 2 GHz. We conclude that a SiGe HBT with emitter area A_E=0.5×20×6 μm² is optimum for low noise applications at J_c=0.1 mA/μm² and f=2 GHz using the design methodology, which guarantees optimal noise and input impedance matching with the simplest matching network. Finally, the optimal device sizes at f=4 and 6 GHz for low noise applications are also obtained using the same method     

Microwave performance of ion-implanted InP JFETs

These devices have a planar structure with the channel and gate regions formed by the selective implantation of silicon and beryllium into an Fe-doped semi-insulating InP substrate. The nominal gate length is 2 μm with a channel doping of 10¹⁷ cm^-3 and thickness of 0.2 μm. The measured values of f_T and f_max are 10 and 23 GHz, respectively. Examination of the equivalent circuit parameters and their variation with bias led to the following conclusions: (a) a relatively gradual channel profile results in lower than desired transconductance, but also lower gate-to-channel capacitance; (b) although for the present devices, the gate length and transconductance are the primary performance-limiting parameters, the gate contact resistance also reduces the power gain significantly; (c) the output resistance appears lower than that of an equivalent GaAs MESFET, and requires a larger V_DS to reach its maximum value; and (d) a dipole layer forms and decouples the gate from the drain with a strength that falls between that of previously reported GaAs MESFETs and InP MESFETs     

Experimental linewidth-insensitive coherent analog optical link

We constructed an experimental linewidth-insensitive coherent analog optical link. The transmitter utilizes an external electro-optic amplitude modulator and a semiconductor laser. The receiver consists of a heterodyne front-end, a wideband filter, square law detector and narrowband lowpass filter. We performed experimental measurements and theoretical analyses of the spurious-free dynamic range (SFDR), link gain and noise figure for both the coherent AM and the direct detection links; we investigated the dependencies of the foregoing parameters on the received optical signal power, laser linewidth, IF bandwidth, and the laser relative intensity noise (RIN). By selecting a wide enough bandpass filter, we made the coherent AM link insensitive to laser linewidth. The coherent AM link exhibits a higher SFDR than the corresponding direct detection link when the received optical signal power is less than 85 μW. The noise figure for the coherent link is greater than that for the direct detection link under all conditions investigated. For received optical signal powers greater than 4 μW, the link gain for the direct detection link is greater than that for the coherent AM link. The following are the link parameters that have been achieved for the coherent AM link investigated: SFDR=88 dB·Hz^2/3, link gain=-25 dB and noise figure=78 dB; this performance has been obtained with a received optical signal power of 85 μW, and a local oscillator power at the photodetector of 228 μW. The link performance can be further improved by auxiliary subsystems such as a balanced receiver and impedance matched transmitter and receiver ends; and/or by using better optical and electrical devices like higher power lasers, linearized optical modulators, low-noise and high gain RF amplifiers, and optical amplifiers,     

Improvement of sensor performance of high-TC thin filmplanar SQUID gradiometers by ion beam etching

The sensor performance of galvanically coupled Y₁Ba₂Cu₃O_7-x (YBCO) dc SQUID gradiometers on 24° bicrystal substrates has been improved by thickness reduction in the region of the grain boundary Josephson junctions using ion beam etching. The prepared etching mask allows the reduction of the critical current by more than one order of magnitude while the SQUID inductance is slightly increased. This treatment shifts the SQUID parameter β_L from values above 10 to the proposed optimum around 1. The authors observed with decreasing critical current and increasing normal resistance a reduced I_CR_N product with values between 300 and 400 μV at 150-nm film thickness changing to values near 150 μV at 50-nm film thickness. Despite this fact, the white flux noise level as well as the low-frequency noise is reduced. With their galvanically coupled 4×8 mm² dc SQUID gradiometer the authors obtained a white noise level of 4.2 μΦ₀/√Hz corresponding to a field gradient sensitivity of 430 fT/cm√Hz at 77 K after the trimming process     

Current gain dependence on subcollector and etch-stop doping inInGaP/GaAs HBTs

The DC current gain dependence of InGaP/GaAs heterojunction bipolar transistors (HBTs) on subcollector and etch-stop doping is examined. Samples of InGaP/GaAs HBTs having various combinations of subcollector doping and etch-stop doping are grown, and large area 60 μm×60 (μ) HBTs are then fabricated for DC characterization. It is found that the DC current gain has a strong dependence on the doping concentration in the subcollector and the subcollector etch-stop. Maximum gain is achieved when the subcollector is doped at 6~7×10 ¹⁸ cm^-3 while the subcollector etch-stop is doped either above 6×10¹⁸ cm^-3 (current gain/sheet resistance ratio, β/R_b=0.435 at I_c=1 mA) or below 3.5×10¹⁷ cm^-3 (β/R_b=0.426~0.438 at I_c=1 mA). The data show that it is not necessary to heavily dope the subcollector etch-stop to reduce the conduction barrier and to obtain high current gain. The high current gain obtained with the low InGaP etch-stop doping concentration is attributed to the reduction of the effective energy barrier thickness due to band bending at the heterojunction between the InGaP etch-stop and the GaAs subcollector. These results show that the β/R_b of InGaP/GaAs HBTs can improve as much as 69% with the optimized doping concentration in subcollector and subcollector etch-stop     

Super low-noise HEMTs with a T-shaped WSix gate

A T-shaped quarter-micron gate structure composed of WSi_x /Ti/Pt/Au has been developed for low-noise AlGaAs/GaAs HEMTs. The gate resistance R_g was reduced to 0.3 Ω for devices with 200 μm-wide gates despite using WSi_x, and the source resistance R_s reached 0.28 Ω mm by minimising the source-gate distance using a self-alignment technique. This HEMT exhibited the lowest reported noise figure of 0.54 dB with an associated gain of 12.1 dB at 12 GHz