Reliability of advanced high-k/metal-gate n-FET devices

Hot-carrier degradation and bias-temperature instability of FinFET and fully-depleted SOI devices with high-k gate dielectrics and metal gates are investigated. Thinner SOI results in increased hot-carrier degradation, which can be recovered by junction engineering. FinFETs with (1 1 0) Si active surfaces exhibit degradation of sub-threshold swing after hot carrier stress, indicating generation of interface states. The effect of duty cycle on bias-temperature instability modulates the quasi-steady-state trap occupancy over a broad distribution of electron trapping and de-trapping times. Only the deeper traps remain filled for low duty cycle, and shallower traps are emptied during AC stress.     

Mechanical stress field assisted charge de-trapping in carbon doped oxides

Leakage current and dielectric breakdown effects are conventionally studied under electrical fields alone, with little regard for mechanical stresses. In this letter, we demonstrate that mechanical stress can influence the reliability of dielectrics even at lower field strengths. We applied tensile stress (up to 8 MPa) to a 33% porous, 504 nm thick carbon doped oxide thin film and measured the leakage current at constant electrical fields (up to 2.5 MV/cm). The observed increase in leakage current at relatively low electric fields suggests that mechanical stress assists in trap/defect mediated conduction by reducing the energy barrier potential to de-trap charges in the dielectric.     

Characterization of current transport in ferroelectric polymer devices

We report the charge injection characteristics in poly(vinylidene fluoride-trifluoroethylene), P(VDF-TrFE), as a function of electrode material in metal/ferroelectric/metal device structures. Symmetric and asymmetric devices with Al, Ag, Au and Pt electrodes were fabricated to determine the dominant carrier type, injection current density, and to propose transport mechanisms in the ferroelectric polymer. Higher work function metals such as Pt are found to inject less charges compared to lower work function metals, implying n-type conduction behavior for P(VDF-TrFE) with electrons as the dominant injected carrier. Two distinct charge transport regimes were identified in the P(VDF-TrFE) devices; a Schottky-limited conduction regime for low to intermediate fields (E < 20 MV/m), and a space-charge limited conduction (SCLC) regime for high fields (20 < E < 120 MV/m). Implication of these results for degradation in P(VDF-TrFE) memory performance are discussed.     

Electron mobility of rare earth complexes measured by transient electroluminescence method

Electron mobility of gadolinium/europium (dibenzoylmethanato)₃(bathophenanthroline) (Gd/Eu(DBM)₃ bath) was measured by transient electroluminescence (EL) method. Although electron mobility of the two complexes were expected to be same, the value of mobility (1.2 × 10⁻⁴ cm²/Vs at electric field of 1 MV/cm) of Eu(DBM)₃ bath complex was bigger than that (8 × 10⁻⁵ cm²/Vs at electric field of 1 MV/cm) of Gd(DBM)₃ bath complex. It was found to be related to the different luminescent mechanisms of active materials and recombination zones in the devices. According to this, penetration length of hole injected into electron transport layer of Eu(DBM)₃ bath was estimated.     

High dielectric constant TiO2 film grown on polysilicon by liquid phase deposition

In this study, titanium dioxide (TiO₂) films were grown on polycrystalline silicon by liquid phase deposition (LPD) with ammonium hexafluoro-titanate and boric acid as sources. The film structure is amorphous as examined by X-ray diffraction (XRD). A uniform composition of LPD-TiO₂ was observed by SIMS examination. The leakage current density of an Al/LPD-TiO₂/poly-Si/p-type Si metal–oxide–semiconductor (MOS) structure is 1.9 A/cm² at the negative electric field of 0.7 MV/cm. The dielectric constant is 29.5 after O₂ annealing at 450 °C. The leakage current densities can be improved effectively with a thermal oxidized SiO₂ added at the interface of LPD-TiO₂/poly-Si. The leakage current density can reach 3.1×10⁻⁴ A/cm² at the negative electric field of 0.7 MV/cm and the dielectric constant is 9.8.     

High current conduction with high mobility by non-radiative charge recombination interfaces in organic semiconductor devices

We report a unique non-radiative p-n-p junction structure to provide high current conduction with high mobility in organic semiconductor devices. The current conduction was improved by increasing p-n junctions made with intrinsic p-type hole transport layer and n-type electron transport layer. The excellent hole mobility of 5.3 × 10^?1 cm²/V s in this p-n-p device configuration is measured by the space charge limited current method with an electric field of 0.3 MV/cm. Enhanced current conduction of 248% at 4.0 V was observed in fluorescent blue organic light-emitting diodes with introduction of non-radiative p-n-p-n-p junction interfaces. Thereupon, the power efficiency at 1000 cd/m² was improved by 22% and the driving voltage also was reduced by 17%, compared to that of no interface device. Such high current conduction with high mobility is attributed to the carrier recombination at p-n-p interfaces through coulombic interaction. This non-radiative p-n-p junction structure suggested in this report can be very useful for many practical organic semiconductor device applications.     

The effect of oxide layer thickness on the quantification of 1.5 MeV γ–radiation induced interface traps in the Ag/SiO2/Si MOS devices

This work presents the effect of varied thickness of oxide layer and radiation dose on electrical characteristics of Ag/SiO₂/Si MOS devices irradiated by 1.5 MeV γ–radiations of varied doses. SiO₂ layers of 50, 100, 150 and 200 nm thickness were grown on Si substrates using dry oxidation and exposed to radiation doses of 1, 10 and 100 kGy. The exposure to radiation resulted in generation of fixed charge centers and interface traps in the SiO₂ and at the Si/SiO₂ interface. Capacitance-conductance-voltage (C-G-V) and capacitance-conductance-frequency (C-G-f) measurements were performed at room temperature for all MOS devices to quantify the active traps and their lifetimes. It is shown that accumulation and minimum capacitances decreased as the thickness of SiO₂ layer increased. For the unexposed MOS devices, the flat band voltage V_FB decreased at a rate of −0.12 V/nm, density of active traps increased by 4.5 times and depletion capacitance C_DP, increased by 2.5 times with the increase of oxide layer thickness from 50 to 200 nm. The density of active traps showed strong dependence on the frequency of the applied signal and the thickness of the oxide layer. The MOS device with 200 nm thick oxide layer irradiated with 100 kGy showed density of active interface traps was high at 50 kHz and was 3.6×10¹⁰ eV⁻¹ cm⁻². The relaxation time of the interface traps also increased with the exposure of γ–radiation and reached to 9.8 µs at 32 kHz in 200 nm thick oxide MOS device exposed with a dose of 100 kGy. It was inferred that this was due to formation of continuum energy states within the band gap and activation of these defects depended on the thickness of oxide layer, applied reverse bias and the working frequency. The present study highlighted the role of thickness of oxide layer in radiation hard environments and that only at high frequency, radiation induced traps remain passivated due to long relaxation times.     

Ultra-thin polymer gate dielectrics for top-gate polymer field-effect transistors

We have demonstrated top-gate polymer field-effect transistors (FETs) with ultra-thin (30–50 nm), room-temperature crosslinkable polymer gate dielectrics based on blending an insulating base polymer such as poly(methyl methacrylate) with an organosilane crosslinking agent, 1,6-bis(trichlorosilyl)hexane. The top-gate polymer transistors with thin gate dielectrics were operated at gate voltages less than ?8 V with a relatively high dielectric breakdown strength (>3 MV/cm) and a low leakage current (10–100 nA/mm² at 2 MV/cm). The yield of thin gate dielectrics in top-gate polymer FETs is correlated with the roughness of underlying semiconducting polymer film. High mobilities of 0.1–0.2 cm²/V s and on and off state current ratios of 10⁴ were achieved with the high performance semiconducting polymer, poly(2,5-bis(3-alkylthiophen-2yl)thieno[3,2-b]thiophene.     

Characterization of scaled MANOS nonvolatile semiconductor memory (NVSM) devices

We have modeled and characterized scaled Metal–Al₂O₃–Nitride–Oxide–Silicon (MANOS) nonvolatile semiconductor memory (NVSM) devices. The MANOS NVSM transistors are fabricated with a high-K (K_A = 9) blocking insulator of ALD deposited Al₂O₃ (8 nm), a LPCVD silicon nitride film (8 nm) for charge-storage, and a thermally grown tunneling oxide (2.2 nm). A low voltage program (+8 V, 30 μs) and erase (?8 V, 100 ms) provides an initial memory window of 2.7 V and a 1.4 V window at 10 years for an extracted nitride trap density of 6 × 10¹⁸ traps/cm³ eV. The devices show excellent endurance with no memory window degradation to 10⁶ write/erase cycles. We have developed a pulse response model of write/erase operations for SONOS-type NVSMs. In this model, we consider the major charge transport mechanisms are band-to-band tunneling and/or trap-assisted tunneling. Electron injection from the inversion layer is treated as the dominant carrier injection for the write operation, while hole injection from the substrate and electron injection from the gate electrode are employed in the erase operation. Meanwhile, electron back tunneling is needed to explain the erase slope of the MANOS devices at low erase voltage operation. Using a numerical method, the pulse response of the threshold voltages is simulated in good agreement with experimental data. In addition, we apply this model to advanced commercial TANOS devices.     

Study of the breakdown failure mechanisms for power AlGaN/GaN HEMTs implemented using a RF compatible process

The breakdown failure mechanisms for a family of power AlGaN/GaN HEMTs were studied. These devices were fabricated using a commercially available MMIC/RF technology with a semi-insulating SiC substrate. After a 10 min thermal annealing at 425 K, the transistors were subjected to temperature dependent electrical characteristics measurement. Breakdown degradation with a negative temperature coefficient of ?0.113 V/K for the devices without field plate was found. The breakdown voltage is also found to be a decreasing function of the gate length. Gate current increases simultaneously with the drain current during the drain-voltage stress test. This suggests that the probability of a direct leakage current path from gate to the 2-DEG region. The leakage current is attributed by a combination of native and generated traps/defects dominated gate tunneling, and hot electrons injected from the gate to channel. Devices with field plate show an improvement in breakdown voltage from ～40 V (with no field plate) to 138 V and with lower negative temperature coefficient. A temperature coefficient of ?0.065 V/K was observed for devices with a field plate length of 1.6 μm.     

A study of charge transport in a novel electroluminescent poly(phenylene vinylene-co-fluorenylene vinylene) based π-conjugated polymer

The charge transport properties in a novel electroluminescent poly{[2-(4′,5′-bis(3″-methylbutoxy)-2′-p-methoxy-phenyl)phenyl-1,4-phenylene vinylene]-co-(9,9-dioctyl-2,7-fluorenylene vinylene)} (BPPPV-PF) have been studied using a time-of-flight (TOF) photoconductivity technique. The TOF transients for holes were recorded over a range of temperatures (207–300 K) and electric fields (1.5 × 10⁵–6.1 × 10⁵ V/cm). The hole transport in this polymer was weakly dispersive in nature with a mobility at 300 K of 5 × 10⁻⁵ cm²/V s at 2.5 × 10⁵ V/cm. This increased to 8.4 × 10⁻⁵ cm²/V s at 6.1 × 10⁵ V/cm. The temperature and field dependence of charge mobility has been analyzed using the disorder formalisms (Bässler’s Gaussian disorder model (GDM) and correlated disorder model (CDM)). The fit with Gaussian disorder (GDM) model yielded the mobility pre-factor μ_∞ = 1.2 × 10⁻³ cm²/V s, energetic disorder parameter σ = 82 meV and positional disorder parameter Σ = 1.73. The average inter-site separation (a = 7 Å) and the charge localization length (L = 3.6 Å) was estimated by assuming the CDM type charge transport. The microscopic charge transport parameters derived for this polymer are almost identical to the reported values for fully conjugated polymers with high chemical purity. The results presented indicate that the charge transport parameters can be controlled and optimized for organic optoelectronic applications.     

Electrical properties of low-dielectric-constant films prepared by PECVD in O2/CH4/HMDSO

Low-dielectric constant (low-k) films have been prepared by plasma-enhanced chemical vapor deposition (PECVD) from hexamethyldisiloxane (HMDSO) mixed with oxygen or methane. The films are analyzed by ellipsometry, infrared absorption spectroscopy while their electrical properties are deduced from C–V, I–V and R–f measurements performed on Al/insulator/Si structures. For an oxygen and methane fraction equal to 50% and 22%, respectively, the dielectric constant and losses are decreased compared with those of the film prepared in a pure HMDSO plasma. The effect of adding 22% of CH₄ in HMDSO plasma increases the Si–CH₃ bonds containing in the polymer film and as the constant of methyl groups in the film increased the dielectric constant of the film decreases. For this film, the dielectric constant is 2.8, the dielectric losses at 1 kHz are equal to 2×10⁻³, the leakage current density measured for an electric field of 1 MV/cm is 3×10⁻⁹ A/cm² and the breakdown field is close to 5 MV/cm.     

A low voltage SANOS nonvolatile semiconductor memory (NVSM) device

In this paper, we present a new Polysilicon–Aluminum Oxide–Nitride–Oxide–Silicon (SANOS) device structure suitable for future nonvolatile semiconductor memories. Replacing SiO₂ with a high-K material, Al₂O₃ (K_f = 9) as the top blocking layer of the conventional SONOS device increases the electric field across the tunnel oxide, while reducing the electric field across the blocking layer with its dielectric constant during write and erase operations. Therefore, this new device can achieve lower programming voltages and faster programming speed than the conventional SONOS device. We have fabricated SANOS capacitors with 2 nm tunnel oxide, 5 nm silicon nitride and 8 nm aluminum oxide and studied the programming speed and charge retention characteristics of the new devices. These new SANOS devices achieve a 2 V reduction in the programming voltages with 2.1 V initial memory window.     

Interface and border trap relaxation in Si–SiO2 structures with Ge nanocrystals examined by transient capacitance spectroscopy

The formation of interface and border states in metal–oxide–semiconductor structures associated with the generation of embedded germanium nanocrystals in 20 nm SiO₂-layers by means of ion implantation and a subsequent annealing was examined. Deep level transient spectroscopy and related time-domain techniques were applied in order to study the charge trapping and emission at the Si–SiO₂ interface. A significant dependence of the interface state density D_it on the conditions of the cluster generation was found. Any Ge-implanted sample features a pronounced level at about 0.31 eV above the valence band edge and a concentration above 10¹³ cm^?2 eV^?1, likely related to a P_b-center. A systematic variation of the filling pulse parameters was utilized in order to separate the response of fast and slow states, and to substantiate the existence of border traps located in the vicinity of the Si–SiO₂ interface. The role of interface and border traps for the relaxation of the trapped charge in the nanocrystals is illustrated.     

New degradation mechanism observed for AlGaN/GaN HEMTs with sub 100 nm scale unpassivated regions around the gate periphery

AlGaN/GaN HEMTs with low gate leakage current in the μA/mm range have been fabricated with a small-unpassivated region close to the gate foot. They showed considerably higher critical voltage values (average VCR = 60 V) if subjected to step stress testing at OFF-state conditions and room temperature as compared to standard devices with conventional gate technology. This is due to the fact that electrons injected from the gate can be accumulated at the unpassivated region and thus builds up negative charge. The lower gate leakage is due to virtual gate formation, which is reducing local electric field in the vicinity of the gate. In contrast to devices with standard gate technology, degradation during step stressing is not associated with a simultaneous gate leakage and drain leakage current increase but with a strong increase of drain current at OFF-state conditions while the gate leakage is practically not affected. Then a relatively higher critical voltage of around 60 V is achieved. An abrupt increase of subthreshold drain current implies the formation of a conductive channel bypassing the gate region without influencing gate leakage. It is believed that hopping conductivity via point defects formed during device stressing creates this channel. Once this degradation mode takes place, the drain current of affected devices significantly drops. This can be explained by negative trap formation in the channel region affecting the total charge balance in 2DEG region. Electroluminescence measurements on both fresh and degraded devices showed no hot spots at OFF-state conditions. However, there is additional emission at ON-state bias, which suggests additional energetic states that lead to radiative electron transition effects in the degraded devices, most possibly defect states in the buffer.     

Constant current stress of lightly Al-doped Ta2O5

The response of lightly Al-doped Ta₂O₅ stacked films (6 nm) to constant current stress (CCS) under gate injection (current stress in the range of 1 to 30 mA/cm² and stressing time of 50–400 s) has been investigated. The stress creates positive oxide charge, which is assigned to oxygen vacancies but it does not affect the dielectric constant of the films. The most sensitive parameter to the stress is the leakage current. Different degradation mechanisms control the stress-induced leakage current (SILC) in dependence on both the stress conditions and the applied measurement voltage. The origin of SILC is not the same as that in pure and Ti- or Hf-containing Ta₂O₅. The well known charge trapping in pre-existing traps operates only at low level stress resulting in small SILC at accumulation. The new trap generation plays a key role in the SILC degradation and is the dominant mechanism controlling the SILC in lightly Al-doped Ta₂O₅ layers.     

Charge transport properties in liquid carbazole

The hole mobility in 9-(2-ethylhexyl)carbazole so-called liquid carbazole, in poly(N-vinylcarbazole) (PVK) and in their blends is determined by time-of-flight experiment using a phthalocyanine charge generation layer. With an applied electric field of 2.5 × 10⁵ V/cm, mobilities of 4 × 10⁻⁶ cm²/Vs and 6 × 10⁻⁷ cm²/Vs are measured in liquid carbazole and PVK, respectively. The enhancement of the charge carrier mobility in liquid carbazole is attributed to both a larger transfer integral and changes in the distribution of the excimer trapping sites. The results show the potential interest of liquid carbazole for electroactive applications in optoelectronics.     

A comparative study of electrical and optical properties of InN and In0.48Ga0.52N

We present results of our studies concerning electrical and optical properties of In_0.48Ga_0.52N and InN. Hall measurement were carried out at temperatures between T=77 and 300 K. Photoluminescence (PL) spectrum in InN and In_0.48Ga_0.52N. InN has a single peak at 0.77 eV at 300 K. However, the PL in In_0.48Ga_0.52N has two peaks; a prominent peak at 1.16 eV and a smaller peak at 1.55 eV. These two peaks are attributed to Indium segregation corresponding to a high Indium concentration of 48% and a low concentration of 36%. High electric field measurements indicate that drift velocity that tends to saturate at around V_d=1.0×10⁷ cm/s at 77 K in InN at an electric field of F=12 kV/cm. However, in In_0.48Ga_0.52N the I–V curve is almost linear up to an electric field of F=45 kV/cm, where the drift velocity is V_d=1.39×10⁶ cm/s. At applied electric fields above this value a S-type negative differential resistance (NDR) is observed leading to an instability in the current and to the irreversible destruction of the sample.     

Ionic self-assembled monolayer for low contact resistance in inkjet-printed coplanar structure organic thin-film transistors

To reduce the contact resistance in inkjet-printed organic thin-film transistors (OTFTs), the use of a newly synthesized ionic self-assembled monolayer (SAM) consisting of an anchoring group, a linker group, and an ionic functional group, is investigated. According to the gated transmission line method (TLM) measurements of a series of OTFT devices, where one type has no charge injection layer, another type having a pentafluorobenzenethiol (PFBT) injection layer, and a third type containing a (6-mercaptohexyl)trimethylammonium bromide (MTAB) ionic SAM, the latter exhibits the lowest contact resistance value of ∼3.1 K Ω cm. The OTFTs without charge injection layer and with the PFBT SAM have relatively higher contact resistance values of ∼6.4 K Ω cm and ∼5.0 K Ω cm, respectively. The reduced contact resistance in the OTFTs with ionic SAMs is attributed to the large charge carrier density induced by the ionic SAM, which allows sufficient tunneling-assisted injection of the carriers from the metal electrode to the polymer semiconductor. These results suggest that the use of appropriate ionic SAM injection layer is an effective way to reduce the contact resistance, hence improving the charge transport characteristics of inkjet-printed OTFTs.     

Investigation of TiO2 on AlGaAs prepared by liquid phase deposition and its application

The study explored titanium dioxide (TiO₂) on aluminum gallium arsenide (AlGaAs) prepared by liquid phase deposition (LPD) at 40 °C. The leakage current density was about 8.4 × 10^?6 A/cm² at 1 MV/cm. The interface trap density (D_it) and the flat-band voltage shift (ΔV_FB) were 2.3 × 10¹² cm^?2 eV^?1 and 1.2 V, respectively. After rapid thermal annealing (RTA) in the ambient N₂ at 350 °C for 1 min, the leakage current density, D_it, and ΔV_FB were improved to 2.4 × 10^?6 A/cm² at 1 MV/cm, 7.3 × 10¹¹ cm^?2 eV^?1, and 1.0 V, respectively. Finally, the study demonstrates the application to the AlGaAs/InGaAs metal–oxide–semiconductor pseudomorphic high-electron-mobility transistor (MOS-PHEMT). The results indicate the potential of the proposed device with a LPD-TiO₂ gate oxide for power application.