基于HCPL-7840的小信号隔离变送器

针对于市面上小信号隔离变送器普遍存在的电路复杂、线性度和抗干扰能力低的现状,用斩波稳零型运算放大器ICL7650、模拟型光电隔离放大器HCPL-7840和通用型运算放大器LM224构成的小信号隔离变送电路,实现了0~75 mV的直流输入到0~10 V直流输出。用脉宽调制(PWM)集成电路TL494、脉冲变压器和各集成稳压器构成的系统隔离供电电路,实现了输入、输出、电源三方隔离。实验结果表明:该变送器电路简洁,高线性,响应快,隔离效果好,抗干扰能力强,输出信号质量较高,满足小信号采集变送的要求,具有一定的实用性和推广价值。     

线性光耦HCNR201原理及其在轴承故障检测中的应用

因铁路货车轴承故障检测现场工况复杂,各种电磁干扰信号极易随被测信号进入测量系统.针对这个问题,设计了用高线性度模拟光耦HCNR201和运算放大器实现的电压隔离硬件电路.该电路中,线性光耦的前端用一个运算放大器构成一个负反馈放大器,用来检测模拟电压信号;线性光耦后端的运算放大器进行电流与电压之间的转换,最终输出电压信号,实现电压信号的1：1隔离传输.实验结果表明：该方法测量电压线性度好、精度高.     

一种含理想运算放大器电路的讨论

为进一步明确含理想运算放大电路的有关概念和运算放大器的特性,本文从计算机仿真和理论分析两个方面,对一个含理想运算放大器电路的输入输出特性进行了模拟和推导.结果表明该电路在线性输入范围内是一电压跟随器,若超出线性输入范围,则输出波形严重失真;带反馈电路与开环电路相比较表现为线性输入范围扩大、电压增益减小,而这正是电路负反馈的特性.因此,不能简单的把接在运算放大器同相输入端的反馈视为正反馈.     

高线性度低功耗的4阶开关电容低通滤波器

介绍了一种应用于传感器的高线性度低功耗全差分4阶贝塞尔开关电容滤波器.该滤波器的运算放大器为输出AB类运算放大器,通过AB类运算放大器以及开关电容共模反馈的设计,降低了功耗.在运算放大器中设计了线性跨导环,并通过对电路的拓扑结构进行优化,提高了滤波器的线性度.测试结果表明,在采样频率为1 MHz下,该滤波器的截止频率为10.05 kHz.在输入信号频率为1 kHz,输出信号的总谐波失真(THD)为-89 dB(摆幅为2 V),功耗为5.54 mW,达到了高线性度、低功耗的设计要求.     

一个低噪声轨到轨输入输出范围的运算放大器

设计了一个轨到轨输入输出范围的低噪声运算放大器.在输入级采用电流补偿的方法来稳定该运算放大器在整个输入共模范围内的跨导,在输出级使用AB类的输出方法来提高运算放大器的输出范围,并运用双极晶体管比较低的闪烁噪声来改善该运算放大器的噪声性能,以此提高该运算放大器的动态范围.     

基于运算放大器的前置电路误差分析及补偿

在信号调理电路中,运算放大器是信号调理电路的核心器件.零漂、温漂和共模电压等变化会引起输出误差,如果输入信号中混有噪声或运算放大器固有噪声过大,高精度ADC(Analog-to-Digital Convertor)就失去了意义.基于上述原因,文中提出一种补偿电路设计方法,该电路选型Ti公司的OPA192精密运算放大器,...     

轨到轨输入输出范围运算放大器的噪声分析和优化

这篇文章设计了一个轨到轨（Rail-to-Rail）输入输出范围的低噪声运算放大器,在输入级采用电流补偿的方法来稳定该运算放大器在整个输入共模范围内的跨导,在输出级使用了AB类的输出方法来提高运算放大器的输出范围,且详细分析了该运算放大器的噪声性能,在此基础上给出了改善该运算放大器噪声性能的方法,以此来提高该运算放大器的动态范围。     

一种轨对轨CMOS运算放大器的设计

基于0.6μmCMOS工艺,设计了一种轨对轨运算放大器。该运算放大器采用了3.3V单电源供电,其输入共模范围和输出信号摆幅接近于地和电源电压,即所谓输入和输出电压范围轨对轨。该运放的小信号增益为77dB,单位增益带宽为4.32MHz,相位裕度为79°。由于电路简单,工作稳定,输入输出线性动态范围宽,非常适合于SOC芯片内集成。     

一种高线性宽带CMOS全差分放大器

设计了一种高线性度的宽带CMOS全差分放大器,输入级采用带有电阻共模负反馈的差分电路,输出级则由推挽跨导运算放大器及其反馈环路组成.采用输入级源退化电阻及输出级负反馈技术,使得差分输出峰峰值为1 V时三阶谐波失真达到-60 dB.同时利用反馈环路中反馈电容的欠阻尼滞后补偿作用,使放大器的带宽增大了15%.测试结果表明,在0.25 μmCMOS工艺下,该放大器-3 dB带宽达到150 MHz,噪声系数小于14 dB.     

二极管型非制冷红外探测器的前端电路设计

设计了一种二极管型非制冷红外探测器的前端电路,该电路采用Gm-C-OP积分放大器的结构,将探测器输出的微弱电压信号经跨导放大器(OTA)转化为电流信号,再经电容反馈跨阻放大器(CTIA)积分转化为电压信号输出。该OTA采用电流反馈型结构,可以获得比传统OTA更高的线性度和跨导值。输入采用差分结构,可以有效地消除环境温度及制造工艺对探测器输出信号的影响。电路采用0.35 m CMOS工艺进行设计并流片,5 V电源电压供电。Gm-C-OP积分放大器总面积0.012 6 mm2,当输入差分电压为0~5 mV时,测试结果表明:OTA跨导值与仿真结果保持一致,Gm-C-OP积分放大器可实现对动态输入差分信号到输出电压的线性转化,线性度达97%,输出范围大于2 V。     

WZP型铂电阻温度传感器Pt1000信号的线性化处理

在分析工业生产和科学研究中广泛使用的WZP型铂电阻温度传感器Pt1000输出特性的基础上,采用恒流源的方法,通过在运放同相输入端增加调整电压、增加输出级放大电路、在电路中设置可变电阻、使用高精度稳压电源等措施,设计出温度传感器Pt1000信号处理综合电路,该电路有效解决了温度传感器信号变换过程中的非线性和信号补偿问题。     

A differential-input,differential-output current mode operational amplifier

A current operational amplifier with differential input and differential output is described. The amplifier is based on the parallel connection of a CCII+ current conveyor and a CCII? current conveyor followed by a differential output transconductance gain stage. The performance of the amplifier is analysed and experimental results obtained from an implementation using standard operational amplifiers and current mirrors realized using transistor arrays are presented and compared to the theoretical analysis. It is concluded that the static small signal open loop gain and the frequency response matches the performance of conventional voltage operational amplifiers. The input offset and bias errors and the common mode rejection are shown to be strongly dependent on the matching accuracy of the current mirrors used in the conveyors. The proposed configuration can easily be integrated into a monolithic amplifier in either CMOS or bipolar technology.     

A high-frequency fully differential BiCMOS operational amplifier

A high-frequency fully differential BiCMOS operational amplifier design for use in switched-capacitor circuits is presented. The operational amplifier is integrated in a 3.0-GHz, 2-μm BiCMOS process with an active die area of 1.0 mm×1.2 mm. This BiCMOS op amp offers an infinite input resistance, a DC gain of 100 dB, a unity-gain frequency of 90 MHz with 45° phase margin, and a slew rate of 150 V/μs. The differential output range is 12 V. The circuit is operated from a ±5-V power supply and dissipates 125 mW. The op amp is unity-gain stable with 7 pF of capacitive loading at each output. The op amp is a two-stage, pole-split frequency compensated design that uses a PMOS input stage for infinite input resistance and an n-p-n bipolar second stage for high gain and high bandwidth. The frequency compensation network serves both the differential- and common-mode amplifiers so the differential- and common-mode amplifier dynamics are similar. A dynamic switched-capacitor common-mode feedback scheme is used to set the output common-mode level of the first and second stages     

Amplifier linearization using RF feedback and feedforwardtechniques

The performance of feedback as a distortion reduction technique is highly dependent on the integrity of the feedback path. Any error or noise generated in this path is directly reflected into the output of the amplifier. Linearized RF power amplifiers (PAs) using Cartesian feedback require a demodulator in the feedback loop, and this is a potential source of linear errors, nonlinear errors, and noise. RF feedback with Cartesian compensation is proposed as a technique for overcoming some of these problems. The scheme is most suited to systems requiring an RF input. In addition, the RF nature of the input, feedback, and error signals enables the addition of a feedforward loop to further improve the linearization capability while still maintaining good efficiency. Design equations and simulation results are given for such a system. Disadvantages include the limited bandwidth (estimated at 1 MHz) and the need for additional circuits to generate the RF input signal when included in an integrated transmitter     

Output stage for current-mode feedback amplifiers,theory and applications

A novel building block is described, termed FCS (floating current source), which may serve as class A output stage for CFAs (current-mode feedback amplifiers). It is capable of driving a grounded load with a bipolar signal, and yields a feedback current equal to the output current over a wide frequency range. Its possible range of application covers MOSFET amplifiers employed in analog signal processing and current-operated control systems. An internal interconnection converts the FCS into a CCII-. Another novel CCII- configuration employs a push-pull folded cascode and may serve as noninverting input stage for a standard amplifier configuration. Finally, a feedback-stabilized CCII- and a CFA are described, both employing the FCS as output stage.     

1-V rail-to-rail operational amplifiers in standard CMOS technology

The constraints on the design of CMOS operational amplifiers with rail-to-rail input range for extremely low supply voltage operation, are addressed. Two design approaches for amplifiers based on complementary input differential pairs and a single input pair, respectively, are presented. The first realizes a feedforward action to accommodate the common-mode (CM) component of the input signals to the amplifier input range. The second approach performs a negative feedback action over the input CM signal. Two operational amplifiers based on the proposed approaches have been designed for 1-V total supply operation, and fabricated in a standard 1.2-μm CMOS process. Experimental results are provided and the corresponding performances are discussed and compared     

信号源内阻对负反馈放大器反馈深度的影响

负反馈放大器反馈深度与信号源内阻关系是一个易被误解的问题。本文在讨论负反馈放大器输出量对输入量调节控制作用的基础上．从闭环源电压增益的角度定量分析了信号源内阻对串联负反馈放大器和并联负反馈放大器反馈深度影响的重要问题,并在此基础上,对信号源内阻对负反馈放大器反馈深度的影响进行了物理解释。     

Technique for offset voltage cancellation in MOS operational amplifiers

A novel technique for the continuous-time removal of the input offset voltage in operational amplifiers is presented. This scheme converts a conventional op-amp into a similar differential-in/differential-out op-amp with zero differential input offset voltage. The nonzero common-mode input offset voltage can be isolated using a sampled-data time-averaging technique and minimised by negative feedback.     

A dual-path bandwidth extension amplifier topology with dual-loop parallel compensation

A dual-path amplifier topology with dual-loop parallel compensation technique is proposed for low-power three-stage amplifiers. By using two parallel high-speed paths for high-frequency signal propagation, there is no passive capacitive feedback network loaded at the amplifier output. Both the bandwidth and slew rate are thus significantly improved. Implemented in a 0.6-/spl mu/m CMOS process, the proposed three-stage amplifier has over 100-dB gain, 7-MHz gain-bandwidth product, and 3.3-V//spl mu/s average slew rate while only dissipating 330 /spl mu/W at 1.5 V, when driving a 25-k/spl Omega///120-pF load. The proposed amplifier achieves at least two times improvement in bandwidth-to-power and slew-rate-to-power efficiencies than all other reported multistage amplifiers using different compensation topologies.     

A new nonlinear model of EMI-induced distortion phenomena in feedback CMOS operational amplifiers

This paper deals with distortion phenomena induced by radio-frequency interference (RFI) in analog integrated circuits and it concentrates on the effects induced by RFI on the operation of feedback CMOS operational amplifiers (opamps). In particular, the paper describes a new nonlinear model, which makes possible the prediction of upset in the opamp output nominal signal when RFI is superimposed on the input nominal signals. Such a model can be employed when the transistors of the input differential pair are driven by RFI either in strong or weak nonlinear operation. Results of experimental tests performed on a Miller CMOS opamp connected in the voltage follower configuration are presented and compared with model predictions.