Planar defects in 4H-SiC PiN diodes

Using plan-view transmission electron microscopy (PVTEM), we have identified stacking faults (SFs) and planar defects in 4H-SiC PiN diodes subjected to electrical bias. Our observations suggest that not all planar defects seen in the PiN diodes are SFs. By performing diffraction-contrast imaging experiments using TEM, we can distinguish SFs from other planar defects. In addition, high-resolution TEM (HRTEM) imaging and analytical TEM have revealed that some planar defects consist of a 3-nm-wide SiC amorphous layer. Many of these planar defects are orientated parallel to {1 00} planes, whereas others are roughly parallel to the (0001) plane. The appearance of these planar defects suggests that they are grain boundaries.     

Stacking-fault formation and propagation in 4H-SiC PiN diodes

Stacking-fault growth in SiC PiN diodes has been examined using light-emission imaging and stressing at 80 A/cm² and 160 A/cm². Dark areas in the emission develop because of stacking faults and the current capability of the diode drops. More detailed images are produced by reducing the current by a factor of 1000. The low-current images are bright lines at dislocations bounding the stacking faults and at or near the stacking-fault intersection with the surface. Stacking faults nucleate 1–2 μm below the surface. Most, but not all, continue growing until they span the diode. Growth dynamics and their dependence on the current density are discussed. An erratum to this article is available at .     

Preferential etching of dislocations and stacking faults in gallium phosphide

A combination of optical microscopy and transmission electron microscopy has been used to provide direct evidence that pits formed by the action of a solution of 3 HF:1 H₂O₂ on epitaxial and substrate GaP material close to the (001 ) orientation are associated with dislocations. The formation of different pit shapes can be correlated with previous work on etch pits in GaP, namely the formation of D and S pits. Grooves have been produced on certain crystallographic orientations which are associated with certain types of stacking faults. It is now possible to use this etch for a direct count of the dislocation density in (001) GaP and to indicate the extent of stacking faults.     

Drift-free 10-kV, 20-A 4H-SiC PiN diodes

As impressive as the advancement in 4H-SiC material quality has been, 4H-SiC PiN diodes continue to suffer from irreversible, forward-voltage instabilities. In this work, we describe PiN diodes designed to block 10 kV and conduct 20 A at less than 4.5 V, which were fabricated on 4H-SiC PiN epitaxial layers that were grown with an innovative epitaxial process that has been developed specifically to suppress V_F drift. The diodes fabricated on epitaxial layers that implemented this new epitaxy process showed excellent V_F stability, with 86% of the diodes drifting less than 0.1 V during forward current stressing at 10 A (50 A/cm²) for 30 min. However, these improvements in V_F drift come with a cost in blocking yield, as the surface morphology and other crystal defects imparted by the epitaxial process resulted in only 1 of 50 diodes reaching the 10-kV blocking specification. Nevertheless, the remarkable progress in V_F drift yield brings us closer to commercialization of high-power 4H-SiC PiN diodes.     

Study on stacking faults and microtwins in wide bandgap II-VI semiconductor heterostructures grown on GaAs

ZnMgSSe and ZnSSe layers grown on GaAs substrates with GaAs buffer layers by molecular beam epitaxy have been examined by transmission electron microscopy (TEM). The depth level at which paired triangular stacking faults are nucleated in the ZnMgSSe/GaAs heterostructure has been investigated by using the plan-view TEM technique. It has been found that in the ZnMgSSe/GaAs heterostructure the nucleation of the paired stacking faults occurs within a range of depth which starts at the II-VI/GaAs interface and ends at a level that is above the interface by about 120 nm. The dominant type of defects in ZnSSe layers, which have the single triangular shape, has been identified to be microtwins by high resolution TEM.     

碳化硅MPS:新一代功率开关二极管

碳化硅MPS(Merged PiN Schottky diode)具有很好的开关特性，并具有PiN二极管高阻断电压、低漏电流和SBD小开启电压，大导通电流以及高开关速度的优点，是最有希望的新一代功率开关二极管。文章系统地介绍了碳化硅MPS的结构和性能。理论和实验分析表明，碳化硅材料的优异性能与MPS结构的优势相结合，是当今功率开关管发展的趋势。     

Analysis of bulk and surface components of leakage current in 4H-SiC PiN MESA diodes

The leakage current in circular- and ring-shaped epitaxial 4H-SiC PiN mesa diodes with different size and periphery to area ratios was evaluated under the influence of the UV irradiation and temperature in the range from room temperature (RT) to 250 °C. The surface leakage current component was found to dominate the reverse current characteristics and was found to be dependent on time and temperature both after reactive ion etching (RIE) of the diodes in the SF₆/Ar gas mixture and after the UV irradiation. Charging of the surface states is believed to be responsible for the observed behavior. The UV irradiation is believed to charge the surface positively. The drift of the I(V) characteristics is due to the trapping of the electrons neutralizing the positive donor states.     

Defect Analysis of Barrier Height Inhomogeneity in Titanium 4H-SiC Schottky Barrier Diodes

Over 350 4H-SiC Schottky barrier diodes (SBDs) of varying size are characterized using current–voltage (I–V) measurements, with some also measured as a function of temperature. Devices display either a characteristic single-barrier height or atypical dual-barrier heights. Device yields are shown to decrease as device area increases. Molten KOH etching is used to highlight defects for analysis by optical microscopy and atomic force microscopy. The I–V characteristics are compared against the defect density. A positive correlation between effective barrier height and effective electrically active area of the SBDs is found. No correlation is found between threading dislocations and ideality factor or barrier height.     

Influence of operation conditions on true-static DC characteristics and on electro-thermal transient states in silicon carbide Merged PiN Schottky diodes.

In this paper, measured and calculated non-isothermal DC characteristics of silicon carbide MPS devices are investigated, with special attention paid on critical parameters, such as maximum current and junction temperature at which a thermal runaway may occur. Electro-thermal transient states in single MPS devices (forward surge current tests) and in the simple Greatz rectifier are simulated and compared to measurements. Various electro-thermal models of SiC SBDs, with a simplified, effective procedure for calculations of junction temperature are proposed.     

Experimental characterization and numerical analysis of the 4H-SiC p-i-n diodes static and transient behaviour

Steady-state and turn-off switching characteristics of aluminium-implanted 4H-SiC p-i-n diodes designed for high-current density operation, are investigated experimentally and by mean of numerical simulations in the 298-523 K temperature range. The diodes present circular structure with a diameter of 350 μm and employ an anode region with an aluminium depth profile peaking at 6×10¹⁹ cm⁻³ at the surface. The profile edge and the junction depth are located at 0.2 and 1.35 μm, respectively. At room temperature the measured forward current density is close to 370 A/cm² at 5 V with an ideality factor always less than 2 before high-current injection or device-series resistance became dominant. The transient analysis reveals a strong potential of this diodes for use in high-speed, high-power applications, especially at high temperature, with a very low turn-off recovery time (<80 ns) in the whole range of test conditions. The simulated results match the experimental data, showing that the switching performance is mainly due to the poor minority charge carrier lifetime estimated to be 15 ns for these implanted devices.     

High doped MBE Si p–n and n–n heterojunction diodes on 4H-SiC

The physical and electrical properties of heavily doped silicon (5×10¹⁹ cm⁻³) deposited by molecular beam epitaxy (MBE) on 4H-SiC are investigated in this paper. Silicon layers on silicon carbide have a broad number of potential applications including device fabrication or passivation when oxidised. In particular, Si/SiC contacts present several atractive material advantages for the semiconductor industry and especially for SiC processing procedures for avoiding stages such as high temperature contact annealing or SiC etching. Si films of 100 nm thickness have been grown using a MBE system after different cleaning procedures on n-type (0 0 0 1) Si face 8° off 4H-SiC substrates. Isotype (n–n) and an-isotype (p–n) devices were fabricated at both 500 and 900 °C using antimonium (Sb) or boron (B), respectively. X-ray diffraction analysis (XRD) and scanning electronic mircorscope (SEM) have been used to investigate the crystal composition and morphology of the deposited layers. The electrical mesurements were performed to determine the rectifiying contact characteristics and band offsets.     

Nucleation, growth and retrogrowth of oxidation induced stacking faults in thin silicon-on-insulator

The nucleation, growth, and retrogrowth of stacking faults were investigated for thermally oxidized silicon-on-insulator substrates formed by the separation by implanted oxygen (SIMOX) method. It has been observed that for high oxidation temperatures (T >1150°C) oxidation induced stacking faults (OISFs) undergo a retrogrowth (shrinkage) process at noticeably lower temperatures than in bulk silicon. The retrogrowth process in thin film SIMOX substrates starts at approximately 1190°C for the 2 h thermal oxidations. In this paper, a model for the retrogrowth process is proposed based on the assumption that at high oxidation temperatures vacancies may be injected from the thermal oxide/top silicon interface. We suggest that the vacancy injection reduces the self-interstitial supersaturation and as a direct consequence, attenuates the OISF growth. We also propose that the self-interstitial supersaturation is reduced through point defect recombination inside the silicon overlayer and at the top-silicon/buried-oxide interface where a high density of steps and kink sites are found.     

The electrical characteristics of 4H-SiC schottky diodes after inductively coupled plasma etching

The electrical characteristics of metal contacts fabricated on 4H-SiC have been investigated. Sputtered nickel ohmic contacts have been successfully produced on untreated 4H-SiC substrates and 4H-SiC surfaces cleaned with aggressive chemicals and ion sputtering. The current-voltage (I–V) characteristics of asdeposited contacts are observed to be nonohmic on all surfaces. After annealing at 1,000°C in a N₂ atmosphere, the contacts are seen to become ohmic with considerably less annealing time being required for the samples exposed to aggressive cleaning stages. Schottky diodes were then produced on the silicon carbide (SiC) surface after etching in an SF₆/O₂ inductively coupled plasma (ICP) for 3 min at varying substrate bias voltages and also on an untreated surface used as a control sample. The ideality factors of all diodes formed on the etched surfaces increased in comparison to the control sample. The highest ideality factor was observed for the diodes produced after etching at −0-V and −245-V bias voltage. A two-diode and resistor model was applied to the results that successfully accounted for the excess leakage paths. The defect density of each SiC surface was calculated using both the measured and the simulated ideality factors. An annealing stage was successful at reducing the ideality factors of all the diodes formed. The defect density calculated using the measured ideality factors of the annealed diodes was seen to have been reduced by an order of magnitude.     

Gaussian distribution of inhomogeneous barrier height in tungsten/4H-SiC (000-1) Schottky diodes

The Gaussian distribution model have been used to analyze the anomalies observed in tungsten (W)/4H-SiC current voltage characteristics due to the barrier inhomogeneities that prevail at the metal-semiconductor interface. From the analysis of the forward I-V characteristics measured at elevated temperatures within the range of 303-448 K and by the assumption of a Gaussian distribution (GD) of barrier heights (BHs), a mean barrier height of 1.277 eV, a zero-bias standard deviation σ₀ = 0.092 V and a factor T₀ of 21.69 K have been obtained. Furthermore the modified Richardson plot according to the Gaussian distribution model resulted in a mean barrier height and a Richardson constant (A^∗) of 1.276 eV and 145 A/cm² K², respectively. The A^∗ value obtained from this plot is in very close agreement with the theoretical value of 146 A/cm² K² for n-type 4H-SiC. Therefore, it has been concluded that the temperature dependence of the forward I-V characteristics of the W/4H-SiC contacts can be successfully explained on the basis of a thermionic emission conduction mechanism with Gaussian distributed barriers. In addition, a comparison is made between the present results and those obtained previously assuming the pinch-off model.     

Susceptor effects on the morphological and impurity properties of 4H-SiC epilayers

The morphological and impurity properties of 4H-SiC epilayers grown using graphite susceptors coated with vitreous carbon, SiC, TaC, and NbC were compared. Metal carbide coated susceptors produced epilayers with smooth morphologies and no thick backside polycrystalline SiC deposition. Epilayers grown using metal carbide coated susceptors possessed more than 10 times higher intentional N₂ doping efficiencies and more than 10 times lower unintentional Al concentrations compared to epilayers grown using vitreous carbon coated susceptors. Metal carbide coated susceptors permitted doping control and abrupt p.n. junctions, and possessed more than 10 times longer lifetimes compared with vitreous carbon or SiC coated susceptors.     

Effects of shock-induced defect density on flux pinning in melt-textured YBa2Cu3O7−δ

To introduce a high density of homogeneously distributed defects in YBa₂Cu₃O_7−δ (Y123), melt textured samples were shock-compacted at pressures up to 12.6 GPa (126 Kbar) at orientations favorable to slip along the basal planes.¹ Shock compressing melt-textured Y123 results in a nearly uniform detect density which is two to three orders of magnitude higher than in unshocked melt-textured material. However, the intergranular critical current density in bulk samples (J_c ^b) decreases by two orders of magnitude in the as-shocked state. This decrease in J_c ^b is attributed to microfractures. However, if the shocked disk is annealed in O₂ then ground, sieved, and magnetically aligned, J_c for H τ c-axis (J_c ^ab) is enhanced two to three times over the unshocked value. This indicates that the increase in dislocations density does increase flux-pinning.     

CHF3-O2 reactive ion etching of 4H-SiC and the role of oxygen

Reactive ion etching of 4H-SiC was performed using a CHF₃-O₂ plasma. The etch rate and mean surface roughness were investigated as a function of the ratio of the O₂ flow rate to the total gas flow rate. It was found that oxygen plays an indirect role in contributing to the etching of SiC. An optimum O₂ fraction of 20% was found to give a maximum etch rate of 35 nm/min. On the other hand, the root-mean-square (RMS) surface roughness was found to increase from 1.31 to 2.34 nm when the O₂ fraction increased from 0% to 80%. Auger electron spectroscopy results for the samples etched at the optimum condition of 20% O₂ fraction revealed the presence of oxygen on the etched surface in a form of an oxide-like layer (SiO_x). No carbon residue (carbon rich-layer) and aluminum were found. Based on our results, the role of O₂ in the reactive ion etching of 4H-SiC will be presented.     

Electron microscopic study on residual defects of Al+ or B+ implanted 4H-SiC

The residual defects of Al⁺- or B⁺-implanted 4H-SiC were studied in combination with annealing temperature and implantation temperature using cross-sectional transmission electron microscopy technique. Noticeable defects structure is not observed before post-implantation annealing. But after annealing, a lot of black spots appear in the implanted layer. These black spots are composed of a dislocation loop, parallel to {0001} of 4H-SiC, and strained area at the upper and lower sides of the dislocation loop. This defect structure and its size do not depend on implantation temperature and implanted ion species. The size of defect area depends only on post-implantation annealing temperature. The size grows, when post-annealing temperature is raised.     

Effect of hydrogen etching and subsequent sacrificial thermal oxidation on morphology and composition of 4H-SiC surfaces

The effects of solvent cleaning, hydrogen etching, and additional oxidation treatment of 4H-SiC off-axis surfaces were investigated. The morphology of the resulting surfaces was observed by atomic force microscopy (AFM), and the chemical composition was studied by x-ray photoelectron spectroscopy (XPS). It is confirmed that simple cleaning and hydrofluoric acid (HF) etching procedures do not yield smooth surfaces, although the surfaces show mainly SiC-like bonds. High-temperature hydrogen etching can effectively remove polishing scratches, leading to a very smooth morphology, but it leaves some residual graphitic-bound carbon behind. It is shown that a subsequent oxidation step not only removes residual graphite on the hydrogen-etched surface but also produces the same chemical composition on all treated surfaces.