存内计算芯片研究进展及应用

随着数据快速增长,冯诺依曼架构内存墙成为计算性能进一步提升的关键瓶颈。新型存算一体架构(包括存内计算(IMC)架构与近存计算(NMC)架构),有望打破冯诺依曼架构瓶颈,大幅提高算力和能效。该文介绍了存算一体芯片的发展历程、研究现状以及基于各类存储器介质(如传统存储器DRAM, SRAM和Flash和新型非易失性存储器ReRAM, PCM, MRAM, FeFET等)的存内计算基本原理、优势与面临的问题。然后,以知存科技WTM2101量产芯片为例,重点介绍了存算一体芯片的电路结构与应用现状。最后,分析了存算一体芯片未来的发展前景与面临的挑战。     

基于MEMS谐振器硬件储备池计算的类脑信号处理方法

近年来兴起的人工神经网络由于具有较强的自学习适应性和并行信息处理能力,从而在信号处理领域显示出巨大潜力。储备池计算是一种由递归神经网络衍生而来的类脑神经形态计算范式,对随时间变化的连续信号具有非常好的分类和时序预测能力。本论文提出利用MEMS(Micro-Electro-Mechanical System)梁谐振器的非线性响应特征,设计并搭建了两种储备池计算的拓扑架构。此外,面向雷达信号处理中信号预测、图像识别、雷达信号特征分类和提取等应用需求,针对性地选择了NARMA(Nonlinear Auto Regressive Moving Average Equation of Order)预测任务、MNIST(Mixed National Institute of Standards and Technology)-手写数字图像识别、LFM(Linear frequency modulated)脉冲波形识别与特征提取等测试任务对论文所提两种不同储备池计算架构进行试验验证。同时,实验结果也充分展示了基于非线性MEMS谐振器的储备池计算硬件系统在雷达信号预测、分类与特征提取等应用领域中的应用...     

FinFET CMOS logic gates with non-volatile states for reconfigurable computing systems

A series FinFET based non-volatile logic gates with multiple logic functions defined by embedded non-volatile states are proposed for the first time and demonstrated in advanced CMOS technology platform. The device channels in the proposed CMOS logic gate is controlled by a metal floating gate coupled by slot contacts uniquely available in the FinFET process employed in this study. The new logic gate with non-volatile states only enable reconfiguration ability in a Boolean computing unit at a gate level aimed for adaptive and specialized systems in the AI era. Furthermore, the extended applications in tunable ring oscillators for multi-functional IOT modules are successfully demonstrated in this study.     

Metrology Challenges for Emerging Research Devices and Materials

As silicon complimentary metal-oxide-semiconductor (CMOS) technology approaches its limits, new device structures and computational paradigms will be required to replace and augment standard CMOS devices for ULSI circuits. These possible emerging technologies span the realm from transistors made from silicon nanowires to heteroepitaxial layers for spin transistors to devices made from nanoscale molecules. One theme that pervades these seemingly disparate emerging technologies is that the electronic properties of these nanodevices are extremely susceptible to small perturbations in structural and material properties such as dimension, structure, roughness, and defects. The extreme sensitivity of the electronic properties of these devices to their nanoscale physical properties defines a significant need for precise accurate metrology. This paper will describe some of the most critical metrology required to characterize materials and devices in the research and exploratory stage and how these requirements would potentially change if these research devices were to start into a technology development effort     

An Overview of Non-Volatile Flip-Flops Based on Emerging Memory Technologies

Low power consumption is a major issue in nowadays electronics systems. This trend is pushed by the development of data center related to cloud services and soon to the Internet of Things (IoT) deployment. Memories are one of the major contributors to power consumption. However, the development of emerging memory technologies paves the way to low-power design, through the partial replacement of the dynamic random access memory (DRAM) with the non-volatile stand-alone memory in servers or with the embedded or distributed emerging non-volatile memory in IoT objects. In the latter case, non-volatile flip-flops (NVFFs) seem a promising candidate to replace the retention latch. Indeed, IoT objects present long sleep time and NVFFs offer to save data in registers with zero power when the application is idle. This paper gives an overview of NVFF architecture flavors for various emerging memory technologies.     

Energy Efficient Resource Scheduling Using Optimization Based Neural Network in Mobile Cloud Computing

The mobile cloud computing has become an emerging technology where the mobile computing is integrated with cloud computing to process the mobile data. Besides the advantages of mobile cloud computing, there are some issues which include power consumption, resource scarcity, quality of service, security and computational cost. In this paper, in order to minimize total power consumption with better performance, the neural network based optimization methods using artificial neural network and convolutional neural network models were implemented by varying variance and loudness. From the experimental results it is observed that, by using optimization in the neural network, the power consumption has been reduced by 53.68% and obtained improvement using convolutional neural network which further reduced the power consumption by 30.3% with minimum root mean square error compared with other algorithms.

     

基于计算机视觉边缘计算与算力网络的智慧园区应用研究

智慧园区是当下城市化发展的重要部分，而应用计算机视觉技术、边缘计算技术和算力网络技术，是建设智慧园区的重要手段。文中对基于计算机视觉边缘计算与算力网络的智慧园区应用进行了研究和探讨。首先，介绍了智慧园区的概念及其发展现状，接着详细阐述了计算机视觉、边缘计算和算力网络的基本原理和特点，重点介绍了基于这些技术实现的智慧园区应用场景，包括安防监控、智能停车、环境监测等，最后对未来智慧园区的发展趋势和研究方向进行了展望。     

L2imbo: A distributed systems platform for mobile computing

Mobile computing environments increasingly consist of a range of supporting technologies offering a diverse set of capabilities to applications and end-systems. Such environments are characterised by sudden and dramatic changes in the quality-of-service (QoS) available to applications and users. Recent work has shown that distributed systems platforms can assist applications to take advantage of these changes in QoS and, more specifically, facilitate applications to adapt to their environment. However, the current state-of-the-art in these platforms reflects their fixed network origins through their choice of synchronous connection-oriented communications paradigms. In this paper we argue that these paradigms are not well suited to operation in the emerging mobile environments. Furthermore, we offer an alternative programming paradigm based on tuple spaces which, we believe, offers a number of benefits within a mobile context. The paper presents the design, implementation and evaluation of a new platform based on this paradigm. This revised version was published online in June 2006 with corrections to the Cover Date.     

Functions classification approach to generate reconfigurable fine-grain logic based on Ambipolar Independent Double Gate FET (Am-IDGFET)

Am-IDGFET is a new family of particular devices in view of the fact that it associates three benefits: (i) it is usually a 1-D electronic device (CNT or SiNW), meaning high mobility, achievable current density and high I_ON/I_OFF ratio; (ii) Independently controlled gates which offers the device extra logic options; (iii) ambipolar behaviour opens the way for N- and P-type polarities in the same device via its back gate. The creativity of this work consists of looking at this new class of emerging technology as an opportunity for new design paradigms with no equivalent counterparts in CMOS technology. Nevertheless, to build a feasible and complete picture of ambipolar logic, innovative design approaches and tools are required. In this paper, we exploit functional classification, a powerful tool for the construction and analysis of Boolean functions, to build reconfigurable logic blocks by defining a hierarchical correlation between structures of functions classes with ambipolar devices. We demonstrate how this approach enables us to build Am-I DGFET-based n-input reconfigurable cells. Several dynamically reconfigurable 2-inputs logic cells with partial and full functionality are designed in this paper. We evaluate the performances of circuits designed from this approach in a case study focused on Double Gate Carbon Nanotube FET (DG-CNTFET) technology. Simulations results show efficiency to build fine grain reconfigurable cells with partial functionality. In the case of 9-functions reconfigurable cell, an improvement of 1.8X in terms of power delay product (PDP) is proved when compared to a CMOS-16 nm technology. Fewer control signals are required and the area is reduced by 35% over CMOS technology.     

A novel cost optimization method for mobile cloud computing by dynamic processing of demands based on their power consumption

Mobile cloud computing (MCC) is an emerging technology that is introduced to combat the existing limitations in mobile computing such as constrained energy and storage. MCC enables mobile users to perform their tasks in the operator cloud and benefit from the offered services. On the other hand, operators are required to decrease their costs to stay in the competitive market. In this paper, we propose a method to reduce the cost of power consumption and increase the profit of 4G/5G network operators delivering MCC services. We propose an online method that is based on dynamic processing of mobile users’ demands based on their power consumption in the cloud, called Dyn-PDPC. In this algorithm, the power consumption of demands is estimated based on event counters, and demands are classified and processed accordingly. Unlike the offline methods, the proposed online method can be implemented with the existing information and there is no need for prior knowledge. We also present an extended version of Dyn-SP algorithm, in which we had an unrealistic assumption about the energy consumption of demands. In Dyn-PDPC, by using control parameters, when the electricity price is low, demands with high power consumption are processed, and then the low power-consumption demands are processed. Similarly, when the electricity price is high, demands with low power consumption are processed at first. Simulation results demonstrate that the proposed algorithm has more accuracy, and more reduction in long-term cost compared to other online methods in MCC networks.     

A low power high speed MTJ based non-volatile SRAM cell for energy harvesting based IoT applications

Powering billions of devices is one of the most challenging barrier in achieving the future vision of IoT. Most of the sensor nodes for IoT based systems depend on battery as their power source and therefore fail to meet the design goals of lifetime power supply, cost, reliable sensing and transmission. Energy harvesting has the potential to supplant batteries and thus prevents frequent battery replacement. However, energy autonomous systems suffer from sudden power variations due to change in external natural sources and results in loss of data. The memory system is a main component which can improve or decrease performance dramatically. The latest versions of many computing system use chip multiprocessor (CMP) with on-chip cache memory organized as array of SRAM cell. In this paper, we outline the challenges involved with the efficient power supply causing power outage in energy autonomous/self-powered systems. Also, various techniques both at circuit level and system level are discussed which ensures reliable operation of IoT device during power failure. We review the emerging non-volatile memories and explore the possibility of integrating STT-MTJ as prospective candidate for low power solution to energy harvesting based IoT applications. An ultra-low power hybrid NV-SRAM cell is designed by integrating MTJ in the conventional 6T SRAM cell. The proposed LP8T2MTJ NV-SRAM cell is then analyzed using multiple key performance parameters including read/write energies, backup/restore energies, access times and noise margins. The proposed LP8T2MTJ cell is compared to conventional 6T SRAM counterpart indicating similar read and write performance. Also, comparison with the existing MTJ based NV-SRAM cells show 51–78% reduction in backup energy and 42–70% reduction in restore energy.     

Comparative analysis of memristor models and memories design

The advent of the memristor breaks the scaling limitations of MOS technology and prevails over emerging semiconductor devices.In this paper,various memristor models including behaviour,spice,and experimental are investigated and compared with the memristor's characteristic equations and fingerprints.It has brought to light that most memristor models need a window function to resolve boundary conditions.Various challenges of availed window functions are discussed with matlab's simulated results.Biolek's window is a most acceptable window function for the memristor,since it limits boundaries growth as well as sticking of states at boundaries.Simmons tunnel model of a memristor is the most accepted model of a memristor till now.The memristor is exploited very frequently in memory designing and became a prominent candidate for futuristic memories.Here,several memory structures utilizing the memristor are discussed.It is seen that a memristor-transistor hybrid memory cell has fast read/write and low power operations.Whereas,a 1T1R structure provides very simple,nanoscale,and non-volatile memory that has capabilities to replace conventional Flash memories.Moreover,the memristor is frequently used in SRAM cell structures to make them have non-volatile memory.This paper contributes various aspects and recent developments in memristor based circuits,which can enhance the ongoing requirements of modem designing criterion.     

Unraveling the future of computing

In this article we briefly introduce the theory and development of DNA-based computing, present the underlying problems associated with DNA-based computing technology, and discuss the trend of nanoelectronics as well as several computational paradigms for selected existing classical solutions with quantum-effect devices. The pros and cons of both the DNA-based computing and the quantum computing are discussed and compared from the error resistant viewpoint and at the system architecture level     

Data communications needs

Present and future computer communications requirements are considered. Present computing is characterized primarily by three well-established paradigms: timesharing, transaction, and mainframe. Each of these is examined. To understand future needs, trends in computer paradigms and technology are examined. Innovative uses of data communications are considered under circumstances in which voice orientation is not a factor, a computational perspective is operative, and new communications options are available. Developments in processor power and system software are briefly considered, and client-server systems and the networks that make them possible are covered in depth. The much more demanding data communication requirements of client-server systems are stressed     

Smart Textile Optoelectronics for Human-Interfaced Logic Systems

Textiles with a freedom of form factor, unlimited scalability, and high programmability provide an ideal platform for constructing wearable optoelectronic systems. The emerging wearable technologies, like artificial intelligence and Internet of Things, have driven the development of textile optoelectronics from simple functional blocks to sophisticated logic systems, offering a seamless, breathable, and programmable on-body platform to synergistically sense, analyze, store, and feedback information in response to complex commands. In the past few years, the creation of such smart textile optoelectronics-based logic systems is boosted by nanomaterial science and manufacturing integration technologies and has revolutionized human–machine interaction paradigms in numerous emerging fields. Herein, in this review, the recent progress of smart textile optoelectronics for human-interfaced logic systems is timely summarized. This review begins with a concise discussion about the wearability evaluation and integration consideration of textile optoelectronic devices. Then, important breakthroughs in human-interfaced logic systems based on smart textile optoelectronics are demonstrated by highlighting their representative device, working principle, and application scenarios. Finally, the existing challenges and potential directions in the field of textile optoelectronics-integrated logic systems are analyzed.     

Modular Design of testable reversible ALU by QCA multiplexer with increase in programmability

The quantum-dot cellular automata have emerged as one of the potential computational fabrics for the emerging nanocomputing systems due to their ultra-high speed and integration density. On the other hand, reversible computing promises low power consuming circuits by nullifying the energy dissipation during the computation. This work targets the design of a reversible arithmetic logic unit (RALU) in the quantum-dot cellular automata (QCA) framework. The design is based on the reversible multiplexer (RM) synthesized by compact 2:1 QCA multiplexers introduced in this paper. The proposed reversible multiplexer is able to achieve 100% fault tolerance in the presence of single missing or additional cell defects in QCA layout. Furthermore, the advantage of modular design of reversible multiplexer is shown by its application in synthesizing the RALU with separate reversible arithmetic unit (RAU) and reversible logic unit (RLU). The RALU circuit can be tested for classical unidirectional stuck-at faults using the constant variable used in this design. The experimentation establishes that the proposed RALU outperforms the conventional reversible ALU in terms of programming flexibility and testability.     

纳米级SET/CMOS混合器件的研究进展

SET/CMOS作为一种单电子晶体管与纳米级CMOS混合结构的新兴纳米电子器件,不仅实现两者优势互补,而且其突出的功能特性极大影响着电路微型化发展的道路。从SET/CMOS的串联和并联两种基本结构出发,阐述了各自的工作原理与特性、进而介绍了该混合器件目前在实验室制备、电路设计以及数值模拟研究方面的现状,最后讨论了器件在发展中尚需解决的问题及其应用前景。SET/CMOS的容错电路及互连结构新型设计将会加速实用化的进程,使集成电路产生质的飞跃,进而有望实现超高密度的信息存储和超高速信息处理,并将在未来智能计算机、通信设备和自动化方面发挥重要作用。     

Emerging MXene-Based Memristors for In-Memory,Neuromorphic Computing,and Logic Operation

Confronted by the difficulties of the von Neumann bottleneck and memory wall, traditional computing systems are gradually inadequate for satisfying the demands of future data-intensive computing applications. Recently, memristors have emerged as promising candidates for advanced in-memory and neuromorphic computing, which pave one way for breaking through the dilemma of current computing architecture. Till now, varieties of functional materials have been developed for constructing high-performance memristors. Herein, the review focuses on the emerging 2D MXene materials-based memristors. First, the mainstream synthetic strategies and characterization methods of MXenes are introduced. Second, the different types of MXene-based memristive materials and their widely adopted switching mechanisms are overviewed. Third, the recent progress of MXene-based memristors for data storage, artificial synapses, neuromorphic computing, and logic circuits is comprehensively summarized. Finally, the challenges, development trends, and perspectives are discussed, aiming to provide guidelines for the preparation of novel MXene-based memristors and more engaging information technology applications.     

Holding State Performance Amelioration by Exploitation of NMOS Body Effect in 1T DRAM Cells

In this study curtailing of idle current in 1T1C and 1T1M DRAM cells by increasing threshold voltage during holding state is analyzed. This is attained by connecting the bulk to source in the active phases and pulling it below source potential throughout the holding phase. The proposed technique leads to body effect which affects the threshold voltage improving leakage current. The 1T1C and 1T1M discussed in this paper are volatile and non-volatile (memristor based) respectively. Memory design is fast becoming the pacemaker in the modern technology design which now requires DRAM cells with prolonged holding period and low idle power hence the need for lowering the leakage current. The dynamic nature of the 1T1C is due to charge leakage and the leakage current flowing through the 1T1M cell affects mem-resistance all this leading to state distortion. Idle current has of-late become one of the major contributors of power in large memory arrays in which in-active periods now dominates active period and by this technique idle power is reduced in both volatile and non-volatile cells. The proposed technique was implemented and simulations were done at different voltage levels at 45 nm technology. The method improved the leakage current, holding time and leakage power but at the expense of area and writing power.     

Magnetic QCA systems

The field-coupled QCA architecture has emerged as a candidate for providing local interconnectivity for nanodevices, and offers the possibility to perform very dense, high speed, and low power computing in an altogether new paradigm. Magnetic interactions between nanomagnets are sufficiently strong to allow room-temperature operation. We are investigating the fabrication and testing of arrays of nanomagnets for this purpose, and have found that by tailoring their shapes, strong coupling can be observed. This paper will present recent work of the Notre Dame group on magnetically coupled QCA.