A novel offset gated polysilicon thin film transistor without anadditional offset mask

We have proposed a novel offset gated polysilicon TFT fabricated without an offset mask in order to reduce leakage current and suppress the kink effect. The photolithographic process steps of the new TFT device are identical to those of conventional non-offset structure TFT's and an additional mask to fabricate an offset structure is not required in our device. The new device has demonstrated a lower leakage current and a better ON/OFF current ratio compared with the conventional non-offset device. The novel TFT also exhibits a considerable reduction in the kink effect because a very thin film TFT may be easily fabricated due to the elimination of the contact over-etch problem     

Fully Printed Foldable Integrated Logic Gates with Tunable Performance Using Semiconducting Carbon Nanotubes

The realization of large‐area and low‐cost flexible macroelectronics relies on both the advancements in materials science and the innovations in manufacturing techniques. In this study, extremely bendable and foldable carbon nanotube thin film transistors and integrated logic gates are fabricated on a piece of ultrathin polyimide substrate through an ink‐jet‐like printing process. The adoption of a hybrid gate dielectric layer consisting of barium titanate nanoparticles and poly(methyl methacrylate) has led to not only excellent gating effect but also superior mechanical compliance. The device characteristics show negligible amount of change after up to 1000 cycles of bending tests with curvature radii down to 1 mm, as well as very aggressive folding tests. Additionally, the electrical characteristics of each integrated logic gate can be tuned and optimized individually by using different numbers of carbon nanotube printing passes for different devices, manifesting the unique adaptability of ink‐jet printing as a digital, additive, and maskless method. This report on fully printed and foldable integrated logic gates represents an inspiring advancement toward the practical applications of carbon nanotubes for high‐performance and low‐cost ubiquitous flexible electronics.     

Self-aligned aluminum top-gate polysilicon thin-film transistorsfabricated using laser recrystallization and gas-immersion laser doping

We present electrical results from polysilicon thin film transistors (TFT's) fabricated using laser-recrystallized channels and gas-immersion laser-doped source-drain regions. A simple, four-level self-aligned aluminum top-gate process is developed to demonstrate the effectiveness of these laser processes in producing TFT's. The source-drain doping process results in source-drain sheet resistances well below 100 Ω/□. TFT field-effect mobilities in excess of 200 cm²/Vs are measured for the laser-fabricated unhydrogenated TFT's     

A self-alignment process for amorphous silicon thin film transistors

A new method of fabricating amorphous Si thin film transistors (a-Si TFT's) has been developed. This method uses the self-alignment process, which also includes the successive deposition of gate insulator and active amorphous Si layers in one-pumpdown time in an RF glow discharge apparatus. This method greatly simplifies the fabrication process and results in stable device performance. The practicability of this method was confirmed by experimentally fabricated devices.     

镍硅化物诱导横向晶化制备高性能多晶硅薄膜晶体管

提出一种新的采用镍硅化物作为种子诱导横向晶化制备低温多晶硅薄膜晶体管的方法。分别采用微区Raman、原子力显微镜和俄歇电子能谱对制备的多晶硅薄膜进行结构和性能表征,并以此多晶硅薄膜为有源层制备了薄膜晶体管,测试其I-V转移特性。测试结果显示,制备的多晶硅薄膜具有较低的金属污染和较大的晶粒尺寸,且制备的多晶硅薄膜晶体管具有良好的电学特性,可以有效地减小漏电流,同时可提高场效应载流子迁移率。这主要是由于多晶硅沟道区中镍含量的有效降低使得俘获态密度减少。     

A light-transmitting two-dimensional photodetector array using a-Sipin photodiodes and poly-Si TFT's integrated on a transparent substrate

A light-transmitting two-dimensional photodetector array (32×32 cells) using amorphous silicon (a-Si) pin photodiodes and polysilicon (poly-Si) thin film transistors (TFT's) integrated on a transparent substrate has been developed for use in a free-space optical switching network. The fabrication and the characteristics of the photodetector array are discussed. With driving circuits and sensing amplifiers, this photodetector array shows a minimum detectable power of -25 dBm and an insertion loss of 0.4 dB for an incident optical beam with a diameter of 550 μm. By monitoring the positions and the states of input optical beams, this photodetector array can be used to control the optical paths in photonic switching systems, such as a 1024-input-port optical concentrator     

Numerical simulation of spin coated P3HT organic thin film transistors with field dependent mobility and distributed contact resistance

P3HT thin film transistors (TFT) have been fabricated using inkjet printing technique. The present work aims at the systematic study of the impact of distributed contact resistance including field dependent mobility. The coupled analysis is not yet explored for polymer organic thin film transistors. Numerical simulations are performed to study the coupled influence of field mobility and distributed contact resistance on the FET device behavior. Considering the influence of field mobility and distributed contact resistance, simulated results are consistent with our experimental results.     

Cover Picture: High Definition Digital Fabrication of Active Organic Devices by Molecular Jet Printing (Adv. Funct. Mater. 15/2007)

A new method for direct patterning of organic optoelectronic/electronic devices using a reconfigurable and scalable printing method is reported by Vladimir Bulovic and co‐workers on p. 2722. The printing technique is applied to the fabrication of high‐resolution printed organic light emitting devices (OLEDs) and organic field effect transistors (OFETs). Remarkably, the final print‐deposited films are evaporated onto the substrate (rather than solvent printed), giving high‐quality, solvent‐free, molecularly flat structures that match the performance of comparable high‐performance unpatterned films. We introduce a high resolution molecular jet (MoJet) printing technique for vacuum deposition of evaporated thin films and apply it to fabrication of 30 μm pixelated (800 ppi) molecular organic light emitting devices (OLEDs) based on aluminum tris(8‐hydroxyquinoline) (Alq₃) and fabrication of narrow channel (15 μm) organic field effect transistors (OFETs) with pentacene channel and silver contacts. Patterned printing of both organic and metal films is demonstrated, with the operating properties of MoJet‐printed OLEDs and OFETs shown to be comparable to the performance of devices fabricated by conventional evaporative deposition through a metal stencil. We show that the MoJet printing technique is reconfigurable for digital fabrication of arbitrary patterns with multiple material sets and high print accuracy (of better than 5 μm), and scalable to fabrication on large area substrates. Analogous to the concept of “drop‐on‐demand” in Inkjet printing technology, MoJet printing is a “flux‐on‐demand” process and we show it capable of fabricating multi‐layer stacked film structures, as needed for engineered organic devices.     

Enhanced H2-plasma effects on polysilicon thin-filmtransistors with thin ONO gate-dielectrics

This letter reports that passivation effects of the H₂-plasma on the polysilicon thin-film transistors (TFT's) were greatly enhanced if the TFT's have a thin Si₃N₄ film on their gate-dielectrics. Compared to the conventional devices with only the SiO₂ gate dielectric, the TFT's with Si ₃N₄ have much more improvement on their subthreshold swing and field-effect mobility after H₂-plasma treatment     

Fabrication of thin film transistors using a Si/Si1-xGex/Si triple layer film on a SiO2 substrate

A novel approach that can reduce the thermal budget in the fabrication of thin film transistors (TFTs) using a Si/Si_0.7Ge_0.3/Si triple film as an active layer was proposed. The crystallization behavior of the triple film was described and device characteristics of Si/Si_0.7Ge_0.3 /Si TFTs were compared with those of Si TFTs and of SiGe TFTs. The triple film was completely crystallized only after a 25-h anneal at 550°C. N-channel polycrystalline Si/Si_0.7Ge_0.3/Si TFTs had a field-effect mobility of 57.9 cm²/Vs and an I_on/I_off ratio of 5.7×10⁶. This technique provides not only a shorter time processing capability than Si TFT's technology but also superior device characteristics compared to SiGe TFTs     

High Definition Digital Fabrication of Active Organic Devices by Molecular Jet Printing

We introduce a high resolution molecular jet (MoJet) printing technique for vacuum deposition of evaporated thin films and apply it to fabrication of 30 μm pixelated (800 ppi) molecular organic light emitting devices (OLEDs) based on aluminum tris(8‐hydroxyquinoline) (Alq₃) and fabrication of narrow channel (15 μm) organic field effect transistors (OFETs) with pentacene channel and silver contacts. Patterned printing of both organic and metal films is demonstrated, with the operating properties of MoJet‐printed OLEDs and OFETs shown to be comparable to the performance of devices fabricated by conventional evaporative deposition through a metal stencil. We show that the MoJet printing technique is reconfigurable for digital fabrication of arbitrary patterns with multiple material sets and high print accuracy (of better than 5 μm), and scalable to fabrication on large area substrates. Analogous to the concept of “drop‐on‐demand” in Inkjet printing technology, MoJet printing is a “flux‐on‐demand” process and we show it capable of fabricating multi‐layer stacked film structures, as needed for engineered organic devices.     

Printed Transistors on Paper: Towards Smart Consumer Product Packaging

The integration of fully printed transistors on low cost paper substrates compatible with roll‐to‐roll processes is demonstrated here. Printed electronics promises to enable a range of technologies on paper including printed sensors, RF tags, and displays. However, progress has been slow due to the paper roughness and ink absorption. This is solved here by employing gravure printing to print local smoothing pads that also act as an absorption barrier. This innovative local smoothing process retains desirable paper properties such as foldability, breathability, and biodegradability outside of electronically active areas. Atomic force microscopy measurements show significant improvements in roughness. The polymer ink and printing parameters are optimized to minimize ink absorption and printing artifacts when printing the smoothing layer. Organic thin film transistors (OTFT) are fabricated on top of this locally smoothed paper. OTFTs exhibit performance on par with previously reported printed transistors on plastic utilizing the same materials system (pBTTT semiconductor, poly‐4‐vinylphenol dielectric). OTFTs deliver saturation mobility approaching 0.1 cm²V^–1s^–1 and on‐off‐ratio of 3.2 × 10⁴. This attests to the quality of the local smoothing, and points to a promising path for realizing electronics on paper.     

High performance low temperature polysilicon thin film transistorusing ECR plasma thermal oxide as gate insulator

Electron cyclotron resonance (ECR) plasma thermal oxide has been investigated as a gate insulator for low temperature (⩽600°C) polysilicon thin-film transistors based on solid phase crystallization (SPC) method. The ECR plasma thermal oxide films grown on a polysilicon film has a relatively smooth interface with the polysilicon film when compared with the conventional thermal oxide and it shows good electrical characteristics. The fabricated poly-Si TFT's without plasma hydrogenation exhibit field-effect mobilities of 80 (60) cm²/V·s for n-channel and 69 (48) cm²/V·s for p-channel respectively when using Si₂ H₆(SiH₄) source gas for the deposition of active poly-Si films     

8-wavelength DBR laser array fabricated with a single-step Bragggrating printing technique

An 8-wavelength distributed Bragg reflector (DBR) array for narrow channel wavelength division multiplexing (WDM) has been fabricated with a new technique for printing first-order Bragg gratings using a phase mask and a conventional incoherent source. All the distributed gratings were printed in a single photolithographic step with a slightly modified mask aligner. The DBR's excellent wavelength control for channels separated by as little as 0.8 nm is described. Many advanced photonic devices relying on gratings like quarter-wave shifted distributed feedback (DFB) lasers and wavelength division multiplexing (WDM) components can potentially be manufactured with this technique in a simple and cost-effective way     

Hydrogenation of polycrystalline silicon thin film transistors byplasma ion implantation

Both n- and p-channel polycrystalline silicon (poly-Si) thin film transistors (TFT's) have been hydrogenated using the plasma ion implantation (PII) technique. Significant improvements in device characteristics have been obtained. Because PII is capable of greater dose rates than plasma immersion, it allows for significantly shorter process times than other methods investigated thus far     

High-performance p-channel poly-Si TFT's using electron cyclotronresonance hydrogen plasma passivation

This letter presents a summary of the first detailed investigation of electron cyclotron resonance (ECR) hydrogen plasma exposure treatments of p-channel poly-Si thin film transistors (TFT's). It is shown that ECR hydrogenation can be much more efficient than RF hydrogenation. Poly-Si p-channel TFT's fabricated at low temperatures (⩽625°C) and passivated with the ECR hydrogenation treatment are shown to exhibit ON/OFF current ratios of 7.6×10⁷, subthreshold swings of 0.62 V/decade, threshold voltages of -4.6 V, and hole mobilities over 18 cm²/V.s     

Degradation due to electrical stress of poly-Si thin filmtransistors with various LDD lengths

The degradation phenomena of polycrystalline silicon (poly-Si) thin film transistors (TFT's) with various lightly-doped drain (LDD) length have been investigated. It is observed that the threshold voltage shift due to electrical stress varies with LDD length. The threshold voltage shift after 4 hours electrical stress of V_g=V_d =30 V in conventional, 0.5 μm, and 2 μm LDD poly-Si TFT's are about 2.7 V, 5.2 V, and 0.8 V, respectively     

XeCl Excimer laser annealing used in the fabrication of poly-Si TFT's

Mo-gate n-channel poly-Si thin-film transistors (TFT's) have been fabricated for the first time at a low processing temperature of 260°C. A 500-1000-A-thick a-Si:H was successfully crystallized by XeCl excimer laser (308nm) annealing without heating a glass substrate. TFT's were fabricated in the crystallized Si film. The channel mobility of the TFT was 180cm²/V.s when the a-Si:H was crystallized by annealing with a laser having an energy density of 200 mJ/cm². This result shows that high-speed silicon devices can be fabricated at a low temperature using XeCl excimer laser annealing.     

Ka波段宽带薄膜匹配负载设计与制备研究

基于实频法思想设计了Ka波段薄膜匹配负载的宽带匹配网络,并利用ADS和HFSS软件进行了仿真和优化。仿真结果表明,在32 GHz～40 GHz频率范围内,所设计匹配负载的电压驻波比均小于1.2。利用丝网印刷以及直流磁控溅射工艺制备了所设计的薄膜匹配负载。测试结果表明,所制备的TaN薄膜匹配负载在30.3 GHz～37.4 GHz频率范围内,其电压驻波比均小于1.3。