基于多频外差原理的相位校正方法研究

相位测量轮廓术因其简单低廉的特点被广泛用于光学三维测量领域，高精度的相位获取是测量的关键步骤。多频外差是相位测量轮廓术中常用的解包裹相位算法，针对多频外差解相位后产生的相位跳跃性误差，提出一种基于多频外差原理的相位校正方法。利用传统相移法和多频外差求出包裹相位和展开相位，针对展开相位中出现的跳跃性误差，通过展开相位对误差产生原因和误差位置进行初步确定，将多个频率的包裹相位进行对比，确定误差是否真实存在，对出现误差的像素点进行修正得到新的展开相位。实验结果表明：在对表面形状规则的物体测试时，展开相位光滑无跳跃性误差，表面三维重建无异常凹凸区域，实现了对解相位中跳跃性误差的消除，验证了该校正方法的有效性。     

双频外差结合相位编码的相位解包裹方法

为了使用高频条纹进行一次外差完成相位解包裹,实现高精度测量,提出了双频外差结合相位编码的相位解包裹方法。首先,用两组正弦条纹获得两个包裹相位,进行外差处理得到外差相位;其次,相位编码条纹得到条纹级次后对外差相位展开;最后,由连续的外差相位对两个包裹相位进行展开,用最高频率的连续相位求得物体的相位信息。实验结果表明:RMS误差为0.038 mm。双频外差合成的周期不需要覆盖整个视场,打破了传统双频外差方法对频率选择的限制,可以用更高频率的条纹进行高精度测量。克服了相位主值误差对使用更高频率条纹进行高精度测量的局限性。     

改进的三频三步相移结构光三维重建方法

针对结构光三维重建中的传统三频三步相移方法需要投影过多编码图像、效率低的问题,提出了改进的三频三步相移结构光三维重建方法。该方法与传统三频三步方法均需要3种频率的正弦条纹图,但条纹图数量只需5张,即最高频率的条纹图3张,但初始相位不同,剩余频率的条纹图各1张。较传统方法的9张条纹图投影效率提高44.44%。随后推导了该方法的求解原理,由最高频的3张条纹图直接求得重建所需包裹相位,另外两张条纹图用于对包裹相位进行展开,理论上该方法与传统三频三步算法具有相同的精度。最后进行了4组实验,验证了该方法的重建精度、复杂不连续模型重建能力、不同光照环境中的重建稳定性以及对彩色物体重建能力。结果证明该方法在有效提高测量速度的同时保证了和传统三频三步方法一致的精度和适应性。     

改进格雷码条纹投影三维测量方法

传统的格雷码加相移法已经广泛应用于三维测量,但是相位解包裹一般需要投影多幅格雷码条纹,如何实现快速、准确的三维测量仍具有一定挑战性。提出了一种基于几何约束的改进格雷码条纹投影三维测量方法,可以有效减少格雷码条纹的数量。为了实现高速条纹投影,使用二值抖动技术将8位正弦相移条纹转换为1位二值图像。总共使用六幅条纹图像,其中三幅相移条纹用于计算截断相位,三幅格雷码条纹用于对截断相位进行初步展开获得伪展开相位,最后利用几何约束对伪展开相位进行解包裹获得绝对相位。实验结果表明,所提方法可以有效地重建被测物体的三维形貌。     

无人机动态目标的快速捕获跟踪演示实验

为避免多级灰度值编码所带来的非线性问题,并 进一步提高测量速度和适应性,提出了一种二 元阶梯相位编码方法。首先,利用传统N步相移法,投影若干幅 正弦光栅条纹到待测物体表面,接着投影 若干幅相移条纹对应的采用二值化编码的条纹;在通过四步相移法求得光栅条纹的包裹相位 后,利用二值 编码条纹解调后得到的阶梯相位,确定光栅条纹的周期级次;最终根据周期级次对包裹相位 进行解包裹得 到绝对相位,完成相位去包裹。利用二值化条纹进行阶梯相位编码的方法,克服了传统阶梯 相位编码方法 使用多级灰度值引起的非线性问题。实验结果表明,以单通道投影图像数目为标准,在同等 条件下,与已有的同类方法相比,本文方法的测量速度提高了12.5% ,且适应性强,能够有效地进行物体的三维形貌测量。     

基于红外结构光的三维人脸建模

在基于结构光的双目三维人脸重建中,容易丢失细节处数据和建模精度较低,导致三维人脸数据完整度不高,对三维人脸识别较差.本文研究了基于红外条纹的双目三维照相机系统,通过投射红外条纹结构光,根据相移法将生成包裹相位,利用三频法得到绝对相位,生成视差图,得到三维人脸模型.实验表明,基于红外的哑铃规球心测距误差在0.1％以内,人...     

四步相移结合互补格雷码的快速相位展开

为提高相移条纹投影测量系统的精度与效率,提出了一种四步相移结合互补格雷码的快速相位展开方法,有效消除了相位展开误差,并能够显著提升计算效率.引入的互补格雷码与传统格雷码的条纹阶次存在半周期错位,利用这种错位与中值滤波结合可完全消除相位展开误差.首先,采用大津法对全亮图案进行二值化生成掩码图像;其次,以掩码图像非零区域为...     

单幅干涉条纹图相位提取新算法

散斑干涉测量中,得到的干涉条纹图必须通过提取当中的真实相位才能够得出所测的物理量。从干涉条纹图中提取相位常用的相移法,过程复杂、对环境要求较高,而且要通过解包裹运算才能求得真实相位,容易产生误差。通过希尔伯特变换,基于离散余弦求解泊松方程的方法,提出从单幅干涉条纹中提取真实相位的新算法。通过实验分析,本文提出的新方法能够有效地从单幅干涉条纹中提取真实相位,并且在现实情况中,本文提出的新方法从单幅干涉条纹图中提取相位误差小于相移法,而且运行速度快,为从干涉条纹图中提取真实相位提供了新的参考。     

改进的阶梯相位去包裹算法研究

为减少投影条纹数量,提高测量速度,提出了一种 改进的阶梯相位去包裹算法。算法 采用彩色条纹投影测量物体三维形貌,将正弦和阶梯相位条纹分别输入彩色图像的红 色和蓝色通道构成彩色条纹,由DLP投影仪将四步相移彩色条纹投影到待测物体上,由彩色 CCD相机采集。利用颜色分离技术得到2组四步相移条纹图,其中一组为4幅正弦条纹,由四 步相移法求得正弦条纹包裹相位,另一组4幅阶梯相位编码条纹图,由与正弦条纹周期一致 的阶梯相位构成,经阶梯相位解码确定条纹级次,利用自校正算法去除条纹级次噪点后,实 现相位去包裹。进行了实际测量,结果表明,本方法 测量精度与采用四步相移法相当,但只需4幅条纹图,有效减少了投影和采集的条纹数量, 提高了测量速度。     

基于二维经验模态分解的五步非等步在线三维检测

提出一种基于二维经验模态分解(2DEMD)的像素匹配方法,并结合五步非等步算法应用于在线三维面形测量中。将一正弦条纹投影到在线匀速运动的待测物体上,物体运动产生等效相移,在一个条纹周期范围内任意采集五帧变形条纹图。采用2DEMD方法对变形条纹图进行分解,可以得到与待测物体形貌变化一致的模态图像,通过大津法对其进行二值化处理,并截取可靠性较高的区域作为像素匹配模板进行像素匹配,使各帧条纹图中物点一一对应并计算出相应的等效相移量。再利用五步非等步相移算法解相可得到截断相位,采用相位展开算法得到连续相位,利用相位高度映射公式可恢复出被测物体的三维面形。计算机模拟与实验验证了该方法的有效性。     

Static Phase Offset in a Multiplying Phase Detector

This article analyzes the static phase offset $DeltaPhi_{O}$ of a Gilbert cell phase detector, and attributes the majority of the offset to intrinsic channel transit time. A 6.5 GHz phase detector fabricated in a standard 0.18 $mu{rm m}$ CMOS technology is used for the study. The static phase offset is broken down into layout and intrinsic contributions, and a simple model is used to calculate the intrinsic component. The use of analytical equations for current and intrinsic phase offset results in prediction of the intrinsic static phase offset to within 12% for the current ranges considered. The use of the intrinsic model with extracted parasitics is then shown via analysis, simulation and experimental data to be useful in predicting the phase detector static phase offset. The analysis, confirmed by measurements, indicates the degree to which the static phase offset can be reduced by increasing the tail bias current.      

自偏置锁相环的相位噪声分析

自偏置锁相环被提出以来,被认为能够以简单的电路结构降低锁相环的环内分频比从而改善环路带宽内的相位噪声。从噪声的相关性出发,分析了信号经过自偏置电路后对相位噪声的影响,并通过计算自偏置锁相环的相位传递函数得到其相位噪声模型,对比于传统单环式锁相环结构,其环内分频比并未降低。通过设计一2. 28～2. 52GHz 的自偏置锁相环,对其相位噪声进行测试并与传统单环和偏置式锁相环进行比较,测试结果也表明自偏置锁相技术并不能降低锁相环的带内相位噪声。     

Optical Phase Locking by Local Oscillator Phase Dithering

A new type of optical phase-locked loop (OPLL), called the dither loop, is mathematically analyzed. The dither loop extracts a phase-error signal by applying a small phase disturbance to the local oscillator laser, and synchronously demodulating the resulting power fluctuation in the output signal of the receiver. The dither loop is superior to other OPLL designs, because it does not need the transmission of a residual carrier, it employs a 180deg/3-dB hybrid, an ac-coupled front end, and it accepts a large variety of input signals. Furthermore, in a dither loop, the amount of power which is fed to the phase-locking branch can be adaptively controlled within the receiver. The analysis first focuses on an expression for the phase detector gain in a dither loop. Using a linearized model, the phase-error variance due to phase dithering, white frequency noise induced phase noise and shot noise is evaluated. A simplified expression for the power penalty generated by the phase dither signal is presented. In a more complex calculation, the overall power penalty due to phase dithering and the residual phase error is found. This allows us to synthesize a design rule for dither loops with optimum performance measures. The design rule determines all relevant system parameters, based on specified values of the system bit rate, the laser linewidth, the photodiode responsivity and the required bit-error rate     

时序测相法测相精度的改进研究

高精度微波相位测试在许多情况下非常重要。本文对幅度权重和相位权重两种时序相干测相方法进行了比较研究,并结合两种方法各自的优点,提出一种新的混合方法。为了提高相干精度,还采取了参考信号通道和待测信号通道幅度自动平衡的措施。这一新方法结合改进措施,使测相精度明显提高。实验结果表明,本系统对各种可能被测相位的最大测相误差小于±1．5°。     

Phase change

Samsung says it has started the first commercial production of phase-change memory chips. Known as PRAM, this nonvolatile memory technology holds bits according to the conductive phase of a special material, which melts to change phase.     

相移干涉计量中相移器的原路相干相位检测标定

介绍一种原路相干相位检测的标定方法,该方法具有很高的精度,对相移器的线性没有特别要求,相移器的标定与使用是同一光路,消除了标定光路与使用光路不同所带来的误差     

Robust Time and Phase Synchronization for Continuous Phase Modulation

A novel joint timing and phase-recovery technique is proposed for continuous phase modulation (CPM) systems based on Kalman filtering and an approximate representation of CPM signals with nonorthogonal exponential expansions (nOEE). Compared with existing techniques, the proposed synchronizer requires a less complex front-end processor, and can achieve reliable acquisition performance with a shorter preamble. The asymptotic stability and convergence of the proposed synchronizer is analyzed, including the effect of statistical channel-modeling errors on the convergence characteristics. The selection of suboptimal nOEEs and the design of triple-initialized Kalman filters are also discussed. Both theoretical and simulation results show that the proposed synchronizer is robust in acquiring and tracking both the time shift and the phase offset on either time-invariant or time-variant channels.     

无干涉测量与相位迭代算法的单像素相位成像

单像素成像为突破经典成像中像素数量的限制提供了方法,但要实现良好稳定性和准确性的相位成像仍然是一个挑战。基于现有的单像素成像框架,提出了一种无需干涉测量与相位迭代算法的单像素相位成像方法。通过傅里叶频谱零级强度测量发现,该方法实现了相位成像。实验结果表明,相位成像的重复精度为0.12%,误差为4.1%,证明了该方法具有良好的稳定性和准确性,对单像素成像的进一步发展和经典相位成像的突破创新均具有一定的借鉴意义。     

Low Complexity Carrier Phase Tracking Decoders for Continuous Phase Modulations

Phase tracking capability is incorporated into two sequence estimation decoders for continuous phase modulations. One decoder employs the Viterbi algorithm; the other uses a reduced-survivor approach proposed earlier by one of the authors [11] for the more bandwidth efficient of these modulations. Computational complexity with the simplest of the joint data/phase algorithms is only marginally greater than that required for the equivalent decoding algorithm employing an externally derived carrier phase reference as supplied by a conventional carrier recovery circuit. Simulations with representative partial response modulations demonstrate the phase synchronization and tracking capabilities of the decoders. High SNR losses relative to an optimal receiver having perfect phase knowledge are found to be small (∼ 1 dB).     

Phase Detectors/Phase Frequency Detectors for High Performance PLLs

Phase Frequency Detectors (PFDs) for use in clock distribution PLLs and Phase Detectors (PDs) for clock recovery PLLs that we have proposed recently to achieve high performance are reviewed and discussed. For the PFD, operating speed limitation and phase detecting characteristics are improved with two kinds of approaches, i.e., gate/logic design and configuration design. For the PD, a simple compensation technique to prevent the deterioration of the phase detecting characteristics by D-F/F and a new PD with delay cell of VCO replica are proposed to reduce the jitter caused by PD. By SPICE simulations and experiments, it is confirmed that the maximum operating speed of PFD is improved to more than twice of conventional one and the jitter caused by PD is reduced to a minimum level.