全数字接收机平方定时恢复环路

本文着重研究全数字接收机中定时恢复环路的设计．该环路由内插滤波器，预滤波器，平方定时误差检测，环路滤波和定时控制单元组成，仿真结果表明．通过预滤波明显减小了定时抖动，该算法可以达到较好的性能，井由单片FPGA实现，该芯片已成功用于QM全数字接收机中。     

Timing Recovery in Synchronous Equalized Data Communication

The best estimation of sampler timing in adaptively equalized systems is examined. First, two previous approaches to the estimation problem are reviewed and are found to have fundamental shortcomings. The first technique sets the timing instants coincident with the peak of the unequalized system impulse response. Under certain circumstances this technique can produce nulls in the spectrum of the sampled system, thus preventing efficient operation of the equalizer. The second technique sets the timing instants so as to minimize the residual distortion of the equalized system. This does assure proper operation but requires a second equalizer structure and also requires an accurate initial estimate of sampler phase which it cannot provide itself. A timing recovery technique based on band-edge component maximization which circumvents these problems is presented. Although the scheme is not optimal, it efficiently and effectively recovers timing in synchronous equalized data communication systems.     

一种改进的插值定时恢复结构

在数字同步接收系统中使用插值法提取定时信号的过程中,由于插值滤波器的频域特性是非理想的,为了减小插值器频域内的失真而引起的插值误差,提出了一种改进型的插值结构。该方法在插值之前对输入的信号进行上采样,分析表明该方法可降低插值滤波器的阶数,减少乘法器的使用,从而大大地减少了运算量,降低了系统的实现成本。     

Timing Recovery in Digital Subscriber Loops

Tradeoffs in the design of the timing recovery functions in a subscriber loop receiver are analyzed. The techniques considered are applicable to both the echo cancellation (EC) and time compression multiplexing (TCM) methods of full duplex transmission. Emphasis is on those techniques that lend themselves to implementation in MOSLSI technology, where the objective requirement is that timing recovery be implemented on a sampled-data signal (with the minimum possible sampling rate where EC is used). The wave difference method (WDM) for timing recovery appears to be the best candidate. A detailed study of its performance is carried out analytically and by computer simulation for the case of binary and alternate mark-inversion (AMI) line coding. A closed form expression describing the binary jitter performance of the WDM and its continuous time counterpart, the spectral line technique, is used to compare the two techniques. Analytical and simulation results for recovered phase and jitter are presented for various cable pulse responses carefully chosen to represent worst-case or nearly worst-case conditions. Two methods for including frequency detection in the WDM, the quadricorrelator and the rotational detector, are also simulated.     

Timing with Dirty Templates for Low-Resolution Digital UWB Receivers

As a rapid timing synchronization technique for ultra-wideband (UWB) communications, the timing with dirty templates (TDT) technique effectively collects the multipath energy even when the channel is unknown [7]. In this paper, we investigate TDT algorithms for digital UWB receivers with low-resolution analog-to-digital converters (ADC). Different from the original TDT in [7] for analog UWB receivers, our digital TDT synchronizers here can avoid the ultra-wideband analog delay elements which are difficult to implement at the IC level. Our analysis and simulations show that the (non)data-aided digital TDT algorithms remain operational even when the ADC resolution is very low.     

全数字接收机平方定时恢复环路

本文着重研究全数字接收机中定时恢复环路的设计,该环路由内插滤波器,预滤波器,平方定时误差检测,环路滤波和 定时控制单元组成,仿真结果表明,通过预滤波明显减小了定时抖动,该算法可以达到较好的性能,并由单片FPGA实现, 该芯片已成功用于QAM全数字接收机中。     

Using Times-Four Carrier Recovery in M-QAM Digital Radio Receivers

We have investigated the performance of the times-four method of carrier recovery in a digital radio link transmittingM-level quadrature amplitude modulation (M-QAM), whereMcan be 16, 64, 256, etc.. With the help of a recently built multipath fade simulator, we measured rms phase jitter for various combinations of fade notch frequency and fade depth. This paper reports on the experiment and the associated analysis. The times-four method has the virtues that it does not depend upon accurate data decisions, and it does not interact with the receiver's adaptive equalizer. Our results show that the rms phase jitter using this method, for all but the most severe and improbable fades, could be held to a few degrees. Although the measurements were done only for 16 QAM, the analysis predicts only modest increases for higher numbers of levels. The analysis also predicts, and the measurements verify, that the recovered carrier amplitude shrinks to zero for four distinct combinations of fade notch frequency and fade depth. To our knowledge, this phenomenon has not been reported in the literature heretofore. We show that, from a statistical viewpoint, the damage associated with it (measured in terms of outage time) should be quite small.     

Timing Considerations in the Interfacing of Synchronous Data Networks

The problems of clocking data across the interface between synchronous data networks are considered. Maximum time interval error is introduced as a specification which includes both phase and frequency errors.     

Timing Recovery in Digital Subscriber Loops Using Baud-Rate Sampling

Sampled-data techniques are the most practical means of obtaining the necessary signal processing functions for timing recovery in the VLSI implementation of a digital subscriber loop transceiver. The sampled-data timing recovery techniques described in this paper are applicable to both echo cancellation and time-compression multiplexing systems. Timing recovery using baud-rate sampling in conjunction with a special pulse-shaping and timing function fulfills all the objectives for timing recovery in this application. It recovers a timing phase that has minimum precursor intersymbol interference, and makes possible the combination of decision feedback equalizer and echo canceler, reducing the convergence time and increasing the step size. The pulse-shaping function can be performed either in the transmitter by means of digital coding, or in the receiver by means of analog filtering. In the latter case, the transmitted pulse is compatible with more conventional approaches. The proposed partial-response line coding, a special form of AMI coding, is less susceptible to line impairments if detected as a two-level signal. Performance by analysis, simulation, and experimental measurements is reported on a variety of cable configurations, some including bridged taps. Analysis of jitter performance leads to design techniques for reducing the jitter magnitude.     

A Digital Approach to Symbol Timing Recovery Systems

An analysis of a symbol timing recovery (STR) technique using digital processing is presented. The ratio of the discrete spectral power at the symbol rate frequency to the nearby continuous spectral power is used as a criterion of STR performance. It is shown that this power ratio equals the quality factor of the narrow bandpass filter and that it does not depend on the value of the delay element. The performance of the STR subsystem is consequently determined by the quality factor of the bandpass filter rather than by the specific delay. In addition to this, some experimental evidence that the additive channel noise has little effect on the power ratio is given. A modified phase-locked loop with anLCprefiiter is proposed to extract the symbol timing clock. This prefilter improves the acquisition and synchronization performance of the PLL. The STR technique presented here has the advantages of lower cost and simpler hardware implementation over other serial STR techniques.     

位同步信号恢复的数字电路实现

本文扼要阐述位同步信号恢复的一般原理，进而提出采用数字集成电路器件实现位同步信号提取的方案。对所述方案分析结果表明，若以符号速率处的离散频谱功率 其邻近的连续频谱功率之比作为衡量位定时恢复好坏的标准，那么，此功率之比只取决于窄带带通滤波器的品质因数Ｑ。     

Minimum Mean-Square Error Timing Recovery Schemes for Digital Equalizers

Two algorithms are presented for optimum timing recovery in digitally implemented equalizers. The first one is a polarity-type algorithm based on the conventional minimum mean-square error criterion. A theoretical analysis is made to characterize the algorithm phase detector and evaluate its steady-state phase jitter variance. Influence of various channel and system design parameters on the algorithm performance is illustrated using phase jitter probability densities obtained by means of computer simulations. Interaction of the algorithm with decision-directed carrier recovery is also examined. It is shown that interaction with carrier recovery may considerably degrade the timing acquisition performance, and a second algorithm is then presented which eliminates this interaction. The second algorithm is based on the minimization of a modified mean-square error criterion which provides a measure of the intersymbol interference, independently of the carrier phase. Decision-directed timing and carrier recoveries are thus decoupled and the system startup period is considerably reduced. Phase detector characteristic and steady-state jitter performance of the second algorithm are evaluated by analytical means and computer simulations, as in the first algorithm.     

Block Codes for Linear Timing Recovery in Data Transmission Systems

A method is proposed for launching and extracting the timing wave in a PAM digital transmission system, which combines the simplicity of linear self-timing, the economy in bandwidth of nonlinear self-timing, and the high performance of the added timing wave approach. The method requires that the digital signal is cyclostationary with a period which is an even multiple of the symbol periodT; the simplest solution for deriving such a signal from a stationary message is to apply it to a periodically time-varying system, as a memoryless block coder. With reference to such a scheme we derive the spectrum of the timing jitter. Very simple conditions are found on block encoding in order that the encoded message exhibits the desired characteristics. Finally, ternary codes are discussed and the performance of a specific code is evaluated and compared to that of conventional extraction schemes.     

8DPSK传真信号数字解调的位定时恢复

讨论了在传真解调/再调制中,8DPSK传真信号数字解调的位定时恢复的一种方法。     

一种并行的定时同步环路实现研究

定时恢复是全数字接收机中的核心部分之一,其处理速度制约了整个接收机的最高处理速度。在传统Gardner定时环路的实现基础上,提出了一种适用于高速数字接收机中定时同步环路的并行控制方式。它通过采用并行处理的方法,为符号同步环路中的内插滤波器提供插值相位来实现插值功能,并且降低了定时同步环路的工作时钟。 MATLAB仿真证明这种插值滤波控制器在降低定时同步环路工作时钟频率的同时,定时恢复性能并未受到影响。     

Noncoherent Data Transition Tracking Loops for Symbol Synchronization in Digital Communications Receivers

Starting with the maximum a posteriori (MAP) estimation approach, this paper derives the optimum (in the MAP estimation sense) means for performing symbol timing recovery in the absence of carrier phase information (i.e., prior to carrier phase recovery). Specifically, we examine the necessary modification of a well-known form of coherent symbol synchronizer, namely, the data transition tracking loop (DTTL) to allow its operation in the absence of carrier phase information, i.e., as a so-called noncoherent symbol sync loop. By employing such a noncoherent scheme, one can eliminate the need for iteration between the carrier and symbol sync functions, as typically takes place in receivers that more commonly perform carrier tracking and acquisition prior to symbol timing. The performance of both the linear and nonlinear versions of this noncoherent DTTL is obtained by a combination of analysis and simulation, and compared with that of the corresponding coherent DDTLs.     

Symbol Timing Recovery for CPM with Correlated Data Symbols

We consider symbol timing recovery for continuous phase modulations (CPMs) with correlated data symbols. A popular example of such a scheme is shaped offset quadrature phase-shift keying (SOQPSK). We propose an extension to an existing non-data-aided (blind) timing error detector (TED) to make it compatible with such modulation schemes. The merits of the modified TED are demonstrated by comparing its performance with and without taking the data correlation into account. As a further modification, we show that a quantization scheme can be used to yield an extremely low-complexity version of the system with only negligible performance losses. The Scurve of the proposed quantized TED is given, which rules out the existence of false lock points. The proposed scheme shows great promise in a wide range of applications due to its low complexity, its lack of false lock points, and its blind nature; such applications include timing recovery for noncoherent detection schemes and false lock detectors.     

全新的数字式测试接收机

介绍了全数字式、认证级测试接收机PMM9010的原理、特点及应用.除输入端的信号预选器外,该接收机每一个电路都实现了数字化.测试范围从10 Hz～30 MHz(可扩展3 GHz或6 GHz).全兼容CISPR 16标准.仪器预置信号预选器、前置放大器、自动衰减器、四种检波器(峰值、准峰值、有效值和平均值)以及跟踪信号发生器等.测试过程符合相关标准的要求.其稳定的性能,免去了高昂的维护费用.仪器可添加4通道Click分析模块、蓝牙模块等.辅以不同的配件如LISN、电流电压注入探头和吸收钳等,可以完成所有的EMC传导、辐射测试.     

Power-Efficient Clock/Data Distribution Technique for Polyphase Comb Filter in Digital Receivers

A power-efficient clock/data distribution technique for the input registers of the polyphase comb decimation filter is presented. A general form of the proposed technique is developed with respect to the decimation factor. Both proposed and conventional comb filters are implemented using Xilinx Spartan3 low-power field-programmable gate array family. The implementation results show that applying the proposed technique reduces the dynamic power consumption of the second- and third-order polyphase comb filters up to 62.87% and 57.6%, respectively, depending on the decimation factor and the number of quantizer bits. For a particular power consumption, a higher input sampling rate can be utilized by applying the proposed technique. Consequently, the signal-to-noise ratio of a second-order $SigmaDelta$ modulator is increased using second- and third-order modified filters by 21.6 and 20.5 dB, respectively, depending on the decimation factor and the number of quantizer bits.      

PCM/FM全数字接收机的一种定时误差恢复方法

介绍了一种中频数字化PCM/FM接收机的定时误差恢复方法,它采用准最佳定时误差提取算法以及多项式内插器进行定时误差提取和纠正。计算机仿真结果表明,该方法是可行的,适合DSP实现。