一种全功能2kb E^2PROM的研制

论述了Ｅ＾２ＰＲＯＭ的设计技术，包括单元设计，升压电路设计，存储阵列设计等，然后扼要介绍了其工艺过程和关键工艺，最后给出了Ｅ＾２ＰＲＯＭ单元和电路的性能。     

共源-共栅组态S2I电流存储单元及其性能

针对原型S2I开关电流存储单元性能上的一些弱点,提出了共源-共栅组态的S2I电流存储单元(简称CS2I)新结构,使其关键速度与精度性能得到较好的改善.相同器件尺寸下的S2I与CS2I单元电路相比,后者速度性能提高了1.6倍,两种电路结构同样应用于延迟单元和双采样双线性积分器功能部件的HSPICE仿真表明:CS2I方式组成的延迟单元的精度提高了5倍,双采样双线性积分器的三次谐波减少了15dB.     

局部二维结构描述的HEp-2染色模式分类

Hep-2染色模式分类主要用于免疫疾病诊断,但已有方法受荧光成像环境,细胞图像自身的视觉特性的影响,分类准确率较低.本文提出一种新的适合于HEp-2染色模式分类的特征提取方法.在构建了不同尺度下的高斯平滑图像序列后,利用shape index实现图像二维结构的直观描述,进而通过多灰度阈值图像结构的空间分解,使其同时具备对微观二维图像结构和空间信息的描述能力.该方法在ICPR和SNP HEp-2数据集的两折交叉细胞级测试中,分别获得89.83%和87.49%的准确率,在ICPR的28折交叉细胞级和图像级测试分别达到60.5%和70.56%的准确率,明显优于LBP、CLBP等方法,和CoALBP特征相当.     

The Influence of TiO2 Particle Size in TiO2/CuInS2 Nanocomposite Solar Cells

The recently developed CuInS₂/TiO₂ 3D nanocomposite solar cell employs a three‐dimensional, or “bulk”, heterojunction to reduce the average minority charge‐carrier‐transport distance and thus improve device performance compared to a planar configuration. 3D nanocomposite solar‐cell performance is strongly influenced by the morphology of the TiO₂ nanoparticulate matrix. To explore the effect of TiO₂ morphology, a series of three nanocomposite solar‐cell devices are studied using 9, 50, and 300 nm TiO₂ nanoparticles, respectively. The photovoltaic efficiency increases dramatically with increasing particle size, from 0.2 % for the 9 nm sample to 2.8 % for the 300 nm sample. Performance improvements are attributed primarily to greatly improved charge transport with increasing particle size. Other contributing factors may include increased photon absorption and improved interfacial characteristics in the larger‐particle‐size matrix.     

NH_2D斯塔克效应调制CO_2激光器

在CO_2激光器外部一个20厘米长的气体盒上,加上400赫、20代有效值正弦波调制信号和440伏直流偏压,当气压为5托时,得到了41%的调制度.计算了气体盒的最大调制度,其值为42%,与实验所得到的最大调制度很好地符合.当正弦波调制信号为2兆赫、20伏有效值时,达到12%的调制度.NH_2D由ND_3和NH_3混合而制备,ND_3由作者自制.     

钛掺杂对Ge2Sb2Te5薄膜相变特性的改善

利用椭偏光谱术与XRD对钛掺杂Ge2Sb2Te5薄膜中钛元素对体系的光学性质及其微结构的影响进行了实验研究。进而对该薄膜进行的变温阻抗实验表明,钛掺杂Ge2Sb2Te5薄膜与未掺杂的薄膜相比具有更好的热稳定性。基于对薄膜样品的数据保持能力测试的实验数据,经阿伦纽斯外推处理可知,钛掺杂Ge2Sb2Te5薄膜样品的10年数据保持温度要高于未掺杂Ge2Sb2Te5薄膜样品。本文的实验结果均证实,钛掺杂Ge2Sb2Te5薄膜更适合应用于相变随机存取存储器中。     

压印技术制备超高密度Si_2Sb_2Te_5基相变存储阵列

采用低成本、高效率的压印技术实现了高密度相变存储器(PCRAM)存储阵列的制备,开发出Si2Sb2Te5(SST)新材料的4Gbit/inch2存储阵列,存储单元面积为0.04μm2;利用SEM观测压印获得的光刻胶图形阵列以及刻蚀后的SST存储阵列,其单元外形均具有高度的一致性,且单元特征尺寸的3倍标准差均小于6nm;利用AFM研究了SST存储单元的I-V特性,阈值电压为1.56V,高、低电阻态阻值变化超过两个数量级。实验结果表明了SST新材料及压印技术在PCRAM芯片中的应用价值。     

FTIR监测浙江地区空气中C2H2和C2H6及其相关分析

使用多次反射池FTIR系统在2010年12月对浙江地区两种挥发性气体乙炔（C2H2）和乙烷(C2H6）进行了监测,通过对测量气体的吸收光谱进行光谱定量分析,获取了这两种组分的浓度信息,并分析了它们的相关性。研究结果表明,该测量系统能以非接触的方式对空气中多种气体进行在线监测,及时反应测量区域内浓度信息。     

FTIR监测浙江地区空气中C_2H_2和C_2H_6及其相关分析

使用多次反射池FTIR系统在2010年12月对浙江地区两种挥发性气体乙炔（C_2H_2）和乙烷（C_2H_6）进行了监测,通过对测量气体的吸收光谱进行光谱定量分析,获取了这两种组分的浓度信息,并分析了它们的相关性。研究结果表明,该测量系统能以非接触的方式对空气中多种气体进行在线监测,及时反应测量区域内浓度信息。     

Performance Analysis of the ATM Adaptation Layer 2 (AAL2)

In this paper, we analyze the performance of AAL2 multiplexer for a continuous time Markovian arrival process. AAL2 CPS (Common Part Sublayer) packets are multiplexed in the AAL2 multiplexing queue and transmitted in the transmission queue. This tandem structure suggests that the statistics of AAL2 CPS requires at least 2 dimensional state space. Furthermore, from a network-level point of view, cell multiplexing and de-multiplexing procedures are repeated at each AAL2 switching node. That requires simple analysis model. To solve this problem, we reduce the state space by showing that the output process of multiplexing queue can be modeled with the Coxian distribution. We propose a single dimension analysis model of the CPS transmission queue. When AAL2 convey both real and non real time short packets, QoS management is a problem. This is because the QoS of real time as well as non-real time packets is measured using different metrics – delay and cell loss ratio respectively. Most previous work is concentrated around delay performance due to the real time applications getting the primary attention. From the direct comparison of delay and CLR performance, we show that delay constraint is the dominant parameter in QoS of AAL2.     

血卟啉单甲醚-光动力疗法对Bcl-2的作用

体外研究表明,光动力疗法(PDT)主要是通过诱导细胞凋亡达到杀死细胞的目的。Bcl-2可以抑制凋亡的发生。为了研究血卟啉单甲醚(HMME)光动力诱导的HeLa细胞凋亡对Bcl-2的作用,收集照射(15mW／cm^2,5．4J／cm^2)后0、2、4、6h的细胞,用半胱氨酸天冬氨酸特异性蛋白酶(caspase-3)的活性表征细胞凋亡的发生;通过western杂交检测PDT处理后细胞内Bcl-2含量的变化。研究发现,PDT处理后与0h相比,2、4、6h后caspase-3的活性有增高的趋势,但Bcl-2的含量没有明显的变化。     

A 3.5-ns, 2-W, 20-mm/SUP 2/, 16-kbit ECL bipolar RAM

A 3.5-ns emitter-coupled logic (ECL) 16-kbit bipolar RAM with a power dissipation of 2 W, a cell size of 495 /spl mu/m/SUP 2/, and a chip size of 20 mm/SUP 2/ has been developed. High performance is achieved using a high-speed Schottky barrier diode decoder with a pull-up circuit and a double-stage discharge circuit for a word-line driver. Small cell size is obtained using ultra-thin Ta/SUB 2/O/SUB 5/ film capacitors and 1-/spl mu/m U-groove isolation technology. An access time of 3.5 ns in this 16-kb bipolar RAM is equivalent to an effective access time of 2.5 ns at the system level, due to an on-chip address buffer and latch.     

An experimental 2-bit/cell storage DRAM for macrocell ormemory-on-logic application

A multiple-level 2-bit/cell storage technique for DRAMs (dynamic random-access memories) has been developed. The total RAM area is reduced and the cell array is cut in half. Since the memory cell area is especially defect-sensitive, this technique is highly effective for process yield improvement. Reasonable access time has been realized with this technique: 170 ns is still fast enough for many ASIC (application-specific integrated circuit) memory applications. This technique meets the requirement of high density and moderate speed. It was found that the 2-bit/cell storage technique is suitable for macrocell or memory-on-logic type application     

Effect of H2O evolving from TEOS based SiO2 film on the EEPROM cell characteristic

In this paper, we investigate the effect of water (H₂O) molecules evolving from silicon dioxide (SiO₂) film deposited by low pressure chemical vapor deposition (LPCVD) at 670 °C on the transistor characteristic of an electrically erasable programmable read only memory (EEPROM) cell. Fourier Transform Infra red (FT-IR) analysis reveals that H₂O is captured during film deposition and diffused to silicon surface during high thermal processing. The diffused H₂O molecules lower threshold voltage (V_t) of cell transistor and, thus, leakage current of the cell transistor is increased. In erased cell, V_t lowering is 0.25 V in which it increases leakage current of cell transistor from 1 to 100 pA. This results in the lowering of high voltage margin of a 512 Kb EEPROM from 2.8 to 2.6 V at 85 °C.     

Solar‐Energy Conversion in TiO2/CuInS2 Nanocomposites

The search for low‐cost thin‐film solar cells, to replace silicon multi‐crystalline cells in due course, calls for new combinations of materials and new cell configurations. Here we report on a new approach, based on semiconductor nanocomposites, towards what we refer to as the three‐dimensional (3D) solar‐cell concept. Atomic layer chemical vapor deposition is employed for infiltration of CuInS₂ inside the pores of nanostructured TiO₂. In this way it is possible to obtain a nanometer‐scale interpenetrating network between n‐type TiO₂ and p‐type CuInS₂. X‐ray diffraction, Raman spectroscopy, photoluminescence spectroscopy, scanning electron microscopy, transmission electron microscopy, and current–voltage measurements are used to characterize the nanostructured devices. The 3D solar cells obtained show photovoltaic activity with a maximum monochromatic incident photon‐to‐current conversion efficiency of 80 % and have an energy‐conversion efficiency of 4 %.     

Improved flash cell performance by N2O annealing ofinterpoly oxide

In this letter, we report the effects of N₂O annealing of interpoly oxide on flash cell performance. It is demonstrated that by adding an N₂O anneal after interpoly oxide formation, improved cycling endurance is achieved. The program and erase efficiencies are also improved significantly, compared to the control cell without N₂O anneal. The cells with N₂O anneal show higher cell current (i.e., drain current), which can be ascribed to a lower threshold voltage and higher transconductance, compared to the control cell     

2/3 divider cell using phase switching technique

A novel 2/3 divider cell using a new phase switching technique is described. This circuit is very simple and could work under conditions of very high frequency and low power consumption. HSPICE simulation results show the proposed 2/3 divider cell has excellent performance and could be applied to gigahertz frequency range prescalers     

Exact analysis in discrete time of 2×2 ATM switch servingcorrelated traffic at both inputs

A simple and exact discrete-time closed-form expression is derived for the cell loss probability (CLP) in a 2×2 ATM switch supplied at each input by a two-state Markov source with general transition probabilities, thus generalising a previous result in which only one of the inputs is correlated. This exact result is used to study the effective bandwidth approximation     

Simulation study of AAL type 2

Cellular network applications are growing drastically and this requires a fast and efficient transport method between the base station and the mobile switching center. One possible solution is to use ATM links. The low data rate and small-sized packets in the typical cellular applications imply that significant amount of link bandwidth would be wasted, if this small sized packet is carried by one ATM cell. For efficient operation for such cellular and low bit rate applications, a new type of ATM Adaptation Layer, AAL type 2, has been proposed. In this paper, the principles of AAL type 2 are briefly described along with the introduction of other alternatives which have formed the basis for this new AAL. The result from the simulation to study the performance of the AAL type 2 is discussed from the point of a packet delay and ATM cell use efficiency. Due to the variable sizes of packets in this application, the fairness issue in serving variable sized packets is also discussed along with the effect of the fair queueing algorithm implemented at AAL type 2. This revised version was published online in August 2006 with corrections to the Cover Date.     

2 GHz 2 Mb 2T Gain Cell Memory Macro With 128 GBytes/sec Bandwidth in a 65 nm Logic Process Technology

We present 2 Mb 2T PMOS gain cell macro on 65 nm logic process that has high bandwidth of 128 GBytes/sec, fast cycle time of 2 ns and 6-clock cycles access time at 2 GHz. Macro features a full-rate pipelined architecture, ground precharge bitline, non-destructive read-out, partial write support and 128-row refresh to tolerate short refresh time. Cell is 2X denser than SRAM and is voltage compatible with logic.