数字超声无损探伤系统中模拟电路的设计实现

在超声波无损探伤原理的基础上,介绍了A型数字超声探伤系统中模拟部分的设计与实现。模拟电路部分包括：激励超声波探头的宽带窄脉冲发射电路,隔离发射和接收的限幅电路,可控增益放大电路以及滤波等信号调理电路。在模拟电路的设计实现中,以STM32和FPGA为控制核心,实现对超声波发射和接收的控制。这些电路采用模块化的设计思想,功能强大、容易实现,具有广泛的应用价值。实验结果表明,这些电路性能良好,稳定可靠。     

电子线路学习方法(二十一) 第十三讲 保护电路分析方法

在许多电子电器整机电路中,需要多种形式的保护电路,以保障电路的工作安全.一、三种基本保护电路分析方法保护电路主要有下列三种形式:(1)信号切断式保护电路.(2)电源切断式保护电路.(3)负载切断式保护电路.1.信号切断式保护电路分析方法如图1所示是信号切断式保护电路方框图,主要有信号控制电路、过载检测与放大电路等构成....     

基于伪随机信号的模拟电路软故障定位方法

针对模拟电路软故障的测试难题,提出了定位模拟电路软故障的伪随机激励测试法.伪随机激励信号是一种包含多个频率成分的连续周期信号,由m序列生成.利用该信号激励模拟电路.通过计算输出响应序列的功率谱密度,不仅可以实现模拟电路软故障的数字化特征提取.而且还可以完成对模拟电路软故障的定位.以状态变量滤波器电路为例,分别利用交流激励信号和伪随机信号进行诊断,通过对比实验,验证了伪随机信号对定位模拟电路软故障的有效性,为实现模拟电路故障诊断的高覆盖率和诊断自动化提供了一种新途径.     

虚拟超声波无损探伤系统前端电路设计实现

基于虚拟式超声波无损探伤设备,介绍了该仪器设备的前端电路设计与实现,主要包括:用于激励超声波探头的脉冲发射电路,高增益的超声波接收电路,以及隔离、滤波等相关的信号调理电路.在前端电路的设计实现中,以AT89C52单片机为控制核心,实现对信号发射与接收的控制.这些电路采用模块化的设计思想和成熟的技术,电路功能强、易于实现,并具有广泛的应用价值.实验结果表明,这些电路性能稳定可靠,使用效果良好.     

电机保护电路设计

电机保护电路的保护功能是在电机工作中实现过压过流以及欠流保护,通过对电压电流信号的采样,设定一个保护值,通过一个比较电路来判断是否过压过流或者欠流,然后通过一个驱动电路来驱动电磁继电器的吸合来实现电路的通断,就可以实现保护功能。对于保护电路的精度作了一定量的计算。     

一种带辅助电路的全桥移相ZVS变换器拓扑的设计

许多结构诸如添加饱和电感、在滞后臂并联由电感和开关管组成的辅助电路、副边采用倍流整流电路等被用来拓宽传统全桥ZVS拓扑实现零电压开关的负载范围,减小占空比的丢失,但这些方法往往成本高,设计难度大.我们以低成本,设计简单同时又能满足系统性能为出发点给出了一种带简单的LC辅助谐振电路的变换器拓扑.论文阐述了该变换器的基本工作原理,分析了占空比的丢失和实现ZVS的范围.在设计中通过折中考虑各个元件参数使得系统获得最佳性能,并给出了一个1.2 kW变换器的设计实例来说明如何找到系统的最佳参数.     

LEM闭环传感器在信号采样中的应用

LEM传感器可广泛用于电力电子行业的电量控制和测量,以保证系统的高效、可靠性和安全.介绍了LEM闭环电流、电压传感器的性能、基本工作原理以及应用注意事项,给出了该传感器在直流电压、交流电流及电源电压同步信号采样中的应用电路,同时给出了采样电路中采样电阻的选择方法.     

红外探测器的低噪声前置放大电路设计

在红外探测器的工程应用中,前置放大电路是影响整个探测系统性能的重要组成部分。本文从制冷型碲镉汞光导红外探测器的工作特性出发,设计了一种恒流偏置的低噪声前置放大电路。对电路的工作原理以及噪声性能进行分析,并进行了电路仿真验证以及低噪声的性能测试。实验结果表明,基于窄带滤波法设计的前置放大电路信噪比达到80 dB,具有60~120 dB的可调增益,可以有效抑制噪声并检测到10-8A量级的微变交流信号,在信号检测方面达到了良好的检测效果。     

充放电电源变换器的制作与分析

本系统以Buck-Boost电路为主回路拓扑作为核心电路,实现放电时升压恒流,充电时降压恒流,以MSP430单片机为主控制器和PWM信号发生器,根据反馈信号对PWM信号做出调整,进行可靠的闭环控制,从而实现稳压输出.     

低压低功耗CMOS带隙电压基准及启动电路设计

介绍了一种低压电流模带隙电压基准电路,并提出了一种新颖的启动电路结构.电路采用预先设置电路工作点和反馈控制相结合的方法有效地克服了第三简并点的问题,从而保证电路能够正常工作.文中给出详细的分析和电路实现,并给出了一种电路简并点和启动裕度分析的SPICE仿真方法.电路采用0.25μm CM0S工艺设计并流片.最后对电路的测试结果进行了比较和分析.     

A Signal-Flow Driven Automatic Physical Synthesis Methodology for Analog Circuits

This paper introduces a novel automatic physical synthesis methodology for analog circuits based on the signal-flow analysis.Circuit analysis sub-system adopts the newly advanced methodology,circuit topology analysis,and circuit sensitivity analysis to generate layout constraints and control performance degradations.Considering the heuristic information about signalflow，complexity of the methodology is less than the pure performance-driven methodology.And then these constraints are implemented in device generation,placement，and routing sub-systems separately,which makes the different constraints be satisfied at most easily implemented stages.Excellent circuit performance obtained by the methodology is demonstrated by practical circuit examples.     

Symbolic pole/zero calculation using SANTAFE

The aim of symbolic analysis is to gain insight into circuit behavior. To study the behavior of analog circuits, the locations of the poles and zeros have to be known. Unfortunately, no general method exists to calculate the poles and zeros symbolically for polynomials of degree greater than four from transfer functions in coefficient form. The CAD tool SANTAFE (Symbolic Analysis of Transfer Functions) applies the signal-flow graph method, which permits to keep the result in a factorized or partially factorized form. The graphic view provided by a signal-flow graph offers insight into the internal interactions between the circuit elements and, as will be demonstrated, enables the user to perform circuit knowledge-based approximations. A novel procedure based on symbolic Newton-iteration, accurately calculates high-order transfer functions in the desired pole/zero form. Another special routine, based on element weight ratios rather than numerical values, enables the simplification of large symbolic expressions without numerical values for each parameter. With the program SANTAFE, even large networks can be analyzed symbolically. This will be shown with an example of a wide band BiCMOS operational amplifier     

Simulation-based analog and RF circuit synthesis using a modified evolutionary strategies algorithm

This paper presents a simulation-based analog circuit synthesis methodology. Simulation-based approach is preferred so that the synthesizer, SACSES, is topology independent and requires minimal user effort. We argue that both the simulator and the search algorithm have to be optimized for analog circuit synthesis. In this regard, instead of using a commercially available simulator, an accelerated simulator, SPASE, is implemented. Various acceleration mechanisms for DC, AC and noise simulation are discussed. For example, it is shown that taking the previous DC solution as the starting point of the next DC analysis more than halves the number of iteration required for convergence. A modified version of self-adaptive evolutionary strategies, which incorporates the Metropolis criterion in the selection mechanism, is used as the search algorithm. Smooth penalty mechanisms for biasing constraints are proposed and embedded in the algorithm. Usefulness of the tool is validated by three synthesis examples.     

一种用CFA实现的通用高阶滤波器

以信号流图为基础,用CFA设计了一种通用高阶滤波电路。这种电路结构由CFA和电阻、电容组成,具有通用性,只需调整接地阻抗的值,就能实现高阶低通、带通、高通及带阻几种不同的滤波功能。列举了四阶带通和五阶高通两种滤波器,并对两种滤波器进行了仿真,PSpice仿真结果与理论分析一致。     

Flexible active filter design using operational amplifier pole

A synthesis procedure for generating second-order active filters using the operational amplifier pole and a single external capacitor is given. The proposed method is based on drawing the signal-flow graph from the given transfer function and obtaining the circuit realization from the graph.     

The effect of propagation delay uncertainty on the speed oftime-of-flight digital optoelectronic circuits

Time-of-flight synchronization is a new digital design methodology for optoelectronics that eliminates latches, allowing higher clock rates than alternative timing schemes. Synchronization is accomplished by precisely balancing connection delays. Circuits use pulse-mode signaling and clock gates to restore pulse timing. Many effective pipeline stages are created within combinational logic without extra hardware bounding the stages. Time-of-flight design principles are applicable to packet routing and sorting processors for optical interconnection networks. Circuits are unique because the clock rate is limited primarily by imprecision in propagation delay rather than absolute delay, as in circuits with latches. We develop a general model of delay uncertainty and focus on the effect that static and dynamic uncertainty accumulated over circuit paths has on the minimum feasible clock period. We present a method for traversing the circuit graph representation of a time-of-flight circuit to compute arrival time uncertainty at each pulse interaction point. Arrival time uncertainties give rise to pulse width and overlap constraints. From these constraints we formulate a constrained minimization to find the minimum clock period. We demonstrate our method on circuits implemented with 2×2 electro-optic switches and optical waveguides and find the electronic component of path uncertainty frequently limits speed     

Method of generating low-sensitivity RC active circuits

A flexible method of generating low-sensitivity RC active circuits is described. An artifice is used to derive two equations from a given transfer function, and these equations are represented by a signal-flow graph which can be manipulated to a form which indicates a desirable circuit. Illustrative examples are given, and a solution to an important practical problem is outlined.     

General Method for Calculating the Spectrum of a Zero Substitution Coded Signal

This paper describes a general method for calculating the power spectra of zero substitution coded signals and applies this method to calculate the B3ZS signal spectrum of the DS-3. Many digital radio systems transmit a signal which consists of DS-3 level baseband signals. Therefore, knowledge of the B3ZS spectral characteristics is important in DS-3 level interference and systems studies. The method used for calculating spectral densities of substitution coded signals is based on signal-flow graph analysis. While signal-flow graph identities and Mason's gain formula have been used in the past in the calculation of some substitution coded spectra, they become unduly cumbersome when applied towards complex spectra such as that of the B3ZS signal. In place of the graph identities and gain formula, two matrix techniques are introduced that can be used in general to simplify spectral calculations for substitution coded signals. The methodology used in analyzing these communication signals can also be applied to other related fields such as coding of signals for magnetic recordings.     

光栅测量芯片中显示接口的设计

提出了一种光栅测量芯片中液晶显示接口的电路设计方法,电路主要由四个模块组成:MCU,CDU,I/O 以及一个同步 FIFO.使用 SMGl2864C 这款芯片作为液晶驱动模块,并应用了 Verilog 硬件描述语言来对整个电路结构进行描述,之后使用 Modelsim 工具来进行功能仿真,最后应用 Synplify 工具对所设计的整个电路进行综合.通过在 Xilinx VirtexⅡ FPGA 平台上进行的后仿真及验证,得到的时序分析结果显示出所设计的电路满足显示接口的设计要求.此外,本电路还有着很好的灵活性及可移植性,通过修改 MCU 模块中的时序约束参数,就可以达到在其他的液晶驱动电路下工作的目的.     

Linear and nonlinear modeling of switched-capacitor ΔΣ modulators

A new methodology is presented for both linear and nonlinear circuit-level modeling of switched-capacitor ΔΣ modulators. It takes account of the MOSFET parasitic capacitances, switch on-resistances, opamp gain-bandwidth products, the nonlinear behavior of the parasitic capacitances and opamps, clock jitter, etc. Mathematically, a system of circuit equations is constructed by nodal analysis in the frequency domain, and its solutions in the form of Volterra series are mapped into the time domain by numerical Laplace inversion. The methodology can be used for nonlinear-distortion analysis. It is implemented in software within MATLAB.