IMD reduction in CMOS double-balanced mixer using multibias dual-gate transistors

This paper presents a novel and simple linearization scheme for a CMOS double-balanced mixer based on the use of multibias dual-gate transistors. In this technique, intermodulation-distortion (IMD) components with proper phase relationship, generated by devices operating at different bias conditions, are combined together to improve the linearity of mixers. For experimental verification, the measured performance of a fabricated CMOS mixer is shown. Over 35 dB of IMD reduction is achieved by the proposed method under proper biasing condition.     

5.8GHz WLAN CMOS双平衡混频器的设计

介绍了基于0．18μm CMOS工艺的802．11a无线局域网（WLAN）有源双平衡混频器的设计方法。该混频器射频（RF），本振（LO）和中频（IF）信号频率分别为5．8GHz，4.6GHz和1．2GHz。仿真结果显示：在1．8V电压下；变频增益为4．27dB，单边带噪声系数为10．73dB，1dB压缩点为-13．18dB，三阶输入截点为-3．04dB，功耗为32．4mW，芯片面积为1．8mm×1mm。     

12 GHz receiver with self-oscillating dual-gate MESFET mixer

A hybrid integrated 12 GHz receiver, fabricated on a 1 ×2N alumina substrate, contains a two single-gate FET preamplifier, one dual-gate FET self-oscillating mixer, IF matching and bias filters of all FETs. 11?14 dB conversion gain for a bandwidth of 400 MHz and an associated noise figure of 4.5?5 dB have been obtained.     

Wideband microstrip balanced mixer

A novel microstrip balanced mixer circuit has been developed with over 40% bandwidth. The circuit uses two coupling rings for RF and LO inputs. A conversion loss of less than 8dB has been achieved for the RF frequency swept from 13 to 23 GHz with an LO signal at 25 GHz.     

Broadband uniplanar balanced subharmonic mixer

A novel wideband uniplanar balanced subharmonic mixer is proposed and demonstrated. The mixer is based on the broadband tapered coplanar waveguide (CPW) DC-block filter, and the in-phase and out-of-phase T-junctions interconnected through a pair of quarter-wavelength slotlines. The fabricated subharmonic mixer has an RF bandwidth over one octave from 12 to 28 GHz with a conversion loss ranging from 8.5 to 12.5 dB.     

Wide-band balanced active HEMT mixer

The design and characteristics of a balanced active high electron-mobility transistor (HEMT) mixer operating in the 4.5-10-GHz frequency band are described in this paper. It consists of two parts implemented as independent hybrid circuits, namely, an microwave part fabricated by using a uniplanar technology and comprising a 180° hybrid ring coupler, HEMTs, and input-output matching circuits, and a low-frequency part consisting of an L-C balun and a low-pass filter built of discrete elements. The design of the microwave part of the mixer ensures a high degree of isolation between the signal and local-oscillator (LO) inputs within a wide frequency band at low IF. The measurements show a conversion gain of 5-7 dB, noise figure of 5-7.5 dB, and isolation between the signal and LO ports greater than 20 dB within the 4.5-10-GHz range     

X-band balanced mixer using evanescent-mode circuitry

An X-Band balanced mixer using evanescent-mode circuitry has been developed utilising a waveguide magic-T. It shows an available conversion loss of 4.4 dB and a noise figure of 5.6 dB including a 1.2 dB noise contribution from an i.f. amplifier at a radio frequency of 8.61 GHz. Image and sum frequency are largely independently tunable.     

High-performance current bleeding CMOS mixer

A high-performance mixer, known as the amplifier-driven double-balanced Gilbert-cell mixer, is proposed and implemented in 0.18 mum RFCMOS technology. A class-A amplifier-based current bleeding source is used to amplify the local oscillator signal and improve transconductance of the transconductor stage. The conversion gain is measured to be 17.5 dB when the LO power is 14 dBm only. The measured noise figure is better than 12.5 dB. The chip area is 1.2 1.3 mm and the power consumption is 12 mA at 1.5 V supply voltage.     

A CMOS switched transconductor mixer

A new CMOS active mixer topology can operate at low supply voltages by the use of switches exclusively connected to the supply voltages. Such switches require less voltage headroom and avoid gate-oxide reliability problems. Mixing is achieved by exploiting two transconductors with cross-coupled outputs, which are alternatingly activated by the switches. For ideal switching, the operation is equivalent to a conventional active mixer. This paper analyzes the performance of the switched transconductor mixer, in comparison with the conventional mixer, demonstrating competitive performance at a lower supply voltage. Moreover, the new mixer has a fundamental noise benefit, as noise produced by the switch-transistors and LO-port is common mode noise, which is rejected at the differential output. An experimental prototype with 12-dB conversion gain was designed and realized in standard 0.18-/spl mu/m CMOS to operate at only a 1-V supply. Experimental results show satisfactory mixer performance up to 4 GHz and confirm the fundamental noise benefit.     

A GaAs double-balanced dual-gate FET mixer IC for UHF receiver front-end applications

A double-balanced dual-gate FET mixer has been developed for application in the front-end circuit of UHF receivers. A 6-8-dB conversion gain has been obtained without an additional matching circuit over a wide frequency range from 100-800 MHz with good suppression of RF/LO feedthrough by more than 20 dB and third-order intermodulatian product of -60 dB.     

A 1-GHz CMOS up-conversion mixer

A high-frequency linear MOS mixer topology is presented for the implementation of a 1-GHz up-conversion mixer in a standard 0.7-μm CMOS technology. The high output bandwidth has been achieved by the development of an nMOS-only current amplifier that converts the modulated current of the nMOS mixing transistor biased in the linear region to the RF output voltage     

A 77 GHz SiGe sub-harmonic balanced mixer

A novel SiGe 77 GHz sub-harmonic balanced mixer is presented with a goal to push the technology to its limit [SiGe2-RF transistor (f/sub T/=80 GHz)]. This new topology uses a compact input network not only to achieve high isolation between the LO and RF ports, but also to result in excellent 2LO-RF isolation. The measured results demonstrate a conversion gain of 0.7 dB at 77 GHz with an LO power of 10 dBm at 38 GHz, LO-RF isolation better than 30 dB, 2LO-RF isolation of 25 dB, and a P/sub 1dB/ of -8 dBm. The mixer core consumes 4.4 mA at 5 V. The circuit demonstrates that SiGe sub-harmonic mixers have comparable performance with GaAs designs, at a fraction of the cost.     

26-34 GHz CMOS mixer

A 26-34 GHz fully integrated CMOS down mixer is presented. At 30 GHz RF frequency and 2.5 GHz IF frequency, 50 /spl Omega/ terminations, 5 dBm LO and 1.2 V/spl times/17 mA supply power, the circuit yields a conversion loss of 2.6 dB, an SSB NF of 13.5 dB and an IIP3 of 0.5 dBm.     

An ultra-low-voltage ultra-low-power CMOS active mixer

The scaling of CMOS technology has greatly influenced the design of analog and radio-frequency circuits. In particular, as technology advances, due to the use of lower supply voltage the available voltage headroom is decreased. In this paper, after a brief overview of conventional low-power CMOS active mixer structures, we introduce an active mixer structure with sub-mW-level power consumption that is capable of operating from a supply voltage comparable or lower than the threshold voltage of the transistor. In addition, the proposed architecture provides a performance and conversion gain (CG) that compares favorably or exceeds those of the state-of-the-art designs. As a proof-of-concept, a wide-band DC to 8.5 GHz down-conversion mixer is designed and fabricated in a 90-nm CMOS process. Measurement results show that the mixer achieves a CG as high as 18 dB while consuming 98 μW from a 0.3-V supply.     

A millimeter-wave monolithic doubly balanced diode mixer

A broadband miniature doubly balanced diode mixer chip fabricated by Win's 0.15μm pHEMT technology is presented. In order to save chip area, a four-fold modified Marchand balun is used. A coupled line U section improves the port to port isolation and provides the IF-output port. The mixer achieves a low conversion loss of 5.5 to 10.7 dB and high isolation of more than 26 dB over a 26-40 GHz RF/LO bandwidth and a DC-14 GHz IF bandwidth. The mixer's chip size is around 0.96 mm~2.     

一种单片毫米波双平衡二极管混频器

本文介绍了一种采用WIN 0.150.15μm pHEMT设计的单片双平横二极管混频器。本次设计中采用了改进的折叠型Marchand balun来减少芯片面积。同时电路中还使用U型耦合线改善了端口之间的隔离度并提供了中频输出端口。该混频器取得了较好的测试结果,在26-40 GHz频带范围内,混频器具有较低的变频损耗为5.5-10.7dB,隔离度大于26dB,并且中频带宽为DC-14 GHz,芯片面积为0.96mm2     

A self-diplexing quasi-optical magic slot balanced mixer

Drawing on the principles of operation of the magic tee balanced mixer, a quasi-optical magic slot balanced mixer is proposed. The mixer exploits a diametrically fed annular slot radiator which radiates two orthogonal polarizations which are used as signal and local oscillator input ports. The idea has been tested at microwave frequencies. The measured radiation impedances, radiation patterns and conversion efficiency show that reasonable performance is readily obtained over a 30% bandwidth and that this quasi-optical balanced mixer is suitable for submillimeter wave applications     

Fully balanced CMOS current-mode circuits

A fully balanced current-mode circuit topology has been developed for analog signal processing applications. The basic building block, a 5-V fully balanced current mirror/amplifier, has been fabricated using a standard 2-μm n-well CMOS process. With a peak signal to bias current ratio i/I=0.5, the open-loop total harmonic distortion was-70 dB. With the addition of sampling switches, the current mirror/amplifier forms a fully balanced switched-current integrator that exhibits first-order cancellation of clock-feedthrough/charge-injection effects. Fully balanced SI ladder filters have been implemented using a 2-μm p-well CMOS process. For a sampling frequency of 128 kHz, the five-pole Chebyshev low-pass ladder filters met design specifications of 0.1-dB passband ripple and 5-kHz bandwidth. The dynamic range was 81.5 dB, and the total power dissipation was 14 mW with V_dd 5 V