Formation and growth of interfacial intermetallic layers of Sn–8Zn–3Bi–0.3Cr on Cu,Ni and Ni–W substrates

In this paper, the formation and growth of intermetallic compounds (IMCs) of Sn–8Zn–3Bi–0.3Cr solder on Cu, Ni and Ni–W substrates have been investigated. For the Cu substrate, only Cu₅Zn₈ intermetallic compound was observed. For the Ni substrate, a Ni₅Zn₂₁ film formed at the interface due to the fast reaction between Ni and Zn. For the Ni–W substrate, a thin Ni₅Zn₂₁ film appeared between the solder and Ni–W layer, whose thickness decreases with the increase of W content. A bright layer was also found to form below the Ni₅Zn₂₁ layer as aging time extended, which is caused by the diffusion of Zn into Ni–W layer.     

High temperature Hall effect measurements of semi-insulating 4H–SiC substrates

High temperature Hall effect and resistivity measurements have been made on semi-insulating 4H–SiC samples. Both vanadium doped and undoped materials have been studied. Resistivity measurements before and after annealing up to 1800 °C are also reported. The thermal activation energy of the resistivity in vanadium doped samples has one of two values, 1.5 and 1.1 eV, due, respectively, to the vanadium donor level and an as yet unidentified defect. The activation energies for high purity semi-insulating material (HPSI) varied from 0.9 to 1.5 eV. Hall effect measurements were made on several HPSI and 1.1 eV V-doped samples. In all cases the material was found to be n-type. Mixed conduction analysis of the data suggests that the hole concentration is negligible in all samples studied. This suggests that the defects responsible for the semi-insulating properties have deep levels located in the upper half of the bandgap. The resistivity of V-doped samples were unaffected by anneals up to 1800 °C. The annealing results for HPSI samples were mixed.     

The influence of electroless metallization process parameters on basic electric properties of Ni–P alloy

This paper presents the modification of manufacturing process parameters and the effect of this on electroless deposited Ni–P resistive layers. By modifying the manufacturing technology of the resistive layer in the electroless metallization process a minimization of the Temperature Coefficient of Resistance (TCR) for fixed resistors obtained with the use of Ni–P alloys was achieved. The optimization of bath acidity, and process intensification as a result of the increase in the concentration of basic parent substances were the main factors influencing the features of the resistive layer.     

Matrix-type effect on the magnetotransport properties of Ni–AlO and Ni–NbO composite systems

The effect of the insulating-matrix material on the electronic and magnetic properties of nanocomposites is investigated in the Ni_x(Al₂O₃)_100–x metal–insulator system and the Ni_x(Nb₂O₅)_100–x metal–semiconductor system. It is established that the characteristics of composites determined by electron transport through the matrix (the electrical resistivity, the position of the electrical percolation threshold, the magnetoresistance effect) depend on the material type. Replacement of the matrix from Al₂O₃ to Nb₂O₅ results in a decrease in the electrical resistivity by two–three orders of magnitude, a decrease in the magnetic resistivity by more than an order of magnitude, and in displacement of the percolation threshold from 40 to 30 at % of Ni. In this case, the magnetic properties of the composites are independent of the type of matrix: the concentration of the magnetic percolation threshold is identical in the two systems (~45 at % of Ni), and the coercive force of the samples occurring beyond the percolation threshold is close in magnitude (5–8 and 12–18 Oe) in the Ni_x(Nb₂O₅)_100–x and Ni_x(Al₂O₃)_100–x composites, respectively.     

Effect of temperature on the electrophysical properties of Si–polymer composite varistors

A low voltage Si–polymer composite varistor was prepared at a temperature of 130 °C and a pressure of 60 MPa and its current–voltage characteristic was studied. Also, temperature dependence of current–voltage characteristic was investigated in the temperature range of 25–100 °C. It was found that any increase in ambient temperature lowers breakdown voltage as well as nonlinearity coefficient. Each sample has hysteresis which decreases through increase in temperature. Annealing effect on leakage current, breakdown voltage and nonlinear coefficient was both investigated and analyzed using SEM micrographs and XRD patterns.     

Atmospheric corrosion resistance of electroplated Ni/Ni–P/Au electronic contacts

Atmospheric corrosion has vast consequences on the reliability of electronic connectors. This study determined the corrosion resistance of Ni/Ni–P plating metallurgy as a function of plating current density and plating thickness. Discrepancy was observed in the neutral salt spray (NSS) and mixed flowing gas (MFG) tests. Thicker Ni–P deposits displayed superior corrosion resistance in MFG tests while thinner Ni–P deposits performed better in NSS tests. This disparity was attributed to the intrinsic corrosion susceptibility of Ni–P against chlorine or sulfur assisted corrosion. Corrosion products were analysed for better understanding of the corrosion mechanism. NSS test produced green corrosion residues consisting of CuCl (nantokite) and CuCl₂(OH)₃ (clinoatacamite) and brown residues consisting of Cu₂O (cuprite). MFG test produced sulfides of copper (major) and nickel (minor).     

Microwave properties and applications of Y–Ba–Cu–O thin films grown on various substrates

Microwave properties of YBa₂Cu₃O_7-δ (YBCO) films grown on (100) LaAlO₃ (LAO), (110) NdGaO₃ (NGO) and (001) SrLaAlO₄ (SLAO) substrates were studied in the form of a microstrip ring resonator at temperatures above 20 K. The YBCO resonator on a SLAO substrate showed microwave properties better than or comparable to other YBCO resonators on LAO substrates. For the YBCO resonators on LAO and SLAO substrates, both Q_U and f₀ appeared to decrease as the temperature was raised. Meanwhile the resonator on a NGO substrate showed different behaviors with Q_U showing a peak at ∼70 K, which are attributed to the unique temperature dependence of the loss tangent of the NGO substrate. An X-band oscillator with a YBCO ring resonator coupled to the circuit was prepared and its properties were investigated at low temperatures. The frequency of the oscillator signal appeared to change from 7.925 GHz at 30 K to 7.878 GHz at 77 K, which was mostly attributed to the change in f₀ of the YBCO ring resonator. The signal power appeared to be more than 4.5 mW at 30 K and 2.1 mW at 77 K, respectively. At 55 K, the frequency of the oscillator signal was 7.917 GHz with the 3 dB-linewidth of 450 Hz.     

The effect of sintering temperature on varistor characteristics of gallium arsenide–polyaniline–polyethylene composite varistors

GaAs-polymer composite varistors were prepared by hot pressing at a pressure of 60 MPa and different temperatures and their current–voltage characteristics were investigated. The results show that these varistors can be used to protect circuits from 46 V up to 54 V over voltages. In addition, it is found that the varistor breakdown voltage and its nonlinearity as well as its impurity band gap increase by increasing sintering temperature while the corresponding barrier height decreases. Each sample has hysteresis which decreases through the increase in sintering temperature. This causes the varistors to have longer lifetime due to their low degradation. Finally, the analysis of composite samples by scanning electron microscopy is presented and discussed.     

Influence of the annealing temperature on the ferroelectric properties of niobium-doped strontium–bismuth tantalate

Characteristics of ferroelectric thin films of niobium-doped strontium–bismuth tantalate (SBTN), which were deposited by magnetron sputtering on Pt/TiO₂/SiO₂/Si substrates, are investigated. To form the ferroelectric structure, deposited films were subjected to subsequent annealing at 700–800°C in an O₂ atmosphere. The results of X-ray diffraction showed that the films immediately after the deposition have an amorphous structure. Annealing at 700–800°C results in the formation of the Aurivillius structure. The dependences of permittivity, residual polarization, and the coercitivity of SBTN films on the modes of subsequent annealing are established. Films with residual polarization 2P_r = 9.2 µC/cm², coercitivity 2E_c = 157 kV/cm, and leakage current 10^–6 A/cm² are obtained at the annealing temperature of 800°C. The dielectric constant and loss tangent at frequency of 1.0 MHz were ε = 152 and tan δ = 0.06. The ferroelectric characteristics allow us to use the SBTN films in the capacitor cell of high density ferroelectric random-access non-volatile memory (FeRAM).     

Role of substrate temperature on MoO3 thin films by the JNS pyrolysis technique for P–N junction diode application

Molybdenum trioxide (MoO₃) thin films were prepared at different substrate temperatures from 350 to 500 °C by the jet nebulizer spray (JNS) pyrolysis technique. The effect of the substrate temperature on the structural, optical and electrical properties of MoO₃ films was characterized. The XRD pattern exposed that the crystallite size of the films increases with the increase in the substrate temperature. The SEM images showed the conversion of nanorods to sub-microsized plate-like structures by increasing the substrate temperature. The EDX analysis confirmed the presence of Mo and O elements. The UV–vis results revealed that the band gap obtained shows a decreasing trend on increasing the substrate temperature. The FTIR spectra confirmed the formation of MoO₃. The dc electrical studies portrayed the minimum activation energy of 0.064 eV obtained for higher substrate temperature. The P–N diode of p-Si/n-MoO₃ was fabricated at the substrate temperature of 500 °C. The diode parameters such as ideality factor (n), barrier height (Φ_b) and reverse saturation current (I₀) values were calculated in darkness and under different light sources (Halogen and Metal halide lamps).     

A gate-delay model focusing on current fluctuation over wide range of process–voltage–temperature variations

This paper proposes a gate-delay model suitable for timing analysis that takes into consideration wide-ranging process–voltage–temperature (PVT) variations. The proposed model translates an output-current fluctuation due to PVT variations into modifications of the output load and input waveform. After translation, any conventional model can compute delay taking into account PVT variations by using the modified output load and reshaped input waveform. Experimental results with 90- and 45-nm technologies demonstrate that the average error of the fall and rise delay estimation in single- and multi-stage gates was approximately 5% on average over a wide range of input slews, output loads, and PVT variations. The proposed model can be used in Monte Carlo STA (static timing analysis) in addition to corner-based timing analysis. It can be also used in statistical STA to calculate the sensitivities of delays to variation parameters on-the-fly even when the nominal operating condition changes as well.     

Sol–gel production of ZnO:CO: Effect of post-annealing temperature on its optoelectronic properties

Thin films of ZnO:Co were prepared by a sol–gel process. The microstructure and optoelectronic properties as a function of sintering temperature were studied extensively by optoelectronic characterizations. It was observed from the scanning electron microscopy images that the introduction of Co eliminated the commonly observed wrinkle effect in sol-gel derived films. Structurally, XRD measurements revealed that the derived film were c-axis oriented that enhances as sintering temperature increases upto 500 °C. Electrical measurements confirm that the deposited ZnO:Co thin film is n-type with decreasing resistivity as sintering temperature increases. Optical measurements revealed that the derived films exhibit good transmittance ~82% with a wide band gap ~4.01 eV.     

Sn addition on the tensile properties of high temperature Zn–4Al–3Mg solder alloys

The Zn–4Al–3Mg based solder alloy is a promising candidate to replace the conventional Pb–5Sn alloy in high-temperature electronic packaging. In this study, the tensile properties of Zn–4Al–3Mg–xSn alloys (x = 0, 6.8 and 13.2 wt.%) at high temperatures (e.g., 100 °C, and 200 °C) were investigated. It was found that the uniaxial tensile strength (UTS) of Zn–4Al–3Mg–xSn solder alloys all decrease monotonously with the increment of temperature. The elongation ratio at 100 °C is superior to that at room temperature whereas follows a significant drop at 200 °C. The microstructure observations show that a typical brittle fracture of Zn–4Al–3Mg alloy occurs at room temperature and 200 °C under normal tension, whereas a ductile fracture is found at 100 °C. The 6.8 wt.% Sn addition in Zn–4Al–3Mg alloy causes a dramatic decrease of yield strength, and a slight deterioration of the ductility.     

Impact of Ni concentration on the intermetallic compound formation and brittle fracture strength of Sn–Cu–Ni (SCN) lead-free solder joints

Cu₆Sn₅ and Cu₃Sn are common intermetallic compounds (IMCs) found in Sn–Ag–Cu (SAC) lead-free solder joints with OSP pad finish. People typically attributed the brittle failure to excessive growth of IMCs at the interface between the solder joint and the copper pad. However, the respective role of Cu₆Sn₅ and Cu₃Sn played in the interfacial fracture still remains unclear. In the present study, various amounts of Ni were doped in the Sn–Cu based solder. The different effects of Ni concentration on the growth rate of (Cu, Ni)₆Sn₅/Cu₆Sn₅ and Cu₃Sn were characterized and compared. The results of characterization were used to evaluate different growth rates of (Cu, Ni)₆Sn₅ and Cu₃Sn under thermal aging. The thicknesses of (Cu, Ni)₆Sn₅/Cu₆Sn₅ and Cu₃Sn after different thermal aging periods were measured. High speed ball pull/shear tests were also performed. The correlation between interfacial fracture strength and IMC layer thicknesses was established.     

Modeling the effect of deep traps on the capacitance–voltage characteristics of p-type Si-doped GaAs Schottky diodes grown on high index GaAs substrates

Numerical simulation, using SILVACO-TCAD, is carried out to explain experimentally observed effects of different types of deep levels on the capacitance–voltage characteristics of p-type Si-doped GaAs Schottky diodes grown on high index GaAs substrates. Two diodes were grown on (311)A and (211)A oriented GaAs substrates using Molecular Beam Epitaxy (MBE). Although, deep levels were observed in both structures, the measured capacitance–voltage characteristics show a negative differential capacitance (NDC) for the (311)A diodes, while the (211)A devices display a usual behaviour. The NDC is related to the nature and spatial distribution of the deep levels, which are characterized by the Deep Level Transient Spectroscopy (DLTS) technique. In the (311)A structure only majority deep levels (hole traps) were observed while both majority and minority deep levels were present in the (211)A diodes. The simulation, which calculates the capacitance–voltage characteristics in the absence and presence of different types of deep levels, agrees well with the experimentally observed behaviour.     

Effects of isothermal aging and temperature–humidity treatment of substrate on joint reliability of Sn–3.0Ag–0.5Cu/OSP-finished Cu CSP solder joint

This study examined the effects of isothermal aging and temperature–humidity (TH) treatment of substrate on the joint reliability of a Sn–3.0Ag–0.5Cu (wt.%)/organic solderability preservative (OSP)-finished Cu solder joint. Two types of OSP-finished chip-scale-package (CSP) substrates were used, those subjected and not subjected to the TH test. This study revealed an association between the interfacial reaction behaviors, void formation and mechanical reliability of the solder joint. Many voids were formed at the interface of the OSP-finished Cu joint subjected to the TH test. These voids were caused by the oxidation of the OSP-finished Cu substrate during the TH test. In the shear tests, the shear force of the joint with the substrate not subjected to the TH test was slightly higher than that with the TH test. The mechanical reliability of the solder joint was degraded by voids at the interface.     

Narrowband microwave microelectromechanical switch on gallium arsenide substrates for operation in a frequency band of 10–12 GHz

Discrete electrostatic microwave microelectromechanical switches on gallium arsenide wafers are designed and fabricated. The possibility of integrating the switches in one circuit with monolithic integrated circuits of transreceiving devices fabricated in one production cycle is estimated.     

An overview on the principle of inkjet printing technique and its application in micro-display for augmented/virtual realitiesOA

Augmented reality(AR) and virtual reality(VR) are two novel display technologies that are under updates. The essential feature of AR/VR is the full-color display that requires high pixel densities. To generate three-color pixels, the fluorescent color conversion layer inevitably includes green and red pixels. To fabricate such sort of display kits, inkjet printing is a promising way to position the color conversion layers. In this review article, the progress of AR/VR technologies is first revie...     

Effect of temperature on the capacitance–frequency and conductance–voltage characteristics of polyaniline/p-Si/Al MIS device at high frequencies

A polyaniline/p-Si/Al MIS device has been fabricated by forming a polyaniline layer on Si by using the electrochemical polymerization method. The conductance–voltage and capacitance–frequency measurements have been performed as a function of temperature. The capacitance of the device decreased with increasing frequency. The increase in capacitance results from the presence of interface states. The peaks have been observed in the conductance curves of the device and attributed to the presence of an interfacial layer between polyaniline and p-Si. For each temperature, the plot of series resistance/voltage gave a peak. The voltage and temperature dependence of series resistance has been attributed to the particular distribution density of interface states and the interfacial insulator layer.     

Effect of Isothermal Aging on the Long-Term Reliability of Fine-Pitch Sn–Ag–Cu and Sn–Ag Solder Interconnects With and Without Board-Side Ni Surface Finish

The combined effects on long-term reliability of isothermal aging and chemically balanced or unbalanced surface finish have been investigated for fine-pitch ball grid array packages with Sn–3.0Ag–0.5Cu (SAC305) (wt.%) and Sn–3.5Ag (SnAg) (wt.%) solder ball interconnects. Two different printed circuit board surface finishes were selected to compare the effects of chemically balanced and unbalanced structure interconnects with and without board-side Ni surface finish. NiAu/solder/Cu and NiAu/solder/NiAu interconnects were isothermally aged and thermally cycled to evaluate long-term thermal fatigue reliability. Weibull plots of the combined effects of each aging condition and each surface finish revealed lifetime for NiAu/SAC305/Cu was reduced by approximately 40% by aging at 150°C; less degradation was observed for NiAu/SAC305/NiAu. Further reduction of characteristic life-cycle number was observed for NiAu/SnAg/NiAu joints. Microstructure was studied, focusing on its evolution near the board and package-side interfaces. Different mechanisms of aging were apparent under the different joint configurations. Their effects on the fatigue life of solder joints are discussed.