Communication architecture design for reconfigurable multimedia SoC platform

Memory and communication architecture have a significant impact on the performance, cost, and power of complex multiprocessor system-on-chip designs. In this paper, we present an automated bus matrix synthesis flow for efficient transaction-level design space exploration of communication architecture in a reconfigurable multimedia system-on-chip platform. Specifically, we consider hardware interface selection problem, which has significant effect on the overall cost of area and power. We propose a method to solve such hardware interface selection problem through static analysis of communication behavior. We experiment with JPEG encoder and H.264 encoder examples and the results show the reduction of area by 56.91% and power by 48.61% of bus matrix with 0.58% performance overhead on average compared to the case of maximum performance. According to our HW interface selection algorithm, we also experiment MPEG4 video decoder example. And the result is evaluated on the FPGA prototyping board.     

异构双核SoC软件调试环境的研究与设计

分析了嵌入式系统远程调试原理,提出面向某异构双核SoC的调试环境设计方案,讨论了仿真器软硬件设计和调试代理软件设计等关键技术。该调试环境能够对目标平台进行在线编程和调试,解决了自主双核SoC处理器缺乏配套软件调试手段的实际问题,为目标平台的应用和推广提供了有力支撑,对其他面向多核处理器的调试环境设计具有参考价值。     

基于JTAG的SoC片上调试系统设计

文章提出了一种基于JTAG的SoC片上调试系统设计方法,该系统主要包括JTAG接口和片上调试模式控制单元。通过执行不同的操作指令,该片上调试系统可实现断点设置、单步执行、寄存器和存储器内容监控、在线编程以及程序运行现场设置等调试功能。文章同时说明了片上调试系统的工作原理和硬件架构。     

Simulink-based heterogeneous multiprocessor SoC design flow for mixed hardware/software refinement and simulation

As a solution for dealing with the design complexity of multiprocessor SoC architectures, we present a joint Simulink-SystemC design flow that enables mixed hardware/software refinement and simulation in the early design process. First, we introduce the Simulink combined algorithm/architecture model (CAAM) unifying the algorithm and the abstract target architecture. From the Simulink CAAM, a hardware architecture generator produces architecture models at three different abstract levels, enabling a trade-off between simulation time and accuracy. A multithread code generator produces memory-efficient multithreaded programs to be executed on the architecture models. To show the applicability of the proposed design flow, we present experimental results on two real video applications.     

基于ZYNQ AP SoC的安全驾驶系统设计

针对系统对实时图像处理的需求,本文提出了一种基于ZYNQ AP SoC的安全驾驶系统设计方案.本系统由ZYNQ架构中的PL(FPGA)部分负责驱动CMOS摄像头,将采集的图像进行灰度转换,传给PS(ARM)部分运行Adaboost算法,对图像进行人脸检测,从而获取驾驶员的眼睛和嘴巴的坐标值、面积值和张开度,并利用OpenCV的PERCLOS算法制定疲劳状态标准,给出预警信息.同时,ARM通过USB驱动摄像头,实现行车记录,并通过酒精浓度传感器采集车内酒精浓度,实现酒驾预警.通过实验表明,本系统性能稳定,实现了保障安全驾驶的目的.     

RF bridges to the network [RF IC design]

Chips that dwell at the boundary between the electronics and the transmission medium and run at network speeds are growing in importance, and so are the tools that design them. In this paper, RF IC design tools and their developers are examined by the author     

应用于SoC的全数字锁相环ASIC设计

设计了一种全数字锁相环(All-Digital PLL).该锁相环中环形数控振荡器由使能单元构成,且环形结构分为粗调和精调两部分,具有锁定范围宽、锁定精度高、功耗低的特点,且捕获范围可以根据需要进一步拓宽.本设计基于CMOS标准单元,所有子模块均采用可综合的Verilog HDL代码描述,利于不同工艺问的移植,设计周期...     

CMOS RF receiver system design: a systematic approach

A unified system-level design methodology for highly integrated CMOS radio frequency receiver design is introduced. This complete system-level design methodology is targeted to minimize the total power consumption of the receiver. System-level design techniques which can be used to derive the overall receiver radio specifications and study noise and linearity performance of receivers are presented. Then, a few circuit examples of building blocks in receiver signal chain are analyzed to show a linear relationship between power and dynamic range of the blocks. The result is then used to derive the optimal system specification distribution among receiver signal chain building blocks yielding the minimum total receiver power consumption for a given system performance. The theory and an actual CMOS Bluetooth receiver design are compared showing very good agreement.     

Parallel programming models for a multiprocessor SoC platform applied to networking and multimedia

The MultiFlex system is an application-to-platform mapping tool that integrates heterogeneous parallel components-H/W or S/W- into a homogeneous platform programming environment. This leads to higher quality designs through encapsulation and abstraction. Two high-level parallel programming models are supported by the following MultiFlex platform mapping tools: a distributed system object component (DSOC) object-oriented message passing model and a symmetrical multiprocessing (SMP) model using shared memory. We demonstrate the combined use of the MultiFlex multiprocessor mapping tools, supported by high-speed hardware-assisted messaging, context-switching, and dynamic scheduling using the StepNP demonstrator multiprocessor system-on-chip platform, for two representative applications: 1) an Internet traffic management application running at 2.5 Gb/s and 2) an MPEG4 video encoder (VGA resolution, at 30 frames/s). For these applications, a combination of the DSOC and SMP programming models were used in interoperable fashion. After optimization and mapping, processor utilization rates of 85%-91% were demonstrated for the traffic manager. For the MPEG4 decoder, the average processor utilization was 88%.     

射频仿真系统三轴模拟转台动态误差分析

三轴模拟转台是进行飞行器飞行姿态地面半实物仿真系 统的重要 设备之一,其精度直接决定了仿真试验的置信度。通过分析转台动态响应能力并结合转台的 部分实测数据,求解了转台动态误差系数,得到转台动态误差的计算公式,最后用一个典型 仿真试验对三轴模拟转台动态误差进行计算分析。利用该动态误差计算公式得到的仿真结果 可以为射频仿真试验设计及精度分析提供参考。     

用于3G和蓝牙系统的射频设计软件

介绍一款用于3G的蓝牙系统和射频设计软件。     

软硬件协同设计语言System C在SoC设计中的应用

软硬件协同设计是未来VLSI设计的发展趋势.作为新的系统级VLSI设计标准,System C是一种通过类对象扩展的基于C/C++建模平台,支持系统级软硬件协同设计、仿真和验证.文章讨论了SystemC复杂芯片设计中的设计流程、设计优势,并给出具体设计实例.     

动载体光电稳定平台伺服控制系统设计

基于数字控制器TMS320F28335和驱动器MSK4226模块,利用光纤陀螺作为惯性空间角速率反馈传感器,完成了一种动载体光电稳定平台伺服控制系统的硬件和软件设计.详细介绍了硬件设计要求和原则、实现方法,分析了控制软件需求,设计流程,控制周期.测试结果达到预期要求,并将该系统应用于实际稳定平台设计中.     

嵌入式系统开发平台的构建和实现

本文从软硬件两方面介绍了构建嵌入式系统开发平台的基本思路,并给出了一套实现方案。该平台硬件部分低成本、扩展性强、升级方便;软件部分功能丰富,操作系统内核基于开放源代码的mClinux系统,成熟稳定,GUI支持中文。     

基于SOPC平台远程机器人控制系统的设计

本设计基于SOPC嵌入式平台,提出了机器人远程控制系统的初级方案。该系统的硬件由DE1-SoC控制板、WiFi无线节点模块和履带机器人驱动电路等组成。软件基于Altera公司的Qsys平台,根据需要搭建控制器和外设框架,利用C语言采取模块化编程,驱动外围硬件电路,实现了机器人的运动控制。     

基于嵌入式Qt的楼宇对讲系统GUI平台设计

分析了现行的几个嵌入式GUI系统,重点分析了嵌入式Qt的优点,并选择嵌入式Qt系统作为开发平台,提出了嵌入式楼宇对讲的GUI实现和流程。文章还对嵌入式Linux的移植做了论述,对楼宇对讲系统涉及底层事件和软件构架进行分析,完成了楼宇对讲系统的基本功能。     

New distributed model of NPT IGBT dedicated to power circuits design

In this paper, a new one-dimensional (1D) insulated gate bipolar transistor (IGBT) model is presented. The heart of this model is based on the analogical resolution of the ambipolar equation of diffusion. Indeed, carriers transport to broad areas and little doped power components is of a distributed nature. Approximation of the localised constants is no longer a valid solution. By taking into account, in the model, the side current into the P/P+ well, the 2D phenomenon, IGBT latch-up can be reviewed. The complete model developed under SABER as well as the static, dynamic results of simulation and the use in current converter are presented and compared to Hefner’s IGBT model. Simulation results of a inverter will be also presented to show the good behaviour of this IGBT model.