High-transconductance enhancement-mode GaAs MESFET fabrication technology

An improved enhancement-mode GaAs MESFET was fabricated by a high dose Si ion implantation which was used to reduce the source and drain parasitic resistances, and by a Pt buried gate which was used to control the threshold voltage and reduce the interface states of the Schottky gate. 250 mS/mm transconductance has been obtained for 1-µm gate-length enhancement-mode GaAs MESFET.     

A new empirical large-signal model for enhancement-mode AlGaAs/InGaAs pHEMTs

We propose a new large-signal model for AlGaAs/InGaAs pHEMTs, which can simulate the device microwave output power, non-linear characteristics at arbitrary bias points. This model includes a new drain current equation, which is extracted from its derivatives. In addition, gate-to-source and gate-to-drain capacitances are also characterized versus the function of gate and drain biases. The parameter extraction procedure is addressed for the enhancement-mode pHEMTs, which offers an attractive solution for handset power amplifier application because of its positive bias characteristics. Finally, measured and model-predicted dc I–V, S-parameters, and power performance have been compared.     

单片集成GaAs增强／耗尽型赝配高电子迁移率晶体管

介绍了单片集成GaAs增强／耗尽型赝配高电子迁移率晶体管（PHEMT）工艺。借助栅金属的热处理过程,形成了热稳定性良好的Pt／Ti／Pt／Au栅。AFM照片结果表明Pt金属膜表面非常平整,2nm厚度膜的粗糙度RMS仅为0．172nm。通过实验,我们还得出第一层Pt金属膜的厚度和退火后的下沉深度比大概为1：2。制作的增强型／耗尽型PHEMT的闽值电压（定义于1mA／mm）、最大跨导、最大饱和漏电流密度、电流增益截止频率分别是＋0．185／-1．22V、381．2／317．5mS／mm、275／480mA／mm、38／34GHz。增强型器件在4英寸圆片上的阈值电压标准差为19mV。     

40 Gbit/s lumped-element modulator driver in GaAs pHEMTs

A high-speed and high-gain modulator driver circuit using 0.15 /spl mu/m gate length GaAs pHEMT technology is presented. The IC was developed for driving electroabsorption modulators in 40 Gbit/s optical fibre systems. To meet application requirements a lumped-element approach was used with differential configuration. Measured results show the circuit operates at 40 Gbit/s with a swing of 3 V/sub p-p/ for single-ended and 6 V/sub p-p/ for differential output, and 8/10 ps rise/fall times.     

A fully on-chip ESD protection UWB-band low noise amplifier using GaAs enhancement-mode dual-gate pHEMT technology

This paper presents the development of a novel ESD protected wideband low noise amplifier (LNA) using enhancement-mode (E-mode) pHEMT dual-gate clamps. The proposed novel clamp possesses a low on-state resistance, uniform parasitic capacitance, and flexibility to adjust the trigger voltage for different ESD applications. Implementation of the LNA demonstrates that RF performance can be maintained after human body mode (HBM) ESD test while at the same time endure more than +2.5 kV and −2 kV HBM ESD stress voltage. In addition, the incorporated clamps use a fewer number of diodes than the conventional diode stacks, thereby making it size efficient and low effort impedance matching co-design which allow this approach to be an attractive solution for ESD protection.     

Performance dependence of InGaP/InGaAs/GaAs pHEMTs on gatemetallization

The performance of InGaP-based pHEMTs as a function of gate metallization is examined for Mo/Au, Ti/Au, and Pt/Au gates. DC and microwave performance of pHEMT's with 0.7-μm gate lengths is evaluated. Transconductance, threshold voltage, f_t, and f_max are found to depend strongly on gate metallization. High-speed performance is achieved, with f_t of 41.3 GHz and f _max of 101 GHz using Mo/Au gates. The difference in performance between devices with different gate metallizations is postulated to be due to a combination of the difference in Schottky barrier heights and different gate-to-channel spacings due to penetration of the gate metal into the InGaP barrier layer     

High thermal stability AlGaAs/InGaAs enhancement-mode pHEMT using palladium-gate technology

The dc, flicker noise, power, and temperature dependence of AlGaAs/InGaAs enhancement-mode pseudomorphic high electron mobility transistors (E-pHEMTs) were investigated using palladium (Pd)-gate technology. Although the conventional platinum (Pt)-buried gate has a high metal work function, which is beneficial for increasing the Schottky barrier height of the E-pHEMT, the high rate of intermixing of the Pt-GaAs interface owing to the effect of the continuous production of PtAs₂ on the device influenced the threshold voltage (V_th) and transconductance (g_m) at high temperatures or over the long-term operation. Variations in these parameters make Pt-gate E-pHEMT-related circuits impractical. Furthermore, a PtAs₂ interlayer caused a serious gate leakage current and unstable Schottky barrier height. This study presents the Pd-GaAs Schottky contact because Pd, an inert material with high work function of 5.12 eV. Stable Pd inhibited the less diffusion at high temperatures and simultaneously suppressed device flicker noise. The V_th of Pd/Ti/Au Schottky gate E-pHEMT was 0.183 V and this value shifted to 0.296 V after annealing at 200 °C. However, the V_th shifted from 0.084 to 0.231 V after annealing of the Pt/Ti/Au Schottky gate E-pHEMT because the Pt sunk into a deeper channel. The slope of the curve of power gain cutoff frequency (f_max) as a function of temperature was −5.76 × 10⁻² GHz/°C for a Pd/Ti/Au-gate E-pHEMT; it was −9.17 × 10⁻² GHz/°C for a Pt/Ti/Au-gate E-pHEMT. The slight variation in the dc and radio-frequency characteristics of the Pd/Ti/Au-gate E-pHEMT at temperatures from 0 to 100 °C revealed that the Pd-GaAs interface has great potential for high power transistors.     

Gate length scaling in high performance InGaP/InGaAs/GaAs pHEMTs

The performance of InGaP-based pHEMTs as a function of gate length has been examined experimentally. The direct-current and microwave performance of pHEMTs with gate lengths ranging from 1.0-0.2 μm has been evaluated. Extrinsic transconductances from 341 mS/mm for 1.0 μm gate lengths to 456 mS/mm for 0.5 μm gate lengths were obtained. High-speed device operation has been verified, with f_t of 93 GHz and f_max of 130 GHz for 0.2 μm gate lengths. The dependence of DC and small-signal device parameters on gate length has been examined, and scaling effects in InGaP-based pHEMT's are examined and compared to those for AlGaAs/InGaAs/GaAs pHEMTs. High-field transport in InGaP/InGaAs heterostructures is found to be similar to that of AlGaAs/InGaAs heterostructures. The lower ϵ_r of InGaP relative to AlGaAs is shown to be responsible for the early onset of short-channel effects in InGaP-based devices     

Capacitor-coupled logic using GaAs depletion-mode f.e.t.s

A new method of interconnecting depletion-mode GaAs f.e.t. logic stages, using capacitive coupling, eliminates the need for a negative power supply and is more tolerant of processing spreads, particularly of pinch-off voltage. The technique may be combined with conventional level shifting, operating at very low current. The use of capacitance may be extended to achieve clocked dynamic data storage with very low power dissipation.     

Enhanced power performance of enhancement-mode Al0.5Ga0.5As/In0.15Ga0.85As pHEMTs using alow-k BCB passivation

Surface passivation technology plays an important role, especially in E-mode pHEMTs applications, and a new passivation technology has been proposed in this study. This novel benzocyclobutene (BCB) passivation layer takes advantage of the low dielectric permittivity (2.7) and a low loss tangent (0.0008). In this letter, we not only suppress the gate-to-drain leakage current but also improve the device power performance under a high input power swing by using a BCB passivation layer. The passivated 1.0 μm-long gate pHEMTs exhibit a better off-state performance than the unpassivated ones. The maximum output power under a 2.4-GHz operation is 118 mW/mm, with a linear power gain of 11.1 dB and a power-added efficiency is 60%     

High-performance 0.1-μm gate enhancement-mode InAlAs/InGaAsHEMT's using two-step recessed gate technology

Novel approach for making high-performance enhancement-mode InAlAs/InGaAs HEMT's (E-HEMT's) is described for the first time. Most important issue for the fabrication of E-HEMT's is the suppression of the parasitic resistance due to side-etching around the gate periphery during gate recess etching. Two-step recessed gate technology is utilized for this purpose. The first step of the gate recess etching removes cap layers wet-chemically down to an InP recess-stopping layer and the second step removes only the recess-stopping layer by Ar plasma etching. The parasitic component for source resistance is successfully reduced to less than 0.35 Ω·mm. Etching selectivities for both steps are sufficient not to degrade uniformity of devices on the wafer. The resulting structure achieves a positive threshold voltage of 49.0 mV with high transconductance. Due to the etching selectivity, the standard deviation of the threshold voltage is as small as 13.3 mV on a 3-in wafer. A cutoff frequency of 208 GHz is obtained for the 0.1-μm gate E-HEMT's. This is therefore one of the promising devices for ultra-high-speed applications     

Electrical and reliability characteristics of GaAs MOSHEMTs utilizing high-k IIIB and IVB oxide layers

In this work, the high-k material of gadolinium oxide layer (Gd₂O₃) and zirconium oxide layer (ZrO₂) thin films were fabricated as the gate dielectric insulator materials in GaAs metal-oxide-semiconductor high electron mobility transistors (MOSHEMTs). The dielectric constant of Gd₂O₃ and ZrO₂ oxide layers were estimated to be 10.6 and 7.3 by the MOS-ring capacitor of C-V measurements. In addition, the thermal stability of the devices have been investigated and compared with the high-k material Gd₂O₃ and ZrO₂ thin films for reliability tests. The Gd₂O₃ MOSHEMTs achieved a better thermally stable characteristic duo to its similar lattice structure with GaAs native oxide layer. At high temperature operation, the V_BR degradation slope was 1.2 × 10⁻³ V/°C and the maximum I_ds degradation slope was 1.4 × 10⁻² mA (%)/°C. According to this, the device also showed a good reliability characteristic within 48 h. Based on measurement results, the Gd₂O₃ MOSHEMTs exhibited the best electrical characteristics, including the lowest gate leakage current, the lowest noise spectra density, and the high power performance. Therefore, the Gd₂O₃ MOSHEMTs is suitable for high power amplifier and monolithic microwave integrated circuits (MMICs) applications.     

Fabrication of depletion-mode GaAs MOSFET with a selectiveoxidation process by using metal as the mask

The n-channel depletion-mode GaAs MOSFETs with a selective liquid phase chemical-enhanced oxidation method at low temperature by using metal as the mask (M-SLPCEO) are demonstrated. The proposed process can simplify one mask to fabricate GaAs MOSFET and grow reliable gate oxide films as well as side-wall passivation layers at the same time. The 1 μm gate-length MOSFET with a gate oxide thickness of 35 nm shows a transconductance of 90 mS/mm and a maximum drain current density larger than 350 mA/mm. In addition, a short-circuit current gain cutoff frequency f_T of 6.5 GHz and a maximum oscillation frequency f _max of 18.3 GHz have been achieved from the 1 μm×100 μm GaAs MOSFET     

Epitaxial praseodymium oxide: a new high-K dielectric

We show results for molecular beam epitaxial growth of praseodymium oxide on Si. On Si(1 0 0) oriented surfaces, crystalline Pr₂O₃ grows as (1 1 0)-domains, with two orthogonal in-plane orientations. Epitaxial overgrowth with Si could not been realized so far. We obtain perfect epitaxial growth of hexagonal Pr₂O₃ on Si(1 1 1). These layers can also be overgrown epitaxially with Si leading to novel tunnel structures. Crystalline Pr₂O₃ on Si(0 0 1) is a promising candidate for highly scaled gate insulators, displaying sufficiently high-K value of around 30, ultra-low leakage current density, good reliability, and high electrical breakdown voltage. The Pr₂O₃/Si(0 0 1) interface exhibits the symmetric band alignment, desired for applying such material in both n- and p-type devices. The valence band as well as the conduction band offset to Si is above 1 eV. The electron masses can be assumed to be very heavy in the oxide. This effect together with the suitable band offsets leads to the unusually low leakage currents found experimentally. Finally, the integration of crystalline Pr₂O₃ high-K gate dielectrics into a conventional CMOS process will be demonstrated.     

Direct nitridation of high-k metal oxide thin films using argon excimer sources

Reported, for the first time, is the formation of metal oxynitride thin films via direct nitridation of the metal oxide films by active nitrogen species generated from molecular nitrogen with argon excimer sources. Preliminary results on TaO/sub x/N/sub y/ thin films formed from 9 nm Ta/sub 2/O/sub 5/ films have exhibited excellent electrical properties with three orders magnitude lower leakage current density being achieved and 25% higher accumulation capacitance being obtained. The nitridation process for a specific film thickness can be optimised by adjusting the VUV irradiation time to achieve both increased accumulation capacitance and improved leakage property, without the need for the use of H/sub 2/O, NH/sub 3/ or high temperature substrate heating.     

High-performance enhancement-mode AlGaN/GaN HEMTs using fluoride-based plasma treatment

We report a novel approach in fabricating high-performance enhancement mode (E-mode) AlGaN/GaN HEMTs. The fabrication technique is based on fluoride-based plasma treatment of the gate region in AlGaN/GaN HEMTs and post-gate rapid thermal annealing with an annealing temperature lower than 500/spl deg/C. Starting with a conventional depletion-mode HEMT sample, we found that fluoride-based plasma treatment can effectively shift the threshold voltage from -4.0 to 0.9 V. Most importantly, a zero transconductance (g/sub m/) was obtained at V/sub gs/=0 V, demonstrating for the first time true E-mode operation in an AlGaN/GaN HEMT. At V/sub gs/=0 V, the off-state drain leakage current is 28 /spl mu/A/mm at a drain-source bias of 6 V. The fabricated E-mode AlGaN/GaN HEMTs with 1 /spl mu/m-long gate exhibit a maximum drain current density of 310 mA/mm, a peak g/sub m/ of 148 mS/mm, a current gain cutoff frequency f/sub T/ of 10.1 GHz and a maximum oscillation frequency f/sub max/ of 34.3 GHz.     

A 5.7 GHz interpolative VCO using InGaP/GaAs HBT technology

A 5.7 GHz monolithic interpolative voltage-controlled oscillator using InGaP/GaAs HBT technology is demonstrated for the first time. Frequency tuning is achieved by changing the open loop gain instead of the tank capacitor. The experimental result showed that a 500 MHz tuning range at 5.7 GHz was realized, which can meet the requirement of 5.7 GHz ISM band     

20-nm enhancement-mode metamorphic GaAs HEMT with highly doped InGaAs source/drain regions for high-frequency applications

In this article, the DC and RF performance of a SiN passivated 20-nm gate length metamorphic high electron mobility transistor (MHEMT) on GaAs substrate with highly doped InGaAs source/drain (S/D) regions have investigated using the Synopsys TCAD tool. The 20-nm enhancement-mode (E-mode) MHEMT device also features δ-doped sheets on either side of the In_0.53Ga_0.47As/InAs/In_0.53Ga_0.47As channel which exhibits a transconductance of 3100 mS/mm, cut-off frequency (f_T) of 740 GHz and a maximum oscillation frequency (f_max) of 1040 GHz. The threshold voltage of the device is found to be 0.07 V. The room temperature Hall mobilities of the 2-dimensional sheet charge density are measured to be over 12,600 cm²/Vs with a sheet charge density larger than 3.6 × 10¹² cm^?2. These high-performance E-mode MHEMTs are attractive candidates for sub-millimetre wave applications such as high-resolution radars for space research, remote atmospheric sensing, imaging systems and also for low noise wide bandwidth amplifier for future communication systems.     

Low noise 5 GHz differential VCO using InGaP/GaAs HBT technology

The authors present the first InGaP/GaAs HBT differential VCOs with low phase noise performance. One is a cross coupled differential VCO, and the other is a Colpitts differential VCO. To achieve a fully integrated VCO, collector-base junction capacitance of HBT transistor is used for the frequency tuning varactor. The measured output frequency ranges of VCOs are 290 MHz and 190 MHz, and the phase noises at an offset frequency of 1 MHz are -118 dBc/Hz and -117 dBc/Hz respectively. The each VCO core dissipates 13.2 mW from a 3.5 V supply, and the output power is about -0.2 dBm. Concerned with cross coupled VCO, it shows the figure of merit of -179 dBc/Hz, which is the best result among the reported compound semiconductor FET and HBT VCOs.     

Improved enhancement/depletion GaAs MOSFET using anodic oxide as the gate insulator

A GaAs MOSFET with a semi-insulating substrate is described, operating in either the enhancement or the deed depletion modes and showing the highest transconductance reported so far, and a rise time better than 1 ns. The behavior is fully explained by theC/Vcharacteristics of equivalent MOS capacitors.