A Common Source Input Cross Coupled Quad CMOS Mixer*

A CMOS doubly balanced mixer circuit is implemented with a source follower input and a cross coupled mixing quad. The circuit employs an all N-channel configuration and is suitable for high frequency applications. As a down-converter with an RF input of 2.0 GHz and an IF output of 200 MHz, the mixer demonstrates 9 dB of conversion loss with a corresponding input referred third order intercept of 0 dBm. As an up-converter with an IF input frequency of 400 MHz and an RF output of 2.4 GHz, the mixer demonstrates 14 dB of conversion loss.     

2.4 GHz offset-cancelling down-conversion mixer

A down-conversion mixer utilising the offset-cancelling technique increase the carrier-to-noise ratio (CNR) is presented. The proposed offset-cancelling mixer has been fabricated in a 0.35 μm CMOS process and it can convert the 2.4 GHz RF signal to the 280 MHz IF one with 12 mW power consumption including the buffer. Compared with the non-offset-cancelling mixer, the proposed offset-cancelling mixer has the lower noise level. Experimental results show that the offset-cancelling mixer provides 45 dB CNR better than 34 dB CNR of the mixer without the offset-cancelling technique     

Microwave MESFET Mixer

GaAs metal-semiconductor FET's (MESFET) are developed for use in amplifiers at microwave frequencies. The FET has a Schottky barrier between the gate and source, operating in the same manner as a Schottky-barrier diode. If the Schottky barrier is used as a mixer, the IF signal is generated and simultaneously amplified by the FET itself. Thus a mixer with IF preamplifier can be realized. In this paper the theoretical and experimental results of a FET mixer are described. In such operations, the conversion loss in the freqnency conversion alone is large due to the high series resistance of the Schottky barrier. However, the overall FET mixer has a "conversion gain" because the IF gain of the FET is made large. The experimental conversion gain is 6 dB at the RF frequency of 10.8 GHz and the IF frequency of 1.7 GHz. The noise figure of the FET mixer is at present large (15 dB, for example), due to large conversion loss in the frequency conversion.     

InAlAs/InGaAs HBT X-band double-balanced upconverter

We report on an InAlAs/InGaAs HBT Gilbert cell double-balanced mixer which upconverts a 3 GHz IF signal to an RF frequency of 5-12 GHz. The mixer cell achieves a conversion loss of between 0.8 dB and 2.6 dB from 5 to 12 GHz. The LO-RF and IF-RF isolations are better than 30 dB at an LO drive of +5 dBm across the RF band. A pre-distortion circuit is used to increase the linear input power range of the LO port to above +5 dBm. Discrete amplifiers designed for the IF and RF frequency ports make up the complete upconverter architecture which achieves a conversion gain of 40 dB for an RF output bandwidth of 10 GHz. The upconverter chip set fabricated with InAlAs/InGaAs HBT's demonstrates the widest gain-bandwidth performance of a Gilbert cell based upconverter compared to previous GaAs and InP HBT or Si-bipolar IC's     

0.1 THz鳍线单平衡式基波混频电路研究

研究了一种基于石英基片的0.1 THz频段的鳍线单平衡混频电路,混频电路的射频和本振信号分别从WR10标准波导端口通过波导单面鳍线微带过渡和波导微带探针过渡输入,中频信号通过本振中频双工器输出。这是一种新型的混频电路形式,与传统的W波段混频器相比,混频电路可以省略一个复杂的W波段滤波器,具有电路设计简单、安装方便的特点。该电路使用两只肖特基二极管通过倒装焊工艺粘结在厚度为75 m的石英基片上,石英基片相对传统基板,可以极大提高电路加工精度。在固定50 MHz中频信号时,射频90~110 GHz范围内,0.1 THz混频器单边带变频损耗小于9 dB。     

Linearization of mixers using predistortion and envelope signal injection

This letter presents a new linearization method for mixers employing predistortion and envelope signal injection. In this technique the third order intermodulation distortion (IM3), at the output of a mixer in IF band, was cancelled by using a diode predistortor and injecting the envelope of the RF input signal to both the predistortor and the mixer. By properly adjusting the amplitude and polarity of the injected envelope signal, up to 26 dB improvement of the IM3 is obtained in a two tone test with 100 kHz separation at 1.9 GHz. This method operates very well over a wide range of output power up to the 1 dB compression point of the mixer.     

A 9–31-GHz Subharmonic Passive Mixer in 90-nm CMOS Technology

A subharmonic down-conversion passive mixer is designed and fabricated in a 90-nm CMOS technology. It utilizes a single active device and operates in the LO source-pumped mode, i.e., the LO signal is applied to the source and the RF signal to the gate. When driven by an LO signal whose frequency is only half of the fundamental mixer, the mixer exhibits a conversion loss as low as 8–11 dB over a wide RF frequency range of 9–31GHz. This performance is superior to the mixer operating in the gate-pumped mode where the mixer shows a conversion loss of 12–15dB over an RF frequency range of 6.5–20 GHz. Moreover, this mixer can also operate with an LO signal whose frequency is only 1/3 of the fundamental one, and achieves a conversion loss of 12–15dB within an RF frequency range of 12–33 GHz. The IF signal is always extracted from the drain via a low-pass filter which supports an IF frequency range from DC to 2 GHz. These results, for the first time, demonstrate the feasibility of implementation of high-frequency wideband subharmonic passive mixers in a low-cost CMOS technology.     

Mixer for low voltage operation

A very high conversion gain mixer of frequency 350 MHz is designed using the injection-locked technique. The mixer is based on a common-base Clapp oscillator which is free-running at a frequency of 350 MHz. Using the injection-locked technique, the nonlinear resistance of the oscillator is modulated by the injection source which provides negative resistance amplification to the RF signal. It gives conversion gain as high as 30 dB with good noise performance     

A 26-GHz Band Integrated Circuit of a Double-Balanced Mixer and Circulators

Integration of a double-balanced mixer and ferrite-disk type circulators have been successfully achieved in the 26-GHz band. The total single-sideband noise figure of the integrated circuit, composed of a mixer and two circulators, is 8.5 dB, including the noise contribution from an IF amplifier. The double-balanced mixer is composed of microstrip lines, slot lines, coupled slot lines, coplanar lines, Au wires, and four beam lead Schottky-barrier diodes. The minimum conversion loss of the mixer is 5.3 dB at a signal frequency of 25.4 GHz. Isolation between RF and LO ports is greater than 30 dB. The ferrite-disk type circulator is produced by a newly developed precise machining technique. The minimum insertion loss of the circulator is 0.45 dB, and the isolation is greater than 20 dB. The integrated circuit with the ferrite-disk type circulators will be extended to the millimeter-wave band.     

Gilbert multiplier as an active mixer with conversion gain bandwidth of up to 17 GHz

A monolithically integrated mixer based on a Gilbert cell multiplier for ultra-broadband applications has been produced in self-aligning 1 mu m silicon bipolar technology. Positive power conversion gain bandwidths for RF and LO up to 17.3 GHz and for the intermediate frequency (IF) up to 13 GHz were measured. The corresponding -3 dB frequencies are 9 GHz for RF and LO (IF=100 MHz) and 8 GHz (f/sub LO/=1 GHz) for IF.<>     

20GHz镜频抑制谐波混频器

镜频抑制混频器能有效地抑制镜像频率,提高雷达和通信系统的抗干扰能力。介绍了一个20 GHz二次谐波镜频抑制混频器的设计与制作,该镜频抑制混频器采用两个相同的二次谐波混频器做为两路混频单元,两路射频输入和中频输出分别用90°的功分器/合路器与两路混频器相连,本征用威尔金森功分器等幅同相输入两路混频。借助于90°的功分器,两路混频器的镜频产物在中频90°合路器的输出端口反相抵消,有用中频在90°合路器的输出端口同相叠加。利用ADS和HFSS对该混频器进行了仿真设计,并对实际电路进行了加工测试。经测试,当中频固定在400 MHz时,射频在20～21 GHz内变频损耗小于10 dB,镜频抑制大于20 dB。     

带有小型化Balun的C波段单片GaAs pHEMT单平衡电阻性混频器

 本文介绍了一种带有小型化无源Balun的C波段单片GaAs pHEMT单平衡电阻性混频器.Balun 采用集总—分布式结构,使其长度与常用λ/4耦合线Balun相比缩小了11倍,大大降低了将无源Balun应用于C波段单片集成电路中所需的芯片尺寸.混频器采用单平衡电阻性结构,在零功耗的情况下实现了良好的线性和口间隔离性能.测试结果显示,在固定中频160MHz,本振输入功率0dBm条件下,在3.5~5GHz RF频带内,最小变频损耗为8.3dB,1dB压缩点功率为8.0dBm,LO至IF之间的隔离度为38dB.     

A broadband folded Gilbert cell CMOS mixer

A folded Gilbert cell mixer was implemented in 0.13 μm complementary metal oxide semiconductor (CMOS) technology. The downconversion mixer is designed for 5–6 GHz radio frequency (RF) band and an intermediate frequency (IF) of 500 MHz. A voltage conversion gain (CG) of 9 dB, a noise figure (NF) of 11 dB and an IIP3 of 2 dBm were demonstrated experimentally under very low power consumption conditions, only 4.2 mW for the mixer core. Considering the overall performance of the circuit, this paper shows that the folded mixer architecture is one of the most interesting frequency converter solutions for low-power mobile applications.     

Linearization of receivers using envelope signal injection

This paper presents a new linearization method for receivers employing envelope signal injection. In this technique, the third-order intermodulation distortion (IM3), at the output of a mixer in IF band, is cancelled by injecting the envelope of the RF input signal to both the low noise amplifier (LNA) and the mixer. By properly adjusting the amplitude and polarity of the injected envelope signal, up to 40-dB improvement of the IM3 and 11-dB improvement of the IM5 is obtained in a two tone test with 100-kHz separation at 1.9GHz. This method operates very well over a wide range of power up to the 1-dB compression point of the receiver. The noise performance of the receiver under this linearization technique is also investigated. The noise floor at the output of the receiver is increased by 0.8 dB only when the system is optimized for linearity.     

基于DSP的微波光子信号监测系统的设计

射频信号的监测具有广泛的应用前景，文章提出了一种基于DSP的微波光子射频信号监测系统。该系统由前端微波光子信号接收部分和后端信号处理部分组成，射频信号经光学下变频处理得到中频信号，经过ADC模数转换后在DSP上应用快速傅里叶变换(FFT)算法完成对接收信号的频谱分析。实验测试结果表明，该系统可以完成对射频信号的监测，频率测量误差小于0.25 MHz,动态范围为55 dB,灵敏度为-30 dBm。此外，为了进一步验证，应用天线进行手机信号的接收实现了对手机信号通信频段的实时监测。     

A low power, low noise figure quadrature demodulator for a 60 GHz receiver in 65-nm CMOS technology

This paper presents the design of a low power (LP) and a low noise figure (NF) quadrature demodulator with an on-chip frequency divider for quadrature local oscillator (LO) signal generation. The transconductance stage of the mixer is implemented by an AC-coupled self-bias current reuse topology. On-chip series inductors are employed at the gate terminals of the differential input transconductance stage to improve the voltage gain by enhancing the effective transconductance. The chip is implemented in 65-nm LP CMOS technology. The demodulator is designed for an input radio frequency (RF) band ranging from 10.25 to 13.75 GHz. A fixed LO frequency of 12 GHz down-converts the RF band to an intermediate frequency (IF) band ranging from DC to 1.75 GHz. From 10 MHz to 1.75 GHz the demodulator achieves a voltage conversion gain (VCG) ranging from 14.2 to 13.2 dB, and a minimum single-sideband NF (SSB-NF) of 9 dB. The measured third-order input intercept point (IIP₃) is -3.3 dBm for a two-tone test frequency spacing of 1 MHz. The mixer alone draws a current of only 2.5 mA, whereas the complete demodulator draws a current of 7.18 mA from a 1.2 V supply. The measurement results for a frequency divider, which was fabricated individually, prior to being integrated with the quadrature demodulator, in 65-nm LP CMOS technology, are also presented in this paper.     

Ka频段宽带镜频抑制谐波混频器的设计

介绍了一种在Ka频段具有镜频抑制功能的四次谐波混合集成电路混频器的设计与实现.该混频器主要采用微带混合集成电路,由薄膜陶瓷基片制作.经测试,当中频固定在70 MHz,在射频大于4 GHz带宽内,变频损耗小于11.2 dB,镜频抑制度大于20 dB.     

基于90nm CMOS工艺的60GHz射频接收前端电路设计

设计了一款用于中国60 GHz标准频段的射频接收前端电路。该射频接收前端采用直接变频结构,将59～64 GHz的微波信号下变频至5～10 GHz的中频信号。射频前端包括一个四级低噪声放大器和电流注入式的吉尔伯特单平衡混频器。LNA设计中考虑了ESD的静电释放路径。后仿真表明,射频接收前端的转换增益为13.5～17.5 dB,双边带噪声因子为6.4～7.8 dB,输入1 dB压缩点为-23 dBm。电路在1.2 V电源电压下功耗仅为38.4 mW。该射频接收前端电路采用IBM 90 nm CMOS工艺设计,芯片面积为0.65 mm2。     

A 0.5–7.5 GHz Ultra Low-Voltage Low-Power Mixer Using Bulk-Injection Method by 0.18- μm CMOS Technology

A fully differential low-voltage low-power downconversion mixer using a TSMC 0.18-mum CMOS logic process is presented in this letter. The mixer was designed with a four-terminal MOS transistor, the radio-frequency (RF) and local-oscillator signals apply to the gate and bulk of the device, respectively while the intermediate frequency (IF) signals output was from the drain. The mixer features a maximum conversion gain of 5.7dB at 2.4 GHz, an ultra low dc power consumption of 0.48 mW, a noise figure of 15 dB, and an input IP of 5.7 dBm. Moreover, the chip area of the mixer core is only 0.18 times 0.2 mm². The measured 3-dB RF frequency bandwidth is from 0.5 to 7.5 GHz with an IF of 100 MHz, and it is greatly suitable for low-power in wireless communication.     

A K-band down-conversion mixer with 1.4-GHz bandwidth in 0.13-/spl mu/m CMOS technology

A low power and low voltage down conversion mixer working at K-band is designed and fabricated in a 0.13/spl mu/m CMOS logic process. The mixer down converts RF signals from 19GHz to 2.7GHz intermediate frequency. The mixer achieves a conversion gain of 1dB, a very low single side band noise figure of 9dB and third order intermodulation point of -2dBm, while consuming 6.9mW power from a 1.2V supply. The 3-dB conversion gain bandwidth is 1.4GHz, which is almost 50% of the IF. This mixer with small frequency re-tuning can be used for ultra-wide band radars operating in the 22-29GHz band.