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Erturk V.B. Bakir O. Rojas R.G. Guner B. 《Antennas and Propagation, IEEE Transactions on》2006,54(6):1699-1708
Scan blindness phenomenon for finite phased arrays of printed dipoles on material coated, electrically large circular cylinders is investigated. Effects on the scan blindness mechanism of several array and supporting structure parameters, including curvature effects, are observed and discussed. A full-wave solution, based on a hybrid method of moments/Green's function technique in the spatial domain, is used to achieve the aforementioned goals. Numerical results show that the curvature affects the surface waves and hence the mutual coupling between array elements. As a result, the array current distribution of arrays mounted on coated cylinders are considerably different compared to similar arrays on planar platforms. Therefore, finite phased arrays of printed dipoles on coated cylinders show different behavior in terms of scan blindness phenomenon compared to their planar counterparts. Furthermore, this phenomenon is completely different for axially and circumferentially oriented printed dipoles on coated cylinders suggesting that particular element types might be important for cylindrical arrays. 相似文献
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在自主研发国内BCD高压工艺的同时,设计并实现了一款用于42"数字电视PDP平板显示屏的扫描驱动芯片.该芯片及其制作工艺不仅实现了Bipolar,CMOS和高压功率DMOS器件的良好兼容(BCD工艺),而且采用工艺与电路设计互相匹配的交互方式完成了高低电平位移电路和高压输出驱动电路及其器件的设计,有效提高了芯片的性能,减小了芯片的面积.测试结果表明该芯片功能正常,性能良好,各项技术参数基本达到国外同类产品指标.在低压5V和高压160V的情况下工作,完全满足42"PDP显示系统的需求. 相似文献
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在自主研发国内BCD高压工艺的同时,设计并实现了一款用于42"数字电视PDP平板显示屏的扫描驱动芯片.该芯片及其制作工艺不仅实现了Bipolar,CMOS和高压功率DMOS器件的良好兼容(BCD工艺),而且采用工艺与电路设计互相匹配的交互方式完成了高低电平位移电路和高压输出驱动电路及其器件的设计,有效提高了芯片的性能,减小了芯片的面积.测试结果表明该芯片功能正常,性能良好,各项技术参数基本达到国外同类产品指标.在低压5V和高压160V的情况下工作,完全满足42"PDP显示系统的需求. 相似文献
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扫描测试和扫描链的构造 总被引:3,自引:0,他引:3
本文首先论述了扫描设计与测试向量自动生成(ATPG)这种测试方法的关键技术,并由此为依据,提出部分扫描设计中,扫描链构造的分层次的三个选取原则。 相似文献
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Power consumption during scan testing operations can be significantly higher than that expected in the normal functional mode of operation in the field. This may affect the reliability of the circuit under test (CUT) and/or invalidate the testing process increasing yield loss. In this paper, a scan chain partitioning technique and a scan hold mechanism are combined for low power scan operation. Substantial power reductions can be achieved, without any impact on the test application time or the fault coverage and without the need to use scan cell reordering or clock and data gating techniques. Furthermore, the proposed design solution for scan power alleviation, permits the efficient exploitation of X-filling techniques for capture power reduction or the use of extreme (power independent) compression techniques for test data volume reduction. 相似文献
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在自主研发国内BCD高压工艺的同时,设计并实现了一款用于42″数字电视PDP平板显示屏的扫描驱动芯片.该芯片及其制作工艺不仅实现了Bipolar,CMOS和高压功率DMOS器件的良好兼容(BCD工艺),而且采用工艺与电路设计互相匹配的交互方式完成了高低电平位移电路和高压输出驱动电路及其器件的设计,有效提高了芯片的性能,减小了芯片的面积.测试结果表明该芯片功能正常,性能良好,各项技术参数基本达到国外同类产品指标.在低压5V和高压160V的情况下工作,完全满足42″PDP显示系统的需求. 相似文献