A Broad-Band Second-Harmonic Mixer Covering 76-106 GHz

A broad-band second-harmonic millimeter-wave mixer has been constructed. The circuit consists of a single unencapsulated Schottky-barrier diode and embedding network which includes a wave absorber in the IF output terminal. The conversion loss of the mixer is 14.6/spl plusmn/0.9 dB over a frequency range of 76-106 GHz. The mixer is pumped by a Iocal oscillator that is tuned over the range of 37.15-52.15 GHz. The IF is kept constant at 1.7 GHz. The new mixer looks attractive for use in broad-band millimeter-wave measuring equipment, such as spectrum analyzers.     

A 210 GHz Dual-Gate FET Mixer MMIC With ${>}$2 dB Conversion Gain, High LO-to-RF Isolation, and Low LO-Drive Requirements

We demonstrate the first active mixer monolithic microwave integrated circuit (MMIC) with positive conversion gain beyond 200 GHz. The presented dual-gate topology is realized in a 100 nm gate length metamorphic high electron mobility transistor technology. Without any pre- or post-amplification, the down-conversion mixer achieves $>$ 2 dB conversion gain and $>$16 dB local oscillation to radio frequency (LO-to-RF) isolation at 210 GHz, outperforming state-of-the-art resistive MMIC mixers. The conversion gain becomes positive for LO power levels larger than 0 dBm, making the mixer suitable for being driven by an MMIC-based frequency doubler. A comparison to state-of-the-art G-band mixers is given.      

超宽带谐波混频器的设计

叙述了一种超宽带谐波混频器的原理、设计以及测试结果。该混频器主要由微带线巴伦、倍频器、单平衡混频器三部分组成。按中心频率为4.5 GHz设计出微带线巴伦结构,平衡端口输出相位差180°,具有尺寸小、损耗低、幅度相位一致性好等优点;采用AEROFLEX公司的MSPD2018型相位检波器作为混频器,该混频器采用阶跃恢复二极管倍频器与单平衡混频器并联结构,先倍频n次谐波后再与信号进行混频;传输线为四分之一波长线以提高端口间隔离度;利用微波电路仿真软件ADS对混频器进行基波和谐波分析。测试结果表明,在3～25 GHz的频率范围内,本振至中频的隔离度优于66 dB,其变频损耗的实测结果满足设计要求,在现有的宽带混频器中具有较好性能。     

GaAs pHEMT工艺6～18GHz有源倍频器MMIC

基于GaAs pHEMT工艺,设计了一个6～18 GHz宽带有源倍频器MM IC,最终实现了较高的转换增益和谐波抑制特性。芯片内部集成了输入匹配、有源巴伦、对管倍频器和输出功率放大器等电路。外加3.5 V电源电压下的静态电流为80 mA;输入功率为6 dBm时,6～18 GHz输出带宽内的转换增益为6 dB;基波和三次谐波抑制30 dBc。当输出频率为12 GHz时,100 kHz频偏下的单边带相位噪声为-143 dBc/Hz。芯片面积为1 mm×1.5 mm。     

A monolithic 6 GHz quadrature frequency doubler with adjustable phase offset

A 6 GHz frequency doubler with quadrature outputs generated from a differential single phase input is presented. The phase offset between the in-phase and quadrature outputs can be digitally controlled in linear steps for use in an automated calibration algorithm. The design nominally achieves standard deviations in quadrature phase error and amplitude balance of 0.4/spl deg/ and 0.1dB, respectively. This is demonstrated with a single sideband (SSB) mixer that realizes an average uncalibrated sideband rejection of 48.2 dB which improves to 55.8 dB post-calibration under nominal conditions.     

A MMIC Doubler Based on Novel Open/Short Stub Hybrids

A new configuration of a balanced frequency PHEMT monolithic microwave integrated circuit doubler using open/short stub hybrids is proposed. With multi-coupled lines technology, the phase shifter is produced and applied to a Ka-band doubler successfully. As compared to the conventional lumped-element doubler, this phase shifter can make the doubler more compact in size and flexible in design. The doubler achieves an operation band width of 23 to 26 GHz with the best conversion loss of 7.4 dB at 25 GHz. In addition, the fundamental frequency suppression is better than 24.1 dB, and the chip dimension is as small as 0.85 times 1.1 mm².     

High-efficiency Q-to-W-band MIC frequency doubler

Integrated-circuit phase-lock oscillators are extremely difficult to develop above 60 GHz because of circuit losses. A viable alternative is to use a frequency doubler. A Q-to-W-band (40 to 80 GHz) frequency doubler has been developed using integrated-circuit suspended stripline. A conversion loss of less than 6.5 dB has been achieved with the output frequency at 80 GHz. This high efficiency was obtained by an innovative input and output matching circuit design. The advantages over a waveguide doubler include large reductions in size, weight and cost.     

基于平面肖特基二极管的平衡式亚毫米波倍频器芯片

基于标准的平面肖特基二极管单片工艺设计了一款平衡式亚毫米波倍频单片集成电路.依据二极管实际结构进行电磁建模,提取了器件寄生参数,并与实测的器件本征参数相结合获得了二极管非线性模型;依据该模型,采用平衡式拓扑结构以实现良好的基波抑制,设计了三线耦合巴伦电桥,并与肖特基二极管集成在同一芯片上,实现了单片集成,提高了设计准确...     

A highly linear double balanced Schottky diode S-band mixer

A high-level double balanced SiC Schottky diode mixer in SiC monolithic microwave integrated circuit (MMIC) technology has been designed, processed and characterized. The mixer is a single ended in- and output circuit with coupled transformers as baluns to enable a compact design, resulting in a total area of 2.2/spl times/2.2mm/sup 2/. The mixer has a maximum IIP/sub 3/ of 38dBm and IIP/sub 2/ of 58dBm at 3.3GHz, and a typical P/sub 1 dB/ of 23dBm in the S-band. The minimum conversion loss was 12dBm at 2.4GHz. The high power operation of the mixer shows that SiC MMIC can perform well in high microwave radiation environments.     

A 320–360 GHz Subharmonically Pumped Image Rejection Mixer Using Planar Schottky Diodes

This letter presents the design, fabrication and test of an integrated 320–360 GHz subharmonic image rejection mixer using planar Schottky diodes. The integrated circuit uses two separate anti-parallel pairs of diodes mounted onto a single quartz-based circuit. Measurement results give best single sideband (SSB) receiver noise temperatures of approximately 3400 K at 340 GHz, with an image rejection from 7.2 to 24.1 dB over the 320–360 GHz frequency band. This work represents the first demonstration of a Schottky based SSB mixer at submillimeter wavelengths.      

Broadband monolithic passive baluns and monolithic double-balancedmixer

The design and fabrication of four broadband monolithic passive baluns including CPW Marchand, multilayer MS Marchand, planar-transformer and broadside-coupled line baluns are presented. Operational frequencies range from 1.5 GHz to 24 GHz. Maximum relative bandwidths in excess of 3:1 are achieved. Simulated performances using full wave electromagnetic analysis are shown to agree with the measured results. Two accurate equivalent circuit models constructed from either electromagnetic simulated or measured S-parameters are developed for the MS Marchand and transformer baluns making the optimization of baluns and circuit design using the baluns much more efficient. The design of monolithic double-balanced diode mixer using two planar-transformer baluns is also presented. Without DC bias, the mixer shows a minimum conversion loss of 6 dB with the RF at 5 GHz and a LO drive of 15 dBm at 4 GHz. The measured input IP₃ of this mixer is better than 15 dBm over the 4 to 5.75 GHz frequency band     

A 2.5-GHz BiCMOS transceiver for wireless LAN's

A BiCMOS transceiver intended for spread spectrum applications in the 2.4-2.5 GHz band is described. The IC contains a low-noise amplifier (LNA) with 14 dB gain and 2.2 dB NF in its high-gain mode, a downconversion mixer with 8 dB gain and 11 dB NF, and an upconversion mixer with 17 dB gain and P_{-1 dB} of +3 dBm out. An on-chip local oscillator (LO) buffer accepts LO drive of -10 dBm with a half-frequency option allowed by an on-chip frequency doubler. Power consumption from a single 3-V supply is 34 mA in transmit mode, 21 mA in receive mode, and 1 μA in sleep mode     

A D-band frequency doubler with GaAs Schottky varistor diodes

A D-band hybrid frequency doubler is developed with varistor diodes. The multiplier circuit substrate is RT/duroid 5880 with a thickness of 0.127 mm. In the circuit, the improved waveguide to unilateral finline transition is implemented with lower transition loss by cutting off high-order modes, and the reliability of the mounted circuit is enhanced with increased mounting groove depth. The D-band doubler exhibits the highest efficiency of 2% at 150.2 GHz; the typical efficiency is 1.9% from 150 to 150.5 GHz. The experimental and simulated results are in good agreement.     

Wide-locking range ÷3 series-tuned injection-locked frequency divider

A new wide locking range series-tuned (ST) divide-by-3 injection-locked frequency divider (ILFD) using a standard 0.18 μm CMOS process is presented. The ÷3 ILFD circuit is realized with a ST cross-coupled n-core MOS LC-tank oscillator. Two direct-injection MOSFETs in series are used as a frequency doubler and a dynamic linear mixer to widen the locking range. The power consumption of the ILFD core is 10.56 mW. The divider’s free-running frequency is tunable from 3.529 to 3.828 GHz by tuning the varactor’s control bias, and at the incident power of 0 dBm the maximum locking range is 2.3 GHz (21.6 %), from the incident frequency 9.5 to 11.8 GHz. The operation range is 2.5 GHz (23.7 %), from 9.3 to 11.8 GHz.     

A Broadband Balanced Distributed Frequency Doubler With a Sharing Collector Line

A broadband balanced distributed frequency doubler fabricated by 0.35 $mu$m SiGe BiCMOS technology is developed to operate from 4 to 18 GHz output frequency. This balanced doubler consists of an active balun and a distributed doubler. A sharing collector line is used in the balanced distributed doubler to reduce the chip size. This circuit exhibits a measured conversion loss of less than 8 dB and a fundamental rejection of better than 23 dB for the output frequency between 4 and 18 GHz. The chip size is 1.1$, times ,$0.7 mm $^{2}$.      

A high efficiency 46 to 92 GHz all microstrip frequency doubler

Using packaged GaAs varactor diodes, a high efficiency 46 to 92 GHz frequency doubler has been developed. Microstrip circuits have been used to match the input and output impedances presented by the diode. A conversion loss of 8 to 10 dB was measured. This doubler circuit is useful for W-band (75 to 110 GHz) integrated circuit receivers and transceivers. The use of microstrip circuit can drastically reduce the fabrication cost in addition to size and weight.     

多阳极220GHz倍频器单片设计

介绍了一款基于GaAs肖特基二极管单片工艺的220 GHz倍频器的设计过程以及测试结果。为提高输出功率,倍频器采用多阳极结构,8个二极管在波导呈镜像对称排列,形成平衡式倍频器结构。采用差异式结电容设计解决了多阳极结构端口散射参数不一致问题,提高了倍频器的转换效率和工作带宽。对设计的倍频器进行流片、装配和测试,测试结果显示：倍频器在204～234 GHz频率范围内,转化效率大于15%;226 GHz峰值频率下实现最大输出功率为90.5 mW,转换效率为22.6%。设计的220 GHz倍频器输出功率高,转化效率高,工作带宽大。     

Advanced devices and components for the millimeter and submillimeter systems

The purpose of this paper is to discuss key topics related to low-noise mixers, high efficiency multipliers, the use of quasi-optical techniques to reduce circuit losses, and the development of very high-Q devices applicable to the millimeter and submillimeter wavelengths [1]-[5]. In particular, we will describe the development of a highly reliable metalized GaAs Ta-Schottky-barrier diode with native-oxide passivation. The zero-bias cutoff frequency of these diodes is greater than 1000 GHz when measured accurately near 60 GHz with a zero-bias junction capacitance near 0.1 pF. This zero-bias cutoff frequency is approximately twice the value for a comparable nonmetallized device. Using these very high-Q devices, we have achieved RF performance that has advanced prior state of the art. In frequency multipliers, doublers (100-200 GHz), and triplers (100-300 GHz), we have realized conversion efficiencies of 12 and 2 percent, respectively. The CW output power of the doubler was 18 mW and that of the tripler 2 mW. In an image-enhanced mixer at 35 GHz with an IF of 1 GHz, we have realized conversion loss below 3 dB including 0.6-dB circuit losses, and less than 5.9-dB noise figure (SSB) including a 2-dB IF noise-figure contribution.     

An efficient Schottky-varactor frequency multiplier at millimeter waves. Part I: Doubler

The efficiency of millimeter wave doublers with a wide tunable bandwidth was studied. The efficiency depends on the varactor parameters and the embedding impedances seen by the diode at fundamental and harmonic frequencies. Millimeter wave doublers were simulated with a nonlinear analysis program to find optimum embedding impedances for a given diode. Also the sensitivity of the efficiency to various diode and circuit parameters was evaluated. A scaled model was constructed in order to experimentally optimize the impedances. For experimental verification a doubler from 40–58 GHz to 80–116 GHz was constructed. The highest efficiency measured was 45% at 94 GHz with 5 mW input power. The highest efficiency obtained with 20 mW input power was 38%.     

Calibration of optical modulators by optical down-conversion

A new method for the calibration of intensity modulators and modulated laser diodes at millimeter-wave frequencies is presented. The method uses an integrated-optic modulator as both a mixer and a frequency doubler. To demonstrate the measurement technique an intensity modulator is calibrated over the band 26.5-40 GHz. The measurement system employs no components exceeding 20 GHz (excluding the RF generator), and with relatively minor modifications measurements in excess of 60 GHz are feasible