Se及Cu2Se纳米线的大面积合成及其纳米电子学器件性能

通过液相化学反应制备了高质硒(Se)纳米线,同时以Se纳米线为模板,合成了CuzSe纳米线.利用透射电镜(TEM)、高分辨透射电镜(HRTEM)以及X射线衍射仪(XRD)研究了纳米线的形貌结构特征.结果显示,Se纳米线为单晶结构,生长方向沿其[001]面.结合先进的光刻技术及磁控溅射,成功制备了Se和Cu2Se纳米电子学器件.初步测试表明,这种Se纳米线为P型半导体,而Cu2Se纳米线则表现出明显的相变行为.这些发现有利于开发纳米线场效应晶体管以及相变存储器件方面的应用.     

超声方法合成硒纳米线（英文）

用超声的方法合成了硒纳米线.场发射扫描电镜（FESEM）结果表明产物的形貌比较均一.产物的结构通过透射电镜（TEM）和X-射线衍射仪（XRD）进行了进一步表征.TEM和XRD光谱的结果证明了所得硒纳米线为单晶结构且沿着[001]方向生长.所得硒纳米线在671nm处有一紫外光谱吸收峰,通过对光谱的计算,硒纳米线的能带为1.66eV.基于一系列的生长过程,提出了硒纳米线的生长机理：硒粉溶解溶液中产生自由硒原子;当硒原子浓度过高时,硒原子结晶形成t型硒种子;由于各向异性晶体结构,连续提供的硒原子进入结晶种子形成线性纳米结构.此外,溶解和再结晶使α型硒转化为更稳定的t型硒.超声波可以提供适当的能量来调整这动态的平衡溶解和再结晶,进一步加快这一转变.     

荧光聚氯乙烯纳米线阵列的制备及研究

采用溶液浸润AAO模板法,将自制的荧光稀土配合物Eu（aspirin）3 Phen掺杂到聚氯乙烯（PVC）溶液中,制备了有荧光特性的一维复合纳米线阵列。并采用扫描电镜（SEM）、能谱分析（EDS）及透射电镜（TEM）进行了结构分析,结果表明：掺杂稀土铕配合物的聚氯乙烯制备了规整的纳米线阵列,铕配合物存在于纳米线阵列中。此外,荧光发射光谱研究表明,复合纳米线阵列具有优并的发光性能,归因于稀土配合物在纳米阵列中能更好地分散。     

第VI族元素半导体纳米线的可控合成及其纳米电子学器件研究

采用化学液相反应,以亚硒酸或者原碲酸为原料,合成出尺寸均匀、高结晶度的硒、碲纳米线。高分辨电镜分析结果表明：合成的硒、碲纳米线均为三方晶单晶结构,生长方向沿其螺旋轴四[001]方向生长。结合光刻、电子束刻蚀技术,分别翻备了硒、碲纳米线场效应晶体管器件（FET）。对器件测试的结果显示：硒和碲纳米线均为P型半导体,其相应的空穴迁移率分别为30．7,70cm^2V^-11s-1。这对新型纳米线电子学器件的开发应用具有重要意义。     

第Ⅵ族元素半导体纳米线的可控合成及其纳米电子学器件研究

采用化学液相反应,以亚硒酸或者原碲酸为原料,合成出尺寸均匀、高结晶度的硒、碲纳米线.高分辨电镜分析结果表明:合成的硒、碲纳米线均为三方晶单晶结构,生长方向沿其螺旋轴即[001]方向生长.结合光刻、电子束刻蚀技术,分别制备了硒、碲纳米线场效应晶体管器件(FET).对器件测试的结果显示:硒和碲纳米线均为P型半导体,其相应的空穴迁移率分别为30.7,70cm2V-1 s-1.这对新型纳米线电子学器件的开发应用具有重要意义.     

钴、镍纳米线及其异质结的制备与磁性研究

采用脉冲电沉积技术在氧化铝模板中制备了单晶钴、镍纳米线阵列和镍/钴纳米线异质结阵列.分别用场发射扫描电镜、透射电镜、X射线衍射仪、物理性能测试系统对纳米线阵列的微观形貌、结构和性能进行了表征与研究.结果表明,所制备的磁性纳米线有很大的长径比,易磁化方向均为纳米线长轴方向.纳米线异质结阵列在易磁化方向具有较大的矫顽力和矩形比,可用作高密度垂直磁记录材料.     

氨化Ga2O3/TiO2/Si薄膜制备GaN纳米线

为了制备高质量的GaN纳米结构,采用磁控溅射技术先在硅衬底上制备Ga2O3／TiO2薄膜,然后在950℃时于流动的氨气中进行氨化反应,成功制备出GaN纳米线．采用X射线衍射（XRD）、傅里叶红外吸收光谱（FTIR）、扫描电子显微镜（SEM）和高分辨透射电子显微镜（HRTEM）对样品进行分析．研究结果表明,采用此方法得到了六方纤锌矿结构的GaN单晶纳米线,纳米线的直径在100～400nm,纳米线的长度在3～10μm．     

催化剂辅助化学气相沉积法制备InN纳米线

采用催化剂辅助化学气相沉积法,通过固-液-气（V-L-S）机理控制在硅衬底上制备了高质量的InN纳米线。利用FESEM、XRD、HRTEM对制备的InN纳米线的表面形貌和结构进行了表征。分析表明合成的InN纳米线为标准的六方纤锌矿结构,纳米线沿[102]方向生长。室温PL光谱表明,制备的InN纳米线在1580rlIn（...     

合成和表征NiFe2O4纳米线阵列

采用真空灌注结合溶胶-凝胶和氧化铝模板法,在多孔氧化铝模板中制备了平均直径为50 nm的NiFe2O4纳米线阵列.X射线衍射结果显示所制备的纳米线是纯相的NiFe2O4纳米线,透射电镜和电子衍射的结果显示已制备的纳米线是多晶的且表面光滑,场发射扫描电镜图片显示纳米线是大面积且平行有序的、纳米线的长度和所用的氧化铝模板的厚度相当.磁测量的结果显示此纳米线阵列有形状各向异性,同块状材料相比矫顽力有所增强.对纳米线的生长机理做了简单的讨论.     

适用于纳米电子器件的超长硅纳米线合成

采用SiO为起始原料、Ar为载气,蒸发温度1300℃、压力1～2×104Pa的生长条件下,成功地合成了超长的单晶硅纳米线;以SiO和P205混合粉末为起始原料时在相同的生长条件下实现了对硅纳米线的掺杂;借助电感耦合等离子体质谱仪（ICPMS）分析了硅纳米线P掺杂效果;利用扫描电镜（SEM）、高分辨透射电镜（HRTEM）、X射线衍射仪（XDR）等检测手段对硅纳米线进行了形貌和结构的表征,测试结果表明在不同的沉积区域硅纳米线具有大致相同的直径,但其长度随着温度的升高而变长,在1180℃的生长区域,硅纳米线的长度达到了150μm;硅纳米线表面氧化层经HF和NH4F混合溶液处理后被完全剔除。     

Field effect transistor from individual trigonal Se nanowire

Trigonal Se nanowires (NWs) were fabricated through a high-yield chemical solution process. The morphology and structural characterization of the Se NWs were investigated using transmission electron microscopy (TEM), high-resolution TEM (HRTEM), and x-ray diffraction (XRD). The results indicated that the Se NWs grow along the crystallographic c-axis, the direction of which is parallel to the helical chains of Se atoms. Single Se NW field effect transistor (FET) devices were prepared through photolithographic patterning. The device performance shows that the Se NWs are p-type semiconductors displaying mobility up to 30?cm(2)?V(-1)?s(-1). This finding on the Se NW FETs has broad implications and provides very useful fundamental information necessary for future applications in the fabrication of high-quality NW FETs and other electronic devices.     

Non‐Volatile Ferroelectric Memory with Position‐Addressable Polymer Semiconducting Nanowire

One‐dimensional nanowires (NWs) have been extensively examined for numerous potential nano‐electronic device applications such as transistors, sensors, memories, and photodetectors. The ferroelectric‐gate field effect transistors (Fe‐FETs) with semiconducting NWs in particular in combination with ferroelectric polymers as gate insulating layers have attracted great attention because of their potential in high density memory integration. However, most of the devices still suffer from low yield of devices mainly due to the ill‐control of the location of NWs on a substrate. NWs randomly deposited on a substrate from solution‐dispersed droplet made it extremely difficult to fabricate arrays of NW Fe‐FETs. Moreover, rigid inorganic NWs were rarely applicable for flexible non‐volatile memories. Here, we present the NW Fe‐FETs with position‐addressable polymer semiconducting NWs. Polymer NWs precisely controlled in both location and number between source and drain electrode were achieved by direct electrohydrodynamic NW printing. The polymer NW Fe‐FETs with a ferroelectric poly(vinylidene fluoride‐co‐trifluoroethylene) exhibited non‐volatile ON/OFF current margin at zero gate voltage of approximately 10² with time‐dependent data retention and read/write endurance of more than 10⁴ seconds and 10² cycles, respectively. Furthermore, our device showed characteristic bistable current hysteresis curves when being deformed with various bending radii and multiple bending cycles over 1000 times.     

Layer-by-layer assembly of nanowires for three-dimensional, multifunctional electronics

We report a general approach for three-dimensional (3D) multifunctional electronics based on the layer-by-layer assembly of nanowire (NW) building blocks. Using germanium/silicon (Ge/Si) core/shell NWs as a representative example, ten vertically stacked layers of multi-NW field-effect transistors (FETs) were fabricated. Transport measurements demonstrate that the Ge/Si NW FETs have reproducible high-performance device characteristics within a given device layer, that the FET characteristics are not affected by sequential stacking, and importantly, that uniform performance is achieved in sequential layers 1 through 10 of the 3D structure. Five-layer single-NW FET structures were also prepared by printing Ge/Si NWs from lower density growth substrates, and transport measurements showed similar high-performance characteristics for the FETs in layers 1 and 5. In addition, 3D multifunctional circuitry was demonstrated on plastic substrates with sequential layers of inverter logical gates and floating gate memory elements. Notably, electrical characterization studies show stable writing and erasing of the NW floating gate memory elements and demonstrate signal inversion with larger than unity gain for frequencies up to at least 50 MHz. The ability to assemble reproducibly sequential layers of distinct types of NW-based devices coupled with the breadth of NW building blocks should enable the assembly of increasing complex multilayer and multifunctional 3D electronics in the future.     

InAs Nanowire Devices with Strong Gate Tunability:Fundamental Electron Transport Properties and Application Prospects:A Review

The high electron mobility has granted indium arsenide(InAs) nanowires(NWs) as an important class of nanomaterials for high performance electronics such as field-effect transistors(FETs).We reviewed recent progresses on the studies of quantum coherence,gate tunable one-dimensional(1D) confinement and spin orbit interaction(SOI) in InAs NW based electronic and thermoelectric transport devices.We also demonstrated gas sensing response of InAs NW FETs and elucidated the mechanism via a gating experiment.By using InAs NWs as an example,these fundamental transport studies have shed important lights on the potential thermoelectric,spintronic and gas sensing applications of semiconductor NWs where the 1D confinement,SOI or surface states effects are exploited.     

Rational synthesis of p-type zinc oxide nanowire arrays using simple chemical vapor deposition

We report, for the first time, the synthesis of the high-quality p-type ZnO NWs using a simple chemical vapor deposition method, where phosphorus pentoxide has been used as the dopant source. Single-crystal phosphorus doped ZnO NWs have their growth axis along the 001 direction and form perfect vertical arrays on a-sapphire. P-type doping was confirmed by photoluminescence measurements at various temperatures and by studying the electrical transport in single NWs field-effect transistors. Comparisons of the low-temperature PL of unintentionally doped ZnO (n-type), as-grown phosphorus-doped ZnO, and annealed phosphorus-doped ZnO NWs show clear differences related to the presence of intragap donor and acceptor states. The electrical transport measurements of phosphorus-doped NW FETs indicate a transition from n-type to p-type conduction upon annealing at high temperature, in good agreement with the PL results. The synthesis of p-type ZnO NWs enables novel complementary ZnO NW devices and opens up enormous opportunities for nanoscale electronics, optoelectronics, and medicines.     

High mobility field effect transistor from solution-processed needle-like tellurium nanowires

Well-dispersed and uniform needle-like tellurium nanowires (NWs) have been fabricated in high yield by an environmentally-friendly hydrothermal method. It is found that beta-cyclodextrin ligands and reaction temperature play a great role on the morphology of Te NWs. Uniform needle-like Te NWs can only be obtained at suitable concentration of beta-CD and reaction temperature. A possible mechanism for the formation of the needle-liked Te NWs is discussed based on the experiment results briefly. High quality single Te NW field effect transistors are prepared through photolithographic patterning. By optimizing electrode and surface treatments, the NW FET has a high carrier mobility of 299 cm2V(-1)s(-1), which is the highest value ever reported for Te NW-based FETs. The performance is influenced by purity, crystallinity, surface species of NWs and metal contacts of NW device.     

Blueshift of electroluminescence from single n-InP nanowire/p-Si heterojunctions due to the Burstein-Moss effect

Single-crystalline n-type InP nanowires (NWs) with different electron concentrations were synthesized on Si substrates via the vapor phase transport method. The electrical properties of the InP nanowires were investigated by fabricating and measuring single NW field-effect transistors (FETs). Single InP NW/p(+)-Si heterojunctions were fabricated, and electroluminescence (EL) spectra from them were studied. It was found that both the photoluminescence (PL) spectra of the InP NWs and the EL spectra of the heterojunctions blueshift from 920 to 775?nm when the electron concentrations of the InP NWs increase from 2 × 10(17) to 1.4 × 10(19)?cm(-3). The blueshifts can be attributed to the Burstein-Moss effect rather than the quantum confinement effect in the InP NWs. The large blueshifts observed in this study indicate a potential application of InP NWs in nano-multicolour displays.     

Development of ultra-high density silicon nanowire arrays for electronics applications

This article reviews our recent progress on ultra-high density nanowires (NWs) array-based electronics. The superlattice nanowire pattern transfer (SNAP) method is utilized to produce aligned, ultra-high density Si NW arrays. We fi rst cover processing and materials issues related to achieving bulk-like conductivity characteristics from 10 20 nm wide Si NWs. We then discuss Si NW-based fi eld-effect transistors (FETs). These NWs & NW FETs provide terrifi c building blocks for various electronic circuits with applications to memory, energy conversion, fundamental physics, logic, and others. We focus our discussion on complementary symmetry NW logic circuitry, since that provides the most demanding metrics for guiding nanofabrication. Issues such as controlling the density and spatial distribution of both p-and n-type dopants within NW arrays are discussed, as are general methods for achieving Ohmic contacts to both p-and n-type NWs. These various materials and nanofabrication advances are brought together to demonstrate energy effi cient, complementary symmetry NW logic circuits.     

Role of confinement on carrier transport in Ge-Si(x)Ge(1-x) core-shell nanowires

We examine the impact of shell content and the associated hole confinement on carrier transport in Ge-Si(x)Ge(1-x) core-shell nanowires (NWs). Using NWs with different Si(x)Ge(1-x) shell compositions (x = 0.5 and 0.7), we fabricate NW field-effect transistors (FETs) with highly doped source/drain and examine their characteristics dependence on shell content. The results demonstrate a 2-fold higher mobility at room temperature, and a 3-fold higher mobility at 77K in the NW FETs with higher (x = 0.7) Si shell content by comparison to those with lower (x = 0.5) Si shell content. Moreover, the carrier mobility shows a stronger temperature dependence in Ge-Si(x)Ge(1-x) core-shell NWs with high Si content, indicating a reduced charge impurity scattering. The results establish that carrier confinement plays a key role in realizing high mobility core-shell NW FETs.     

Growth direction modulation and diameter-dependent mobility in InN nanowires

Diameter-dependent electrical properties of InN nanowires (NWs) grown by chemical vapor deposition have been investigated. The NWs exhibited interesting properties of coplanar deflection at specific angles, either spontaneously, or when induced by other NWs or lithographically patterned barriers. InN NW-based back-gated field effect transistors (FETs) showed excellent gate control and drain current saturation behaviors. Both NW conductance and carrier mobility calculated from the FET characteristics were found to increase regularly with a decrease in NW diameter. The observed mobility and conductivity variations have been modeled by considering NW surface and core conduction paths.