Synchronous and asynchronous operation in dual‐band VCOs

We present a comprehensive analysis of the asynchronous and synchronous operations of fourth‐order oscillators underlying dual‐band voltage‐controlled oscillators. We analyze the occurrence of the self‐synchronization phenomenon (internal resonance) if the ratio of normal frequencies is nearly a ratio of integers, which is 1:3 in the cubic approximation of the nonlinear oscillator characteristic. In this case, we have the simultaneous presence of 2 oscillations with a frequency ratio 1:3, which was demonstrated to be very effective in generating high‐frequency signals in mm‐wave range. The analysis is carried out by developing an analytical approach relying on the averaging principle, as it follows the van der Pol method. The averaging equations, derived simply by a quadrature, allow us to analyze easily the stationary and transient oscillations, and their stability, both in asynchronous and synchronous operations. Expressions for the amplitudes and phases were derived for a cubic nonlinearity and verified by Spice simulations.     

Design and implementation of switched coil LC‐VCOs in the GHz range using the self‐inductance technique

This paper presents the design and implementation of dual‐band LC‐VCOs in the GHz‐range featuring a switched coil LC‐tank. The proposed design exploits the self‐inductance technique. The design of the coil starts from simple considerations and back‐of‐the‐envelope calculations, then electromagnetic simulations are used to optimize the coil layout. The sizing of the switch and its impact on the VCO performance are addressed as well. The VCOs have been implemented in 65 nm CMOS technology. Good correlation between simulated and measured tuning range and phase noise is obtained for all designs, thus confirming the validity and robustness of the design methodology and coil models. Copyright © 2013 John Wiley & Sons, Ltd.     

The design of linear and circular polarization for dual band microstrip slot antenna

This paper presents a lightweight antenna for wireless communication systems. The proposed antenna has been designed to be a dual‐band and dual‐polarized antenna by using a right‐angled slot structure fed a by microstrip line. The designed antenna is composed of three right‐angled slot radiators on the ground plane. The first two radiators are right‐angled slots of similar scale which are added to generate circular polarization at 4.95 GHz, while the last one has been designed for linear polarization at 2.45 GHz. Furthermore, in order to achieve dual‐band operation and dual polarization with good matching, a special arrangement is proposed. The results of simulation and measurements such as return loss, axial ratio, and radiation patterns are shown at the resonant frequencies of 2.45 and 4.95 GHz. Details of the experimental results are presented and discussed. In addition, the presented antenna can operate and cover the applications of a wireless local area network (WLAN IEEE 802.11 a/b/g/j/n). © 2014 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

Transformer‐coupled π‐network differential CMOS oscillator circuit topology

This paper reports a novel oscillator circuit topology based on a transformer‐coupled π‐network. As a case study, the proposed oscillator topology has been designed and studied for 60 GHz applications in the frame of the emerging fifth generation wireless communications. The analytical expression of the oscillation frequency is derived and validated through circuit simulations. The root‐locus analysis shows that oscillations occur only at that resonant frequency of the LC tank. Moreover, a closed‐form expression for the quality factor (Q) of the LC tank is derived which shows the enhancement of the equivalent quality factor of the LC tank due to the transformer‐coupling. Last, a phase noise analysis is reported and the analytical expressions of phase noise due to flicker and thermal noise sources are derived and validated by the results obtained through SpectreRF simulations in the Cadence design environment with a 28 nm CMOS process design kit commercially available. Copyright © 2016 John Wiley & Sons, Ltd.     

Analytical synthesis and comparison of voltage‐mode Nth‐order OTA‐C universal filter structures

Complementary single‐ended‐input operational transconductance amplifier (OTA)‐based filter structures are introduced in this paper. Through two analytical synthesis methods and two transformations, one of which is to convert a differential‐input OTA to two complementary single‐ended‐input OTAs, and the other to convert a single‐ended‐input OTA and grounded capacitor‐based one to a fully differential OTA‐based one, four distinct kinds of voltage‐mode nth‐order OTA‐C universal filter structures are proposed. TSMC H‐Spice simulations with 0.35µm process validate that the new complementary single‐ended‐input OTA‐based one holds the superiority in output precision, dynamic and linear ranges than other kinds of filter structures. Moreover, the new voltage‐mode band‐pass, band‐reject and all‐pass (except the fully differential one) biquad structures, all enjoy very low sensitivities. Both direct sixth‐order universal filter structures and their equivalent three biquad stage ones are also simulated and validated that the former is not absolutely larger in sensitivity than the latter. Finally, a very sharp increment of the transconductance of an OTA is discovered as the operating frequency is very high and leads to a modified frequency‐dependent transconductance. Copyright © 2010 John Wiley & Sons, Ltd.     

A model‐based dead‐band compensation for the dual‐active‐bridge isolated bidirectional DC–DC converter

The dual active bridge (DAB)‐based isolated bidirectional converter has been used to realize bidirectional energy flow while offering needed isolation between the primary and secondary side: for example, the battery side and grid side of one plug‐in hybrid electric vehicle (PHEV). Even though the operation of a DAB‐based DC–DC converter is straightforward, various transient processes exist, such as the dead‐band effect, which deeply affects the dynamic performance of the converter in real world applications. Compensation of this effect is not easy because of the strong nonlinearity of the entire system. This paper quantitatively analyzed the dead‐band effect at different output powers, and presented a model‐based controller to realize the nonlinear dead‐band compensation strategy, which can effectively mitigate demerits of the traditional PI‐based control strategy. The proposed control algorithm is validated through theoretical simulation and experimental results. © 2011 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

一种应用于光伏并网发电系统的新型双输入DC-DC变换器

提出一种具有高增益低电压应力的双输入DC-DC变换器,该变换器由两个上下对称的耦合电感Boost变换器组成。具有单输入和双输入两个模式,在单输入状态下只有一个开关管工作;在双输入状态下两个开关管工作。新型变换器可以通过改变耦合电感的匝比来提升变换器电压增益;输出端采用三电平结构使变换器开关管和二极管电压应力减小。分析了变换器在单输入和双输入模式下的工作模态;给出了变换器主要工作波形;推导了变换器电压增益,开关管和二极管电压应力,分析了漏感对变换器的电压增益的影响。通过实验验证了理论分析的正确性。     

Truncation filtering method for envelope analysis

Envelope analysis is an effective tool for bearing fault diagnosis. In most cases, the fault signal of the bearing that is located deeply inside the machine is always covered by the huge wide‐band noise. However, the common envelope analysis cannot effectively extract the fault feature from the frequency band containing huge wide‐band noise. Therefore, a modified envelope analysis that contains a new band‐pass filter based on resonance band and a new matched filtering computing method is proposed. The common envelope analysis is always concentrated on the selection of the filtering band and filter's other parameters, which can just control some parts of the filter. However, the whole shape of the filter has great effects on every element content of the filtered signal. Thus, according to the distribution characteristic of fault impact spectrum lines, the shape of the freedom damping vibration excited by single impact in frequency domain can be used as a filter for the truncation filtering to obtain the optimal envelope spectrum. Since the envelope shape of practical fault impact spectrum lines is not exactly like the shape of single impact in frequency domain, a scan filtering method is added to the band‐pass filtering, which is to use different central frequencies with the same interval and different bandwidths for filtering. A complicated structure test rig that is self‐innovate is used for experimental validation. The experimental result shows that fault feature extracted by the proposed method is better than the one extracted by the common envelope analysis.     

Small‐signal analysis of interleaved dual boost converter

This paper presents a systematic development of steady‐state, small‐signal models of interleaved dual boost converter operating in a continuous current mode. These models are derived by employing the well‐known signal flow graph method. This signal flow graph approach provides a means to directly translate the switching converter into its equivalent graphic model, from which a complete behaviour of the converter can easily be studied. Steady‐state performance, small‐signal characteristic transfer functions are derived using Mason's gain formula. The bode plots of audiosusceptibility, input impedance, output impedance, and control‐to‐output transfer functions are determined and illustrated using MATLAB for different values of load resistances, duty ratios. Small‐signal frequency responses obtained from the signal flow graph method are validated with PSPICE simulator results. To validate the signal flow graph modelling equations, sample steady‐state experimental results are provided. Copyright © 2001 John Wiley & Sons, Ltd.     

CPW‐fed compact thin‐film UWB antenna with dual band‐notched characteristics

This paper presents a new compact thin‐film ultrawideband (UWB) antenna with dual band‐notched characteristics. The antenna contains a rectangular slot with a fork‐like tuning stub. To achieve the dual band‐notched characteristics, narrow and U‐shaped slots are inserted on the radiator. This antenna is printed on a Mylar film substrate of 0.3 mm thickness with a dielectric constant of 3.2. The antenna has compact dimensions of 34.5 × 27.3 mm². It operates in the frequency range 2.9–11.3 GHz with impedance matching covering the entire bandwidth and reasonable radiation properties. It also exhibits dual band‐notched characteristics. One of the notched frequencies is in the range 3.3–3.7 GHz (WiMAX band) and the other in the range 5.1–5.8 GHz (WLAN band). The antenna is designed and simulated by using the commercial IE3D software, which is based on the method of moments. The antenna was fabricated and measured using Agilent E363B PNA network analyzers. The characteristics of the fabricated antenna show high correlation with those obtained from the simulation. The results confirm that the proposed antenna can achieve notch performance for WLAN and WiMAX communication systems and is also suitable for various portable UWB applications. © 2014 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

Asymmetric halo and symmetric Single‐Halo Dual‐Material Gate and Double‐Halo Dual‐Material Gate n‐MOSFETs characteristic parameter modeling

This paper presents an analytical subthreshold surface potential model of novel structures called asymmetric pocket‐implanted Double‐Halo Dual‐Material Gate (DHDMG) and Single‐Halo Dual‐Material Gate (SHDMG) Metal Oxide Semiconductor Field Effect Transistor (MOSFET), which combines the advantages of both the channel engineering (halo) and the gate engineering techniques (dual‐material gate) to effectively suppress the short‐channel effects (SCEs). The model is derived using the pseudo‐2D analysis by applying the Gauss's law to an elementary rectangular box in the channel depletion region, considering the surface potential variation with the channel depletion layer depth. The asymmetric pocket‐implanted model takes into account the effective doping concentration of the two linear pocket profiles at the source and the drain ends. The inner fringing field capacitances are also considered in the model for accurate estimation of the subthreshold surface potential at the two ends of the MOSFET. The same model is used to find the characteristic parameters for dual‐material gate with single‐halo and double‐halo implantations. It is concluded that the DHDMG device structure exhibits better suppression of the SCEs and the threshold voltage roll‐off than a pocket‐implanted and SHDMG MOSFET after investigating the characteristics parameter improvement. In order to validate our model, the modeled expressions have been extensively compared with the simulated characteristics obtained from the 2D device simulator DESSIS. A nice agreement is achieved with a reasonable accuracy over a wide range of device parameter and bias condition. Copyright © 2012 John Wiley & Sons, Ltd.     

Evaluating the spectrum of periodic pulling in subharmonic resonant LC circuits

We analyze the features of the oscillations arising in forced inductor–capacitor (LC) oscillators when they operate in the periodic pulling mode, under the action of a weak injection signal. In radio frequency integrated circuits, both voltage‐controlled oscillators subject to undesired couplings and injection‐locked frequency dividers behave like forced LC oscillators. These are modeled as second‐order driven oscillators working in the subharmonic (secondary) resonance regime. The analysis is based on the generalized Adler's equation, which we introduce to describe the phase dynamics of dividers of any division ratio and to derive closed‐form expressions for the spectrum components of the system's oscillatory response. We show that the spectrum is double‐sided and asymmetric, unlike the single‐sided spectrum of systems with primary resonance. Numerical and experimental results are given to validate the presented results, which significantly generalize those available in the literature. Copyright © 2014 John Wiley & Sons, Ltd.     

Experimental comparison of phase‐noise in cross‐coupled RC‐ and LC‐oscillators

Relaxation RC‐oscillators are notorious for their poor phase‐noise performance. However, there are reasons to expect a phase‐noise reduction in quadrature oscillators obtained by cross‐coupling two relaxation oscillators. We present measurements on 5 GHz oscillators, which show that in RC‐oscillators the coupling reduces both the phase‐noise and quadrature error, whereas in LC‐oscillators the coupling reduces the quadrature error, but increases the phase‐noise. A comparison using standard figures of merit indicates that quadrature RC‐oscillators may be a viable alternative to LC‐oscillators when area and cost are to be minimized. Copyright © 2009 John Wiley & Sons, Ltd.     

Asynchronous sum‐of‐products logic minimization and orthogonalization

We propose a method of the asynchronous sum‐of‐products (SOP) logic simplification that comprises of minimization and orthogonalization. The method is based on a transformation of the conventional single‐rail SOP synchronous logic into the dual‐rail asynchronous one operating under so‐called modified weak constraints. We formulate and prove the product terms constraint that ensures a correct logic behavior. We have processed the MCNC benchmarks and generated the asynchronous SOP logic. The complexity of the logic obtained is compared with the state‐of‐the‐art representation. Using our approach, we achieve a significant improvement. Copyright © 2012 John Wiley & Sons, Ltd.     

Design and analysis of power‐CMOS‐gate‐based switched‐capacitor DC–DC converter with step‐down and step‐up modes

A unified multi‐stage power‐CMOS‐transmission‐gate‐based quasi‐switched‐capacitor (QSC) DC–DC converter is proposed to integrate both step‐down and step‐up modes all in one circuit configuration for low‐power applications. In this paper, by using power‐CMOS‐transmission‐gate as a bi‐directional switch, the various topologies for step‐down and step‐up modes can be integrated in the same circuit configuration, and the configuration does not require any inductive elements, so the IC fabrication is promising for realization. In addition, both large‐signal state‐space equation and small‐signal transfer function are derived by state‐space averaging technique, and expressed all in one unified formulation for both modes. Based on the unified model, it is all presented for control design and theoretical analysis, including steady‐state output and power, power efficiency, maximum voltage conversion ratio, maximum power efficiency, maximum output power, output voltage ripple percentage, capacitance selection, closed‐loop control and stability, etc. Finally, a multi‐stage QSC DC–DC converter with step‐down and step‐up modes is made in circuit layout by PSPICE tool, and some topics are discussed, including (1) voltage conversion, output ripple percentage, and power efficiency, (2) output robustness against source noises and (3) regulation capability of converter with loading variation. The simulated results are illustrated to show the efficacy of the unified configuration proposed. Copyright © 2003 John Wiley & Sons, Ltd.     

Modelling of impedance‐loaded wire frequency‐selective surfaces with tunable reflection and transmission characteristics

In this paper an efficient means to control the reflection and transmission characteristics of wire‐based frequency‐selective surfaces (FSS) using linear‐lumped impedance loading is presented. We show that by varying the topology of the RLC loading circuits and the component values it is possible to control the resonance frequency of the array as well as its angular characteristics. We discuss several examples, particularly a switchable dual band bandpass filter and enhancement of FSS angle‐of‐arrival properties. The analysis is based on the self‐consistent solution of thin wire Hallen's type integral equation solved by Galerkin's method. The periodic Green's function in the kernel of integral equation has been accelerated using the Ewald transformation, which leads to a highly accurate and efficient numerical procedure. Copyright © 2008 John Wiley & Sons, Ltd.     

Application of duality principle to synthesis of single‐stage power‐factor‐correction voltage regulators

The duality principle is applied to derive new single‐stage power‐factor‐correction (PFC) voltage regulators. This paper begins with an application of duality transformation to conventional discontinuous‐conduction‐mode buck, buck‐boost and boost converters. The resulting dual converters operate in the discontinuous capacitor voltage mode. These new converters provide the same PFC property, but in the dual manner. It is proved that in the practical case of the input being a voltage source, the mandatory insertion of inductance between the voltage input and the ‘dual PFC converter’ does not affect the power‐factor‐correcting property. A new single‐stage PFC regulator is derived by taking the dual of a well‐known circuit based on a cascade of conventional boost and buck converters. Analytical design expressions are derived, illustrating the relation between current stress and component values. Experiments are performed to confirm the operation of the circuit and its power‐factor‐correcting capability. Copyright © 2003 John Wiley & Sons, Ltd.     

Square‐root domain wave filters

In this paper the wave method is used for designing high‐order square‐root domain filters, which emulate the topology of the corresponding LC ladder prototypes. This is achieved by transposing the signal flow graph that corresponds to the wave equivalent of the elementary two‐port subnetwork in the linear domain to the corresponding one in the square‐root domain, by employing an appropriate set of complementary operators. As the equivalents of the other reactive elements are derived from the wave equivalent of the elementary subnetwork, by interchanging the terminals of the appropriate wave signals and/or using inverters, an advantage offered by the proposed technique is the modularity of the derived filter configurations. As an example, a fifth‐order lowpass square‐root domain wave filter was designed and its behaviour was studied through simulation results in order to demonstrate the validity of the proposed design technique. Copyright © 2006 John Wiley & Sons, Ltd.     

Identification of dual‐rate systems based on finite impulse response models

Two identification algorithms, a least squares and a correlation analysis based, are developed for dual‐rate stochastic systems in which the output sampling period is an integer multiple of the input updating period. The basic idea is to use auxiliary FIR models to predict unmeasurable noise‐free (true) outputs, and then use these and system inputs to identify parameters of underlying fast single‐rate models. The simulation results indicate that the proposed algorithms are effective. Copyright © 2004 John Wiley & Sons, Ltd.     

Divide‐by‐2 LC injection‐locked frequency divider with wide locking range at low and high injection powers

A wide locking range nMOS divide‐by‐2 RLC injection‐locked frequency divider (ILFD) was designed and implemented in the TSMC 0.18‐µm BiCMOS process. The ILFD is based on a cross‐coupled oscillator with one direct injection MOSFET and a RLC resonator. The RLC resonator is used to extend the locking range so that dual‐band locking ranges can be merged in one locking range at both low and high injection powers. At the drain‐source bias of 0.9 V for switching transistors, and at the incident power of 0 dBm the locking range of the divide‐by‐2 ILFD is 7.24 GHz, from the incident frequency 2.65 to 9.89 GHz, the locking range percentage is 115.47%. The power consumption of ILFD core is 8.685 mW. The die area is 0.726 × 0.930 mm². Copyright © 2016 John Wiley & Sons, Ltd.