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1.
A high breakdown voltage and a high turn-on voltage (Al/sub 0.3/Ga/sub 0.7/)/sub 0.5/In/sub 0.5/P/InGaAs quasi-enhancement-mode (E-mode) pseudomorphic HEMT (pHEMTs) with field-plate (FP) process is reported for the first time. Between gate and drain terminal, the transistor has a FP metal of 1 /spl mu/m, which is connected to a source terminal. The fabricated 0.5/spl times/150 /spl mu/m/sup 2/ device can be operated with gate voltage up to 1.6 V owing to its high Schottky turn-on voltage (V/sub ON/=0.85 V), which corresponds to a high drain-to-source current (I/sub ds/) of 420 mA/mm when drain-to-source voltage (V/sub ds/) is 3.5 V. By adopting the FP technology and large barrier height (Al/sub 0.3/Ga/sub 0.7/)/sub 0.5/In/sub 0.5/P layer design, the device achieved a high breakdown voltage of -47 V. The measured maximum transconductance, current gain cutoff frequency and maximum oscillation frequency are 370 mS/mm, 22 GHz , and 85 GHz, respectively. Under 5.2-GHz operation, a 15.2 dBm (220 mW/mm) and a 17.8 dBm (405 mW/mm) saturated output power can be achieved when drain voltage are 3.5 and 20 V. These characteristics demonstrate that the field-plated (Al/sub 0.3/Ga/sub 0.7/)/sub 0.5/In/sub 0.5/P E-mode pHEMTs have great potential for microwave power device applications.  相似文献   

2.
蓝宝石衬底AlGaNöGaN 功率HEM Ts 研制   总被引:3,自引:0,他引:3       下载免费PDF全文
基于蓝宝石衬底的高微波特性 Al Ga N/Ga N HEMTs功率器件 ,器件采用了新的欧姆接触和新型空气桥方案。测试表明 ,器件电流密度 0 .784A/mm,跨导 1 97m S/mm,关态击穿电压 >80 V,截止态漏电很小 ,栅宽 1 mm的器件的单位截止频率 ( f T)达到 2 0 GHz,最大振荡频率 ( fmax) 2 8GHz,2 GHz脉冲测试下 ,栅宽 0 .75 mm器件 ,功率增益1 1 .8d B,输出功率 3 1 .2 d Bm,功率密度 1 .75 W/mm。  相似文献   

3.
The structure and fabrication of a Schottky-barrier gate FET (SB-VFET) with a nonplanar conduction channel fabricated by preferential etching of silicon axe described in this paper. The device exhibits high transconductance and low series resistance and is suitable for low-noise applications at the lower end of the microwave spectrum. The low-frequency transconductance per unit channel length of 6 µm-gate device was typically 18.8 mΩ/mm, the gate breakdown voltage was 7 V, and the cutoff frequency was 1.3 GHz. The noise figure with the device biased for maximum gain was typically 4 dB at 350 MHz. A simplified theory adequate for engineering design purposes is proposed to explain the characteristics of the device and an equivalent circuit is used to model the high-frequency behavior. The theory is shown to be in agreement with experimental results. Frequency limitations of the present device are discussed and further improvements are proposed.  相似文献   

4.
The potential of the metal-semiconductor field-effect transistor (MESFET) as a device for a dc-stable fixed-address memory-cell array is described. The implementation of dc-coupled circuits with `normally off' MESFET's having 1-/spl mu/m gate lengths yields several inherent advantages: high packing density, low power dissipation, low-power-delay time product, and low number of masking steps for transistors, diodes, and resistors. To demonstrate these advantages a fixed-address memory array with dc-stable cells has been chosen. The integrated cell area is 2.6 mil. For a supply voltage V/SUB s/=0.6 V, a standby power dissipation per cell of 5 /spl mu/W has been achieved. The cell switches within 4 ns. The differential sense current in the digit lines is /spl Delta/I/SUB s/=6 /spl mu/A.  相似文献   

5.
A MOSFET with a maximum power of 200 W in a 5/spl times/5 mm/SUP 2/ chip which exhibits 20-A current, 3000-millimho transconductance and 100-V breakdown voltage has been developed. The features of the device structure are a vertical drain electrode which makes it possible to use most of the surface area for the source electrode, and a meshed gate structure which realizes an increase in the channel width per unit area. The p-channel device with an offset gate structure was fabricated from an n on p/SUP +/ epitaxial wafer by using polysilicon gate and ion implantation processes. The device can be operated stably at ambient temperatures up to 180/spl deg/C. While the bipolar transistor is a suitable power device in the low voltage region, the MOSFET looks more promising in the high voltage region than the V-FET and the bipolar transistor.  相似文献   

6.
Ga0.51In0.49P/In0.15Ga0.85 As/GaAs pseudomorphic doped-channel FETs exhibiting excellent DC and microwave characteristics were successfully fabricated. A high peak transconductance of 350 mS/mm, a high gate-drain breakdown voltage of 31 V and a high maximum current density (575 mA/mm) were achieved. These results demonstrate that high transconductance and high breakdown voltage could be attained by using In0.15Ga0.85As and Ga0.51In0.49P as the channel and insulator materials, respectively. We also measured a high-current gain cut-off frequency ft of 23.3 GHz and a high maximum oscillation frequency fmax of 50.8 GHz for a 1-μm gate length device at 300 K. RF values where higher than those of other works of InGaAs channel pseudomorphic doped-channel FETs (DCFETs), high electron mobility transistors (HEMTs), and heterostructure FETs (HFETs) with the same gate length and were mainly attributed to higher transconductance due to higher mobility, while the DC values were comparable with the other works. The above results suggested that Ga0.51In0.49P/In0.15Ga0.85 As/GaAs doped channel FET's were were very suitable for microwave high power device application  相似文献   

7.
首次采用CF4等离子体技术实现可用于功率变换的增强性AlGaN/GaN功率器件。实验结果表明,当AlGaN/GaN器件经功率150W和时间150s等离子体轰击后,器件阈值电压从-4V被调制约为0.5V,表现为增强型。当漂移区LGD从5μm增加到15μm,器件的击穿电压从50V迅速增大到400V,电压增幅达350V。采用长度为3μm源场板结构将器件击穿电压明显地提高,击穿电压增加约为475V,且有着比硅基器件更低的比导通电阻,约为2.9mΩ.cm2。器件模拟结果表明,因源场板在远离栅边缘的漂移区中引入另一个电场强度为1.5MV/cm的电场,从而有效地释放了存在栅边缘的电场,将高达3MV/cm的电场减小至1MV/cm。微波测试结果表明,器件的特征频率fT和最大震荡频率fMAX随Vgs改变,正常工作时两参数均在千兆量级。栅宽为1mm的增强型功率管有较好的交直流和瞬态特性,正向电流约为90mA。故增强型AlGaN/GaN器件适合高压高频大功率变换的应用。  相似文献   

8.
The DC and RF characteristics of Ga/sub 0.49/In/sub 0.51/P-In/sub 0.15/Ga/sub 0.85/As enhancement- mode pseudomorphic HEMTs (pHEMTs) are reported for the first time. The transistor has a gate length of 0.8 /spl mu/m and a gate width of 200 /spl mu/m. It is found that the device can be operated with gate voltage up to 1.6 V, which corresponds to a high drain-source current (I/sub DS/) of 340 mA/mm when the drain-source voltage (V/sub DS/) is 4.0 V. The measured maximum transconductance, current gain cut-off frequency, and maximum oscillation frequency are 255.2 mS/mm, 20.6 GHz, and 40 GHz, respectively. When this device is operated at 1.9 GHz under class-AB bias condition, a 14.7-dBm (148.6 mW/mm) saturated power with a power-added efficiency of 50% is achieved when the drain voltage is 3.5 V. The measured F/sub min/ is 0.74 dB under I/sub DS/=15 mA and V/sub DS/=2 V.  相似文献   

9.
Performance of the AlGaN HEMT structure with a gate extension   总被引:5,自引:0,他引:5  
The microwave performance of AlGaN/GaN HEMTs at large drain bias is reported. The device structures were grown by organometallic vapor phase epitaxy on SiC substrates with a channel sheet resistance less than 280 ohms/square. The breakdown voltage of the HEMT was improved by the composite gate structure consisting of a 0.35 /spl mu/m long silicon nitride window with a 0.18 /spl mu/m long metal overhang on either side. This produced an metal-insulator-semiconductor (MIS) gate extension toward the drain with the insulator, silicon nitride, approximately 40-nm-thick. Transistors with a 150 /spl mu/m total gate width have demonstrated a continuous wave (CW) 10 GHz output power density and power added efficiency of 16.5 W/mm and 47%, respectively when operated at 60 V drain bias. Small-signal measurements yielded an f/sub T/ and f/sub max/ of 25.7 GHz and 48.8 GHz respectively. Maximum drain current was 1.3 A/mm at +4 V on the gate, with a knee voltage of /spl sim/5 V. This brief demonstrates that AlGaN/GaN HEMTs with an optimized gate structure can extend the device operation to higher drain biases yielding higher power levels and efficiencies than have previously been observed.  相似文献   

10.
We have developed a novel enhancement-mode double-doped AlGaAs/InGaAs/AlGaAs heterojunction FET (HJFET) with a 5 nm thick Al0.5Ga0.5As barrier layer inserted between an In 0.2Ga0.8As channel layer and an upper Al0.2 Ga0.8As electron supply layer. The Al0.5Ga 0.5As barrier layer reduces gate current under high forward gate bias voltage, resulting in a high forward gate turn-on voltage (V F) of 0.87 V, which is 170 mV higher than that of an HJFET without the barrier layer. Suppression of gate current assisted by a parallel conduction path in the upper electron supply layer was found to be also important for achieving the high VF. The developed device exhibited a high maximum drain current of 300 mA/mm with a threshold voltage of 0.17 V. A 950 MHz PDC power performance was evaluated under single 3.5 V operation. An HJFET with a 0.5 μm long gate exhibited 0.92 W output power and 63.6% power-added efficiency with 0.08 mA gate current (Ig) at -48 dBc adjacent channel leakage power at 50 kHz off-center frequency. This Ig is one-thirteenth to that of the HJFET without the barrier layer. These results indicate that the developed enhancement-mode HJFET is suitable for single low voltage operation power applications  相似文献   

11.
Highly threshold voltage (V/sub th/)-controllable four-terminal (4T) FinFETs with an aggressively thinned Si-fin thickness down to 8.5-nm have successfully been fabricated by using an orientation-dependent wet-etching technique, and the V/sub th/ controllability by gate biasing has systematically been confirmed. The V/sub th/ shift rate (/spl gamma/=-/spl delta/V/sub th///spl delta/V/sub g2/) dramatically increases with reducing Si-fin thickness (T/sub Si/), and the extremely high /spl gamma/=0.79 V/V is obtained at the static control gate bias mode for the 8.5-nm-thick Si-fin channel device with the 1.7-nm-thick gate oxide. By the synchronized control gate driving mode, /spl gamma/=0.46 V/V and almost ideal S-slope are achieved for the same device. These experimental results indicate that the optimum V/sub th/ tuning for the high performance and low-power consumption very large-scale integrations can be realized by a small gate bias voltage in the ultrathin Si-fin channel device and the orientation-dependent wet etching is the promising fabrication technique for the 4T FinFETs.  相似文献   

12.
This letter describes a successfully developed enhancement-mode double-doped AlGaAs/InGaAs/AlGaAs heterojunction FET with a buried p/sup +/-n junction gate structure for low-voltage-operated mobile applications. The buried p/sup +/-GaAs gate structure effectively reduced on-resistance (R/sub on/) and suppressed drain-current frequency dispersion for the device with high positive threshold voltage, resulting in high-efficiency characteristics under low-voltage operation. The fabricated p/sup +/-gate HJFET exhibited a low R/sub on/ of 1.4 /spl Omega//spl middot/mm with a threshold voltage of +0.4 V. Negligible frequency dispersion characteristics were obtained through pulsed current-voltage measurements for the device. Under a single 2.7-V operation, a 19.8-mm gate width device exhibited a power added efficiency of 51.9% with 26.8-dBm output power and a -40.1-dBc adjacent channel power ratio using a 1.95-GHz wideband code-division multiple-access signal.  相似文献   

13.
An In0.3Al0.7As/In0.3Ga0.7 As metamorphic power high electron mobility transistor (HEMT) grown on GaAs has been developed. This structure with 30% indium content presents several advantages over P-HEMT on GaAs and LM-HEMT on InP. A 0.15-μm gate length device with a single δ doping exhibits a state-of-the-art current gain cut-off frequency Ft value of 125 GHz at Vds=1.5 V, an extrinsic transconductance of 650 mS/mm and a current density of 750 mA/mm associated to a high breakdown voltage of -13 V, power measurements performed at 60 GHz demonstrate a maximum output power of 240 mW/mm with 6.4-dB power gain and a power added efficiency (PAE) of 25%. These are the first power results ever reported for any metamorphic HEMT  相似文献   

14.
A recessed-gate structure has been studied with a view to realizing normally off operation of high-voltage AlGaN/GaN high-electron mobility transistors (HEMTs) for power electronics applications. The recessed-gate structure is very attractive for realizing normally off high-voltage AlGaN/GaN HEMTs because the gate threshold voltage can be controlled by the etching depth of the recess without significant increase in on-resistance characteristics. With this structure the threshold voltage can be increased with the reduction of two-dimensional electron gas (2DEG) density only under the gate electrode without reduction of 2DEG density in the other channel regions such as the channel between drain and gate. The threshold-voltage increase was experimentally demonstrated. The threshold voltage of fabricated recessed-gate device increased to -0.14 V while the threshold voltage without the recessed-gate structure was about -4 V. The specific on-resistance of the device was maintained as low as 4 m/spl Omega//spl middot/cm/sup 2/ and the breakdown voltage was 435 V. The on-resistance and the breakdown voltage tradeoff characteristics were the same as those of normally on devices. From the viewpoint of device design, the on-resistance for the normally off device was modeled using the relationship between the AlGaN layer thickness under the gate electrode and the 2DEG density. It is found that the MIS gate structure and the recess etching without the offset region between recess edge and gate electrode will further improve the on-resistance. The simulation results show the possibility of the on-resistance below 1 m/spl Omega//spl middot/cm/sup 2/ for normally off AlGaN/GaN HEMTs operating at several hundred volts with threshold voltage up to +1 V.  相似文献   

15.
16.
The influences of (NH/sub 4/)/sub 2/S/sub x/ treatment on an AlGaAs/InGaAs/GaAs pseudomorphic high electron mobility transistor (PHEMT) are studied and demonstrated. Upon the sulfur passivation, the studied device exhibits better temperature-dependent dc and microwave characteristics. Experimentally, for a 1/spl times/100 /spl mu/m/sup 2/ gate/dimension PHEMT with sulfur passivation, the higher gate/drain breakdown voltage of 36.4 (21.5) V, higher turn-on voltage of 0.994 (0.69) V, lower gate leakage current of 0.6 (571) /spl mu/A/mm at V/sub GD/=-22 V, improved threshold voltage of -1.62 (-1.71) V, higher maximum transconductance of 240 (211) mS/mm with 348 (242) mA/mm broad operating regime (>0.9g/sub m,max/), and lower output conductance of 0.51 (0.53) mS/mm are obtained, respectively, at 300 (510) K. The corresponding unity current gain cutoff frequency f/sub T/ (maximum oscillation frequency f/sub max/) are 22.2 (87.9) and 19.5 (59.3) GHz at 250 and 400 K, respectively, with considerably broad operating regimes (>0.8f/sub T/,f/sub max/) larger than 455 mA/mm. Moreover, the relatively lower variations of device performances over wide temperature range (300/spl sim/510 K) are observed.  相似文献   

17.
We have fabricated a SOI laterally diffused MOSFET that is designed for use in radio frequency power amplifiers for wireless system-on-a-chip applications. The device is fabricated on a thin-film SOI wafer using a process that is suitable for integration with SOI CMOS. An under-source body contact is implemented and both a high breakdown voltage and a high ft are attained. The device performance compares favorably with bulk silicon rf power MOSFETs. For a gate length of 0.7 μm the device ft is 14 GHz, fmax is 18 GHz, and the breakdown voltage approaches 25 V  相似文献   

18.
A new circuit technique is described, yielding typical analog system voltage (36 V) operation from a circuit fabricated with low-voltage (LV/SUB CEO/=12-15 V) transistors. Such transistors can be fabricated in one-quarter the area of conventional higher breakdown devices, leading to great reductions in chip size and improved frequency performance due to decreased parasitics. This technique can be used to build complex systems combining high-voltage analog and dense digital circuitry on the same chip, with standard digital processing and without sacrificing analog performance. An extension of the technique uses a typical linear (LV/SUB CEO/=40 V) process to build high voltage (80-100 V) circuits. A 100 V op amp was designed and breadboarded with standard linear kit parts.  相似文献   

19.
GaAs power MESFET's with 0.5-μm T-shaped gate for Ku-band power applications have been developed using a new self-aligned and optical lithography. It displays a maximum current density of 350 mA/mm, an uniform transconductance of 150 mS/mm and a high gate-to-drain breakdown voltage of 35 V. Both the high breakdown voltage and the uniform transconductance were achieved by the new MESFET design incorporating an undoped GaAs cap and a thick lightly doped active layers. The breakdown voltage is the highest one among the values reported on the power devices. The device exhibits 0.61 W/mm power density and 47% power added efficiency with 9.0 dB associated gain at a drain bias of 12 V and an operation frequency of 12 GHz  相似文献   

20.
The first Ga0.51In0.49P channel MESFETs grown on a (100) GaAs substrate by GSMBE have been fabricated. A high gate-to-drain breakdown voltage of 42 V with a high maximum current density (320 mA/mm) was achieved. This result demonstrates that high-breakdown voltage could be attained by using Ga0.51In 0.49P as the channel material. We also measured a high-maximum oscillation frequency (fmax) of 30 GHz for a 1.5 μm gate-length device. This value is quite high compared with other high-breakdown-voltage GaAs MESFET's or MISFET's with the same gate length  相似文献   

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