LER evaluation of molecular resist for EUV lithography

We have designed and synthesized a molecular resist material, which has no distribution of the protecting groups and have evaluated its performance as a molecular resist with EB and EUV exposure tool. The molecular resist attained a resolution of sub-45 nm patterning at an exposure dose of 12 mJ/cm². It was found that controlling the distribution of the protecting groups in a molecular resist material has a great impact on improving line edge roughness (LER). Low LER values of 3.1 nm (inspection length: L = 620 nm) and 3.6 nm (L = 2000 nm) were achieved with this molecular resist using Extreme UltraViolet (EUV) lithography tool.     

Phase-change memory technology with self-aligned μTrench cell architecture for 90 nm node and beyond

A novel self-aligned μTrench-based cell architecture for phase change memory (PCM) process is presented. The low programming current and the good dimensional control of the sub-lithographic features achieved with the μTrench structure are combined with a self-aligned patterning strategy that simplify the integration process in term of alignment tolerances and of number of critical masks. The proposed architecture has been integrated in a 90 nm 128 Mb vehicle based on a pnp bipolar junction transistor for the array selection. The good active and leakage currents achieved by the purposely optimized selecting transistors combined with programming currents of 300 μA of the storage element and good distributions measured on the 128 Mb array demonstrate the suitability of the proposed architecture for the production of high-density PCM arrays at 90 nm and beyond.     

Template fabrication for the 32 nm node and beyond

Imprint lithography has been included on the ITRS Lithography Roadmap at the 32 and 22 nm nodes. Step and flash imprint lithography (S-FIL^™) is a unique method that has been designed from the beginning to enable precise overlay for creating multilevel devices. A photocurable low viscosity monomer is dispensed dropwise to meet the pattern density requirements of the device, thus enabling imprint patterning with a uniform residual layer across a field and across entire wafers. Further, S-FIL provides sub-100 nm feature resolution without the significant expense of multi-element, high quality projection optics or advanced illumination sources. However, since the technology is 1X, it is critical to address the infrastructure associated with the fabrication of templates.This paper addresses steps required to achieve resolution at or below 32 nm. Gaussian-beam writers are now installed in mask shops and are being used to fabricate S-FIL templates. Although the throughput of these systems is low, they can nevertheless be applied towards applications such as unit process development and device prototyping.Resolution improvements were achieved by optimizing the ZEP520A resolution and exposure latitude. Key to the fabrication process was the introduction of thinner resist films and data biasing of the critical features. By employing a resist thickness of 70 nm and by negatively biasing features as much as 18 nm, 28 nm half-pitch imprints were obtained. Further processing improvements show promise for achieving 20 nm half-pitch features on a template.     

Influences of embossing technology on Pb(Zr0.3,Ti0.7)O3 ferroelectric thin film

The ferroelectric random access memory (FRAM) which uses ferroelectric thin film as memory material is considered to be a candidate for the next generation memory application. In this work, we apply nano-embossing technology to fabricate Pb(Zr_0.3,Ti_0.7)O₃ (PZT) ferroelectric thin film nanostructures and investigate the influence of the patterning process on the material and ferroelectric properties by using SEM, XRD and Precision Ferroelectric Tester. Embossing process has been optimized for embossing depth and pattern profile. It was found that embossing will result in (1 0 0) preferred orientation of the PZT thin film. The electrical characteristics of patterned and un-patterned PZT films have been also studied for comparison.     

Fabrication of nano-sized resist patterns on flexible plastic film using thermal curing nano-imprint lithography

Due to polymer’s excellent flexibility, transparency, reliability and light weight, it is a good candidate material for substrate of devices including organic electronic devices, biomedical devices, and flexible displays (LCD and OLED). In order to build such devices on polymer, nano- to micron-sized patterning must be accomplished. Since polymer materials reacts with organic solvents or developer solutions which are inevitably used in photolithography and cannot bear high temperature (∼140 °C) process for photoresist baking, conventional photolithography cannot be used to polymer substrate. In this research, monomer based thermal curing imprinting lithography was used to make as small as 100 nm dense line and space patterns on flexible PET (polyethylene-terephthalate) film. Compared to hot embossing lithography, monomer based thermal curing imprint lithography uses monomer based imprint resin which consists of base monomer and thermal initiator. Since it is liquid phase at room temperature and polymerization can be initiated at 85 °C, which is much lower than glass temperature of polymer resin, the pattern transfer can be done at much lower temperature and pressure. Hence, patterns as small as 100 nm were successfully fabricated on flexible PET film substrate by monomer based thermal curing imprinting lithography at 85 °C and 5 atm without any noticeable degradation of PET substrate.     

UV nanoimprint lithography with rigid polymer molds

Transparent polymers are considered as alternative low-cost mold materials in UV nanoimprint lithography (UV-NIL). Here, we demonstrate a nanoimprint process with molds made of rigid polymers novel for this application. These polymer molds are found to show high performance in the patterning with UV-NIL. Sub-50 nm structures were fabricated with this process.     

Electron beam lithography on cylindrical roller

We developed a nano-structure fabrication technology over a cylindrical roller using electron beam lithography (EBL) and a specimen rotation apparatus. The high-resolution patterning is done on a cylindrical roller specimen and it is achieved by controlling the thickness of photo-resistance (PR) and dosage of the electron beam (EB). We successfully obtained homogeneous arrays of one-third circle grating with a nano-scale width 100 nm and a large area of 6 × 3.5 mm square. Couples of the “ITRI” character marks were also fabricated. The stitching control was accurately derived using the in-house made two-axis rotation system, which provides the smallest stitching of about 1.6 μm. The minimum feature size of 100 nm over the cylindrical roller is demonstrated. Moreover, the Nicole template with “ITRI” character pattern on the cylindrical roller was also successfully made, of which thickness is about 80 nm.     

Template replication for full wafer imprint lithography

Typically, the Step and Flash Imprint Lithography (S-FIL^TM) process uses field-to-field drop dispensing of UV-curable liquids for step-and-repeat patterning. Several applications, including patterned magnetic media, photonic crystals, and wire grid polarizers, are better served by a process that allows high-throughput, full-wafer patterning of sub-100 nm structures with modest alignment. Full-wafer imprinting requires a full-wafer template; however, creation of a wafer-scale imprint template with sub-100 nm structures is not feasible with direct-writing approaches. This paper describes a practical methodology for creating wafer-scale templates suitable for full-wafer imprinting of sub-100 nm structures.The wafer-scale template is replicated from a smaller area master template using the S-FIL step-and-repeat process. The pattern is repeated to accommodate the wafer substrate targeted for a particular application. The tone of the master template is maintained by employing an SFIL/R^TM (reverse tone) pattern transfer process. To create the replicate template, the patterns are imprinted onto a fused silica wafer that has been coated with chromium and an organic transfer layer. A silicon-containing resist, Silspin^TM, is spun on to planarize the organic monomer material. Following an etch back of the Silspin, the monomer and transfer layer are patterned using the Silspin as a hard mask. The Silspin and monomer stack then serves as a masking layer for the chromium and fused silica etches. The remaining monomer and chromium are then removed to create a conformal replicate template.     

Patterning capability of new molecular resist in EUV lithography

We designed and synthesized a new partially-protected polyphenol, 25X-MBSA-M, for which the position and number of protected hydroxyl groups have no dispersion, and evaluated the EUV patterning performance of a chemically amplified positive-tone resist based on it. EUV imaging experiments were performed using the high-numerical-aperture (NA = 0.3), small-field EUV exposure tool (HINA) at ASET and coherent illumination (σ = 0.0). Patterning results showed the resolution of the resist to be 28 nm at an EUV exposure dose of 12.2 mJ/cm², the obtainable aspect ratio to be as high as 2, and the line-edge roughness (LER) to be small, with 3σ being 3.6 nm for 45-nm line-and-space patterns and an inspection length, L, of 2000 nm. In addition, pattern collapse was markedly suppressed.     

High efficiency red phosphorescent organic light-emitting diodes using a spirobenzofluorene type phosphine oxide as a host material

High efficiency red phosphorescent organic light-emitting diodes have been developed using a spirobenzofluorene type phosphine oxide (SPPO2) as a host material. The SPPO2 had a high glass transition temperature of 119 °C and a smooth surface morphology with a surface roughness less than 1 nm. The red device with the SPPO2 as a host showed a quantum efficiency of 14.3% with a current efficiency of 20.4 cd/A.     

Fabrication of a conductive nanoscale electrode for functional devices using nanoimprint lithography with printable metallic nanoink

This paper proposes two metal patterning processes. In each process, nanoimprint lithography (NIL) is used with commercialized particle-based silver nanoink which has appropriate properties for NIL. One process is a direct NIL process with a polydimethylsiloxane (PDMS) stamp; the other is a combined NIL and lift-off process. The direct NIL process is executed by using a xylene-absorbed PDMS stamp to decrease the curing time and minimize the residuals. A flexible PDMS stamp can also be wrapped around a quartz cylinder and used as a roll stamp to enlarge the patterned area. The direct NIL process successfully produced silver line patterns in the range of 200–300 nm, and the combined NIL and lift-off process successfully produced silver line patterns in the range of 15–60 nm.     

Soft UV-NIL at 20 nm scale using flexible bi-layer stamp casted on HSQ master mold

In this paper we present a comparative study of two e-Beam Lithography (EBL) processes for Nanoimprinting Lithography (NIL) master mold, i.e. the standard PMMA based EBL Si patterning process and the HSQ process. 20 nm features with minimal sidewall roughness and high uniformity are demonstrated on large surface by using HSQ process. Moreover, to validate this ultra-high resolution HSQ EBL process and to check NIL resolution performances, soft UV-NIL replications were performed using soft hard-PDMS/PDMS bi-layer stamps casted on the HSQ master mold. We demonstrate the replication of sub-20 nm nanodots of high density (pitch 60 nm) with a good uniformity on the whole field area.     

Impact of source-to-drain tunnelling on the scalability of arbitrary oriented alternative channel material nMOSFETs

In this work, the scalability of alternative channel material double gate nano nMOSFETs has been investigated by the mean of semi-analytical models of I_on/I_off currents, accounting for quantum capacitance degradation, short channel effects, band-to-band and source-to-drain tunnelling in arbitrary substrate and channel direction.Contrary to most of the previous study neglecting source-to-drain tunnelling, it has been found that for devices with physical gate length below 13 nm (as required in the 22 and 16 nm nodes), this mechanism significantly penalises the I_on/I_off trade off of small effective masses channel materials like Ge or GaAs, much more than in the case of Si and biaxially strained Si (s-Si). In addition, only strained Si-MOSFETs has been found to meet the performance expectation of the International Technology Roadmap of Semiconductor for the 22 nm and 16 nm technological nodes.     

Exciton diffusion length of tris (dibenzoylmethane) mono (phenanthroline) europium (III) measured by photocurrent and absorption as a function of wavelength

Ideally, the exciton diffusion length in an organic photovoltaic is comparable to the optical penetration depth, i.e., the inverse of the absorption coefficient. In most organic materials, the exciton diffusion length is up to several orders of magnitude smaller than the absorption penetration depth – resulting in lower energy conversion efficiencies. In metal-organic materials, the exciton lifetime has been predicted to be large due to strong spin orbit coupling. This increased lifetime may lead to increased exciton diffusion. One particular metal-organic material, tris (dibenzoylmethane) mono (phenanthroline) europium (III) or Eu-DM, is especially interesting for photovoltaic applications as it is soluble in toluene and therefore can be spun-on and processed inexpensively. Using photocurrent and optical absorption as a function of wavelength, the exciton diffusion length of spun-on Eu-DM was measured to be 250 ± 8 Å, for optical excitation wavelengths in the range 350 nm < L < 450 nm. A long tail in the photocurrent and absorption spectra indicate a weakly allowed transition in this energy range. Possible implications of this tail are discussed.     

Thermal characterization of high power LED with ceramic particles filled thermal paste for effective heat dissipation

The next generation packaging materials are expected to possess high heat dissipation capability. Understanding the needs for betterment in the field of thermal management, the present study aims at investigating the package level analysis on a high power LED. In this study, commercially available thermal paste was heavily filled with ceramic particles of aluminium nitride (AlN) and boron nitride (BN) in order to enhance the heat dissipation of the device. Different particle sizes of AlN and BN fillers were incorporated homogenously into the thermal paste and applied as a thermal interface material (TIM) for an effective system level analysis employing thermal transient measurement. It was found that AlN TIM achieve less LED junction temperature by a difference of 2.20 °C compared to BN filled TIM. Furthermore, among D₅₀ = 1170 nm, 813 nm and 758 nm, the AlN at D₅₀ = 1170 nm was found to exhibit the lowest junction temperature of 38.49 °C and the lowest total thermal resistance of 11.33 K/W compared to the other two fillers.     

Optical characterization of mechanically alloyed PbSnS3 nanocrystals

The present study explains the preparation of PbSnS₃ nanocrystals using mechanical alloying as the processing technique and elemental powders as the starting material. The elemental powders of Pb, Sn and sublimed sulphur (S) were mechanically alloyed for 40 h. Phases evolved during mechanical alloying are explored by X-ray diffraction (XRD). The morphology and microstructural features have been investigated using High-resolution Transmission Electron Microscopy (HRTEM). UV–Vis–NIR spectroscopy has been used to measure the optical absorption characteristics. The mechanically alloyed powders show particle sizes in the range of 3–12 nm. The absorption edge extends from 503 nm to the visible region to 1360 nm near infrared region with a sudden change in slope at 860 nm, indicating the feature of indirect band gap semiconductors. The intersection point with the x-axis of extrapolating (αE)² line as a function of E gives a direct band gap of 1.33 eV and an indirect gap of 0.59 eV.     

Synthesis and characterization of EuBa2Ca2Cu3O9−x: The influence of temperature on dielectric properties and charge transport mechanism

High dielectric constant materials have a crucial importance for various microelectronic applications such as memory devices, supercapacitors etc. Among other insulators, perovskite structured oxide materials attract great interest not only for their high dielectric constants but also their unique electrical and magnetic properties such as superconductivity etc. From this point of view, a new Europium based copper oxide layered material with perovskite structure (EuBa₂Ca₂Cu₃O_9−x coded as Eu-1223) has been synthesized by solid state reaction method in this work. The physical and chemical properties of Eu-1223 have been determined by FTIR, SEM, XRF, XRD, TGA and DTA techniques. The influence of temperature on impedance and dielectric properties of Eu-1223 has been investigated by impedance spectroscopy measurements performed within the frequency interval of 5 Hz–13 MHz between 298 K and 408 K temperatures. It has been found that the Eu-1223 material has high dielectric constants at each temperature operated. In addition, Eu-1223 sample behaves as a colossal dielectric material up to 300 kHz for 408 K due to observation of dielectric constant values which are greater than 10³. Furthermore, it has been revealed that Eu-1223 material can be used as thermally sensitive resistors in electronic circuits due to its decreasing resistance with increasing temperature. Moreover, it has been observed that the relaxation frequency of the system shifts from 46.5 kHz (low frequency radio wave band) to 1.57 MHz (mid frequency radio wave band) as the temperature increasing from 298 K to 408 K. According to dc conductivity investigations, the variation of dc conductivity with the inverse of temperature satisfies linear relationship that indicates a thermally activated nearest neighbor hopping conduction. On the other hand, it has been determined that ac conductivity has frequency dependent relation which obeys ω^s for the high frequency region. Furthermore, the frequency exponent, s, which takes values between 0.7 and 0.4, shows a decreasing behavior with increasing temperature. In conclusion, ac charge transport mechanism has been predicted as correlated barrier hoping for Eu-1223.     

The locally twisted thiophene bridged phenanthroimidazole derivatives as dual-functional emitters for efficient non-doped electroluminescent devices

A series of locally twisted dual-functional materials namely PIPT, PITT and PIFT have been designed and synthesized by introducing different polyaromatic hydrocarbon groups to a phenanthroimidazole backbone through a thiophene bridge. In these molecules, the thiophene bridge and phenanthroimidazole platform are nearly coplanar and this endows these materials with relatively shallow HOMO levels (−5.35 to −5.21 eV). On the other hand, the bulky polyaromatic hydrocarbon units introduce non-planar twisty structures which reduce molecular aggregations. These three materials show color-tunable emission (emission peak from 468 to 532 nm in film) and high thermal stability (T_g > 160 °C). Simple trilayer devices using these three phenanthroimidazole derivatives as non-doped emitting layers exhibit low turn-on voltages (2.3–2.7 V) and high maximum efficiencies of 3.74, 6.15 and 6.89 cd/A for PIPT, PITT and PIFT, respectively. Above all, owing to their shallow HOMO levels for enabling efficient hole-injection, even simpler bilayer devices employing these materials as hole-transporting emitters show low turn-on voltages (2.6–2.8 V) and high efficiencies of 5.77 cd/A for PIPT, 6.03 cd/A for PITT and 6.04 cd/A for PIFT, respectively. These comparable performances with those of the trilayer configurations show the efficient hole-injection/transport ability of these three newly developed emitters.     

Performance and reliability of HfAlOx-based interpoly dielectrics for floating-gate Flash memory

This paper discusses the performance and reliability of aggressively scaled HfAlO_x-based interpoly dielectric stacks in combination with high-workfunction metal gates for sub-45 nm non-volatile memory technologies. It is shown that a less than 5 nm EOT IPD stack can provide a large program/erase (P/E) window, while operating at moderate voltages and has very good retention, with an extrapolated 10-year retention window of about 3 V at 150 °C. The impact of the process sequence and metal gate material is discussed. The viability of the material is considered in view of the demands of various Flash memory technologies and direction for further improvements are discussed.     

Process control for 32 nm imprint masks using variable shape beam pattern generators

Step and Flash Imprint Lithography (S-FIL^®) is a unique method that has been designed from the beginning to enable precise overlay for creating multi-level devices. However, since the technology is 1X, it is critical to address the infrastructure associated with the fabrication of templates (imprint masks).For device manufacturing, one of the major technical challenges remains the fabrication of full-field 1X templates with commercially viable write times. Recent progress in the writing of sub-40 nm patterns using commercial variable shape e-beam tools and non-chemically amplified resists has demonstrated a very promising route to realizing these objectives, and in doing so, has considerably strengthened imprint lithography as a competitive manufacturing technology for the sub-32 nm node. Here we report the critical dimension (CD) uniformity and process latitude of dense 32 nm patterns from templates written with variable shape beam pattern generators. Uniformity on the template and in the imprinted field was 3.22 and 3.45 nm, 3σ. Process latitude during the writing of the template was improved by increasing both feature bias and exposure dose. As an example, the slopes for the 36 and 32 nm features are approximately 0.30 and 0.25 nm/μC/cm², respectively, indicating a substantial process window for exposure dose.